mirror of
https://github.com/Valeh2012/PersonalVotingMachine
synced 2025-12-08 18:15:11 +02:00
first commit
This commit is contained in:
valeh
@@ -0,0 +1,148 @@
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||||
#
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||||
# Generic and Simple GNU ARM Makefile
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||||
#
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||||
# Desinged for the gnu-arm-none-eabi tool chain
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||||
#
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||||
# Features
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||||
# - create hex file
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||||
# - create assembler listing (.dis)
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||||
#
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||||
# Limitations
|
||||
# - only C-files supported
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||||
# - no automatic dependency checking (call 'make clean' if any .h files are changed)
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||||
#
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||||
# Targets:
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||||
# make
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||||
# create hex file, no upload
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||||
# make upload
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||||
# create and upload hex file
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||||
# make clean
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||||
# delete all generated files
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||||
#
|
||||
# Note:
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||||
# Display list make database: make -p -f/dev/null | less
|
||||
#
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||||
#================================================
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||||
# External tools
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||||
|
||||
# The base directory of gcc-arm-none-eabi
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||||
# Can be empty on Ubuntu and installed gcc-arm-none-eabi
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||||
# If set, GCCBINPATH must contain a "/" at the end.
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||||
GCCBINPATH:=/usr/bin/
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||||
|
||||
#================================================
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||||
# Project Information
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||||
|
||||
# The name for the project
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||||
TARGETNAME:=gpio_pulse
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||||
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||||
# The source files of the project
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||||
CSRC:=$(wildcard *.c)
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||||
SSRC:=$(wildcard ../stm32l0xx/src/*.s)
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||||
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||||
# The CPU architecture (will be used for -mcpu)
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||||
# for the LPC824, can we use "cortex-m0plus"?
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||||
MCPU:=cortex-m0plus
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||||
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||||
# Include directory for the system include files
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||||
SYSINC:=../stm32l0xx/inc
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||||
SYSSRC:=$(wildcard ../stm32l0xx/src/*.c)
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||||
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||||
# Include directory for the u8g2 include files
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||||
#U8G2INC:=../../../../csrc/
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||||
#U8G2SRC:=$(wildcard ../../../../csrc/*.c)
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||||
|
||||
# directory for FatFS
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||||
#FFINC:=../fatfs
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||||
#FFSRC:=$(wildcard ../fatfs/*.c)
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||||
|
||||
# Directory for the linker script
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||||
LDSCRIPTDIR:=.
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||||
# Name of the linker script (must be the "keep" script, because the other script is not always working)
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||||
LDSCRIPT:=stm32l031x6.ld
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||||
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||||
#================================================
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||||
# Main part of the Makefile starts here. Usually no changes are needed.
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||||
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||||
# Internal Variable Names
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||||
LIBNAME:=$(TARGETNAME).a
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ELFNAME:=$(TARGETNAME).elf
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HEXNAME:=$(TARGETNAME).hex
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DISNAME:=$(TARGETNAME).dis
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||||
MAPNAME:=$(TARGETNAME).map
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||||
OBJ:=$(CSRC:.c=.o) $(SSRC:.s=.o) $(SYSSRC:.c=.o)
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# $(SYSSRC:.c=.o) $(U8G2SRC:.c=.o) $(FFSRC:.c=.o)
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|
||||
# Replace standard build tools by arm tools
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||||
AS:=$(GCCBINPATH)arm-none-eabi-as
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||||
CC:=$(GCCBINPATH)arm-none-eabi-gcc
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||||
AR:=$(GCCBINPATH)arm-none-eabi-ar
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OBJCOPY:=$(GCCBINPATH)arm-none-eabi-objcopy
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OBJDUMP:=$(GCCBINPATH)arm-none-eabi-objdump
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||||
SIZE:=$(GCCBINPATH)arm-none-eabi-size
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||||
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||||
# Common flags
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||||
COMMON_FLAGS = -mthumb -mcpu=$(MCPU)
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COMMON_FLAGS += -DSTM32L031xx
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COMMON_FLAGS += -Wall -I. -I$(SYSINC) -I$(U8G2INC)
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# define stack size (defaults to 0x0100)
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# COMMON_FLAGS += -D__STACK_SIZE=0x0100
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# COMMON_FLAGS += -Os -flto
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COMMON_FLAGS += -Os
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||||
# COMMON_FLAGS += -fstack-protector
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# COMMON_FLAGS += -finstrument-functions
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||||
# Do not use stand libs startup code. Uncomment this for gcclib procedures
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||||
# memcpy still works, but might be required for __aeabi_uidiv
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||||
# COMMON_FLAGS += -nostdlib
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# remove unused data and function
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||||
#COMMON_FLAGS += -ffunction-sections -fdata-sections -fshort-wchar
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COMMON_FLAGS += -ffunction-sections -fdata-sections
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||||
# C flags
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||||
CFLAGS:=$(COMMON_FLAGS) -std=gnu99
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||||
# LD flags
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||||
# remove unreferenced procedures and variables, but __isr_vector
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GC:=-Wl,--gc-sections -Wl,--undefined=__isr_vector
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MAP:=-Wl,-Map=$(MAPNAME)
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LFLAGS:=$(COMMON_FLAGS) $(GC) $(MAP)
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#LDLIBS:=--specs=nosys.specs -lc -lc -lnosys -L$(LDSCRIPTDIR) -T $(LDSCRIPT)
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LDLIBS:=--specs=nosys.specs -L$(LDSCRIPTDIR) -T $(LDSCRIPT)
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||||
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||||
# Additional Suffixes
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||||
.SUFFIXES: .elf .hex .bin .dis
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||||
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||||
# Targets
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||||
.PHONY: all
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all: $(DISNAME) $(HEXNAME)
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$(SIZE) $(ELFNAME)
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.PHONY: upload
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upload: $(DISNAME) $(HEXNAME) $(ELFNAME)
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stm32flash -e 255 -g 0 -w $(HEXNAME) -v /dev/ttyUSB0
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$(SIZE) $(ELFNAME)
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.PHONY: clean
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clean:
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$(RM) $(OBJ) $(HEXNAME) $(ELFNAME) $(LIBNAME) $(DISNAME) $(MAPNAME) libssp.a libssp_nonshared.a
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# implicit rules
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||||
.elf.hex:
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$(OBJCOPY) -O ihex $< $@
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||||
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||||
# explicit rules
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||||
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||||
$(ELFNAME): $(LIBNAME)($(OBJ)) libssp.a libssp_nonshared.a
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$(LINK.o) $(LFLAGS) $(LIBNAME) $(LDLIBS) -o $@
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||||
$(DISNAME): $(ELFNAME)
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$(OBJDUMP) -D -S $< > $@
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||||
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||||
# create empty ssp libs for -fstack-protector-all -fstack-protector
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libssp.a:
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$(AR) rcs $@
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libssp_nonshared.a:
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$(AR) rcs $@
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@@ -0,0 +1,642 @@
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/*
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GPIO pulse generator project for the STM32L031
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I2C:
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Write 0, <gpio cmd>
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*/
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#include "stm32l031xx.h"
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#include "core_cm0plus.h"
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/*================================================*/
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/* forward declaration */
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void setGPIO( uint8_t n );
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void clearGPIO(void);
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/*================================================*/
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/* queue */
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||||
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#define GPIO_QUEUE_MAX 128
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uint8_t gpio_queue_mem[GPIO_QUEUE_MAX];
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uint8_t gpio_queue_start = 0;
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uint8_t gpio_queue_end = 0;
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/* this is called from the I2C interrupt procedures */
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void addCmdToGPIOQueue(uint8_t n)
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{
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uint8_t pos;
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pos = gpio_queue_end ;
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pos++;
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if ( pos >= GPIO_QUEUE_MAX )
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pos = 0;
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if ( pos == gpio_queue_start )
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return; // queue overflow
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gpio_queue_mem[gpio_queue_end] = n;
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gpio_queue_end = pos;
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}
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uint8_t isGPIOQueueEmpty(void)
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{
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if ( gpio_queue_start == gpio_queue_end )
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return 1;
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return 0;
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}
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/* get the next command in the queue, return 255 if the queue is empty */
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uint8_t getCmdFromGPIOQueue(void)
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{
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uint8_t r = gpio_queue_mem[gpio_queue_start];
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if ( isGPIOQueueEmpty() )
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return 255;
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return r;
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}
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void removeCmdFromGPIOQueue(void)
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{
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if ( isGPIOQueueEmpty() )
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return;
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__disable_irq();
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gpio_queue_start++;
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if ( gpio_queue_start >= GPIO_QUEUE_MAX )
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gpio_queue_start = 0;
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__enable_irq();
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}
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/*================================================*/
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/* GPIO output state machine */
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#define GPIO_STATE_IDLE 0
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#define GPIO_STATE_TURN_ON 1
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#define GPIO_STATE_WAIT_ON 2
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#define GPIO_STATE_OFF 3
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/* time is in ticks + 1 */
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#define GPIO_STATE_ON_TICKS 0
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#define GPIO_STATE_OFF_TICKS 4
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volatile uint8_t gpio_state = GPIO_STATE_IDLE;
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volatile uint8_t gpio_state_machine_output_number = 0;
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volatile uint8_t gpio_state_machine_counter = 0;
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void gpioNextState(void)
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{
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switch(gpio_state)
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{
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case GPIO_STATE_IDLE:
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break;
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case GPIO_STATE_TURN_ON:
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setGPIO(gpio_state_machine_output_number);
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gpio_state_machine_counter = GPIO_STATE_ON_TICKS;
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gpio_state = GPIO_STATE_WAIT_ON;
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break;
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case GPIO_STATE_WAIT_ON:
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if ( gpio_state_machine_counter == 0 )
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{
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clearGPIO();
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gpio_state_machine_counter = GPIO_STATE_OFF_TICKS;
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gpio_state = GPIO_STATE_OFF;
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}
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else
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{
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gpio_state_machine_counter--;
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}
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break;
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case GPIO_STATE_OFF:
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if ( gpio_state_machine_counter == 0 )
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{
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gpio_state = GPIO_STATE_IDLE;
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}
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else
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{
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gpio_state_machine_counter--;
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}
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break;
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default:
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gpio_state = GPIO_STATE_IDLE;
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break;
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}
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}
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uint8_t gpioStartStateMachine(uint8_t gpio_number)
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{
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/* can we enable the state machine? */
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if ( gpio_state != GPIO_STATE_IDLE )
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return 0; /* not idle, can not start */
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/* set the gpio number */
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__disable_irq();
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gpio_state_machine_output_number = gpio_number;
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gpio_state = GPIO_STATE_TURN_ON;
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__enable_irq();
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return 1;
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}
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/*================================================*/
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/* Queue & State Machine Connector */
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void processQueue(void)
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{
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uint8_t cmd;
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cmd = getCmdFromGPIOQueue();
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if ( cmd < 255 )
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{
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/* try to start the state machine */
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if ( gpioStartStateMachine(cmd) != 0 )
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{
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/* success, remove the cmd from the queue */
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removeCmdFromGPIOQueue();
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}
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}
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}
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/*==============================================*/
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/* I2C */
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volatile unsigned char i2c_mem[256]; /* contains data, which read or written */
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volatile unsigned char i2c_idx; /* the current index into i2c_mem */
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volatile unsigned char i2c_is_write_idx; /* write state */
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volatile uint16_t i2c_total_irq_cnt;
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volatile uint16_t i2c_TXIS_cnt;
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volatile uint16_t i2c_RXNE_cnt;
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void i2c_mem_reset_write(void)
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{
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i2c_is_write_idx = 1;
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}
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void i2c_mem_init(void)
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{
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i2c_idx = 0;
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i2c_mem_reset_write();
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}
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void i2c_mem_set_index(unsigned char value)
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{
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i2c_idx = value;
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i2c_is_write_idx = 0;
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}
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||||
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void i2c_mem_write_via_index(unsigned char value)
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{
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if ( i2c_idx == 0 )
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{
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/* additionall put this byte into the queue */
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addCmdToGPIOQueue(value);
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}
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i2c_mem[i2c_idx++] = value;
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}
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unsigned char i2c_mem_read(void)
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{
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i2c_mem_reset_write();
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i2c_idx++;
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return i2c_mem[i2c_idx];
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}
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void i2c_mem_write(unsigned char value)
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||||
{
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||||
if ( i2c_is_write_idx != 0 )
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{
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i2c_mem_set_index(value);
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}
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else
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{
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i2c_is_write_idx = 0;
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i2c_mem_write_via_index(value);
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}
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}
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/* address: I2C address multiplied by 2 */
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/* Pins PA9 (SCL) and PA10 (SDA) */
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void i2c_hw_init(unsigned char address)
|
||||
{
|
||||
RCC->APB1ENR |= RCC_APB1ENR_I2C1EN; /* Enable clock for I2C */
|
||||
RCC->IOPENR |= RCC_IOPENR_IOPAEN; /* Enable clock for GPIO Port A */
|
||||
|
||||
__NOP(); /* extra delay for clock stabilization required? */
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||||
__NOP();
|
||||
|
||||
|
||||
/* configure io */
|
||||
GPIOA->MODER &= ~GPIO_MODER_MODE9; /* clear mode for PA9 */
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GPIOA->MODER |= GPIO_MODER_MODE9_1; /* alt fn */
|
||||
GPIOA->OTYPER |= GPIO_OTYPER_OT_9; /* open drain */
|
||||
GPIOA->AFR[1] &= ~(15<<4); /* Clear Alternate Function PA9 */
|
||||
GPIOA->AFR[1] |= 1<<4; /* I2C Alternate Function PA9 */
|
||||
|
||||
GPIOA->MODER &= ~GPIO_MODER_MODE10; /* clear mode for PA10 */
|
||||
GPIOA->MODER |= GPIO_MODER_MODE10_1; /* alt fn */
|
||||
GPIOA->OTYPER |= GPIO_OTYPER_OT_10; /* open drain */
|
||||
GPIOA->AFR[1] &= ~(15<<8); /* Clear Alternate Function PA10 */
|
||||
GPIOA->AFR[1] |= 1<<8; /* I2C Alternate Function PA10 */
|
||||
|
||||
|
||||
RCC->CCIPR &= ~RCC_CCIPR_I2C1SEL; /* write 00 to the I2C clk selection register */
|
||||
RCC->CCIPR |= RCC_CCIPR_I2C1SEL_0; /* select system clock (01) */
|
||||
|
||||
/* I2C init flow chart: Clear PE bit */
|
||||
|
||||
I2C1->CR1 &= ~I2C_CR1_PE;
|
||||
|
||||
/* I2C init flow chart: Configure filter */
|
||||
|
||||
/* leave at defaults */
|
||||
|
||||
/* I2C init flow chart: Configure timing */
|
||||
/*
|
||||
standard mode 100kHz configuration
|
||||
SYSCLK = I2CCLK = 32 MHz
|
||||
PRESC = 6 bits 28..31
|
||||
SCLL = 0x13 bits 0..7
|
||||
SCLH = 0x0f bits 8..15
|
||||
SDADEL = 0x02 bits 16..19
|
||||
SCLDEL = 0x04 bits 20..23
|
||||
*/
|
||||
I2C1->TIMINGR = 0x60420f13;
|
||||
|
||||
/* I2C init flow chart: Configure NOSTRECH */
|
||||
|
||||
I2C1->CR1 |= I2C_CR1_NOSTRETCH;
|
||||
|
||||
/* I2C init flow chart: Enable I2C */
|
||||
|
||||
I2C1->CR1 |= I2C_CR1_PE;
|
||||
|
||||
|
||||
/* disable OAR1 for reconfiguration */
|
||||
I2C1->OAR1 &= ~I2C_OAR1_OA1EN;
|
||||
|
||||
I2C1->OAR1 = address;
|
||||
|
||||
I2C1->OAR1 |= I2C_OAR1_OA1EN;
|
||||
|
||||
|
||||
/* enable interrupts */
|
||||
I2C1->CR1 |= I2C_CR1_STOPIE;
|
||||
I2C1->CR1 |= I2C_CR1_NACKIE;
|
||||
//I2C1->CR1 |= I2C_CR1_ADDRIE;
|
||||
I2C1->CR1 |= I2C_CR1_RXIE;
|
||||
I2C1->CR1 |= I2C_CR1_TXIE;
|
||||
|
||||
|
||||
|
||||
/* load first value into TXDR register */
|
||||
I2C1->TXDR = i2c_mem[i2c_idx];
|
||||
|
||||
|
||||
/* enable IRQ in NVIC */
|
||||
NVIC_SetPriority(I2C1_IRQn, 0);
|
||||
NVIC_EnableIRQ(I2C1_IRQn);
|
||||
|
||||
|
||||
|
||||
}
|
||||
|
||||
void i2c_init(unsigned char address)
|
||||
{
|
||||
i2c_mem_init();
|
||||
i2c_hw_init(address);
|
||||
}
|
||||
|
||||
|
||||
void __attribute__ ((interrupt, used)) I2C1_IRQHandler(void)
|
||||
{
|
||||
unsigned long isr = I2C1->ISR;
|
||||
|
||||
i2c_total_irq_cnt ++;
|
||||
|
||||
if ( isr & I2C_ISR_TXIS )
|
||||
{
|
||||
i2c_TXIS_cnt++;
|
||||
I2C1->TXDR = i2c_mem_read();
|
||||
}
|
||||
else if ( isr & I2C_ISR_RXNE )
|
||||
{
|
||||
i2c_RXNE_cnt++;
|
||||
i2c_mem_write(I2C1->RXDR);
|
||||
I2C1->ISR |= I2C_ISR_TXE; // allow overwriting the TCDR with new data
|
||||
I2C1->TXDR = i2c_mem[i2c_idx];
|
||||
}
|
||||
else if ( isr & I2C_ISR_STOPF )
|
||||
{
|
||||
I2C1->ICR = I2C_ICR_STOPCF;
|
||||
I2C1->ISR |= I2C_ISR_TXE; // allow overwriting the TCDR with new data
|
||||
I2C1->TXDR = i2c_mem[i2c_idx];
|
||||
i2c_mem_reset_write();
|
||||
}
|
||||
else if ( isr & I2C_ISR_NACKF )
|
||||
{
|
||||
I2C1->ICR = I2C_ICR_NACKCF;
|
||||
I2C1->ISR |= I2C_ISR_TXE; // allow overwriting the TCDR with new data
|
||||
I2C1->TXDR = i2c_mem[i2c_idx];
|
||||
i2c_mem_reset_write();
|
||||
}
|
||||
else if ( isr & I2C_ISR_ADDR )
|
||||
{
|
||||
/* not required, the addr match interrupt is not enabled */
|
||||
I2C1->ICR = I2C_ICR_ADDRCF;
|
||||
I2C1->ISR |= I2C_ISR_TXE; // allow overwriting the TCDR with new data
|
||||
I2C1->TXDR = i2c_mem[i2c_idx];
|
||||
i2c_mem_reset_write();
|
||||
}
|
||||
|
||||
/* if at any time the addr match is set, clear the flag */
|
||||
/* not sure, whether this is required */
|
||||
if ( isr & I2C_ISR_ADDR )
|
||||
{
|
||||
I2C1->ICR = I2C_ICR_ADDRCF;
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
/*================================================*/
|
||||
|
||||
volatile unsigned long SysTickCount = 0;
|
||||
|
||||
void __attribute__ ((interrupt, used)) SysTick_Handler(void)
|
||||
{
|
||||
SysTickCount++;
|
||||
gpioNextState();
|
||||
}
|
||||
|
||||
|
||||
/*
|
||||
Delay by the provided number of system ticks.
|
||||
The delay must be smaller than the RELOAD value.
|
||||
This delay has an imprecision of about +/- 20 system ticks.
|
||||
*/
|
||||
static void _delay_system_ticks_sub(uint32_t sys_ticks)
|
||||
{
|
||||
uint32_t start_val, end_val, curr_val;
|
||||
uint32_t load;
|
||||
|
||||
start_val = SysTick->VAL;
|
||||
start_val &= 0x0ffffffUL;
|
||||
end_val = start_val;
|
||||
|
||||
if ( end_val < sys_ticks )
|
||||
{
|
||||
/* check, if the operation after this if clause would lead to a negative result */
|
||||
/* if this would be the case, then add the reload value first */
|
||||
load = SysTick->LOAD;
|
||||
load &= 0x0ffffffUL;
|
||||
end_val += load;
|
||||
}
|
||||
/* counter goes towards zero, so end_val is below start value */
|
||||
end_val -= sys_ticks;
|
||||
|
||||
|
||||
/* wait until interval is left */
|
||||
if ( start_val >= end_val )
|
||||
{
|
||||
for(;;)
|
||||
{
|
||||
curr_val = SysTick->VAL;
|
||||
curr_val &= 0x0ffffffUL;
|
||||
if ( curr_val <= end_val )
|
||||
break;
|
||||
if ( curr_val > start_val )
|
||||
break;
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
for(;;)
|
||||
{
|
||||
curr_val = SysTick->VAL;
|
||||
curr_val &= 0x0ffffffUL;
|
||||
if ( curr_val <= end_val && curr_val > start_val )
|
||||
break;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
/*
|
||||
Delay by the provided number of system ticks.
|
||||
Any values between 0 and 0x0ffffffff are allowed.
|
||||
*/
|
||||
void delay_system_ticks(uint32_t sys_ticks)
|
||||
{
|
||||
uint32_t load4;
|
||||
load4 = SysTick->LOAD;
|
||||
load4 &= 0x0ffffffUL;
|
||||
load4 >>= 2;
|
||||
|
||||
while ( sys_ticks > load4 )
|
||||
{
|
||||
sys_ticks -= load4;
|
||||
_delay_system_ticks_sub(load4);
|
||||
}
|
||||
_delay_system_ticks_sub(sys_ticks);
|
||||
}
|
||||
|
||||
|
||||
|
||||
void setHSIClock()
|
||||
{
|
||||
|
||||
|
||||
/* test if the current clock source is something else than HSI */
|
||||
if ((RCC->CFGR & RCC_CFGR_SWS) != RCC_CFGR_SWS_HSI)
|
||||
{
|
||||
/* enable HSI */
|
||||
RCC->CR |= RCC_CR_HSION;
|
||||
/* wait until HSI becomes ready */
|
||||
while ( (RCC->CR & RCC_CR_HSIRDY) == 0 )
|
||||
;
|
||||
|
||||
/* enable the HSI "divide by 4" bit */
|
||||
RCC->CR |= (uint32_t)(RCC_CR_HSIDIVEN);
|
||||
/* wait until the "divide by 4" flag is enabled */
|
||||
while((RCC->CR & RCC_CR_HSIDIVF) == 0)
|
||||
;
|
||||
|
||||
|
||||
/* then use the HSI clock */
|
||||
RCC->CFGR = (RCC->CFGR & (uint32_t) (~RCC_CFGR_SW)) | RCC_CFGR_SW_HSI;
|
||||
|
||||
/* wait until HSI clock is used */
|
||||
while ((RCC->CFGR & RCC_CFGR_SWS) != RCC_CFGR_SWS_HSI)
|
||||
;
|
||||
}
|
||||
|
||||
/* disable PLL */
|
||||
RCC->CR &= (uint32_t)(~RCC_CR_PLLON);
|
||||
/* wait until PLL is inactive */
|
||||
while((RCC->CR & RCC_CR_PLLRDY) != 0)
|
||||
;
|
||||
|
||||
/* set latency to 1 wait state */
|
||||
FLASH->ACR |= FLASH_ACR_LATENCY;
|
||||
|
||||
/* At this point the HSI runs with 4 MHz */
|
||||
/* Multiply by 16 device by 2 --> 32 MHz */
|
||||
RCC->CFGR = (RCC->CFGR & (~(RCC_CFGR_PLLMUL| RCC_CFGR_PLLDIV ))) | (RCC_CFGR_PLLMUL16 | RCC_CFGR_PLLDIV2);
|
||||
|
||||
/* enable PLL */
|
||||
RCC->CR |= RCC_CR_PLLON;
|
||||
|
||||
/* wait until the PLL is ready */
|
||||
while ((RCC->CR & RCC_CR_PLLRDY) == 0)
|
||||
;
|
||||
|
||||
/* use the PLL has clock source */
|
||||
RCC->CFGR |= (uint32_t) (RCC_CFGR_SW_PLL);
|
||||
/* wait until the PLL source is active */
|
||||
while ((RCC->CFGR & RCC_CFGR_SWS) != RCC_CFGR_SWS_PLL)
|
||||
;
|
||||
}
|
||||
|
||||
void initGPIO(void)
|
||||
{
|
||||
RCC->IOPENR |= RCC_IOPENR_IOPAEN; /* Enable clock for GPIO Port A */
|
||||
__NOP();
|
||||
__NOP();
|
||||
|
||||
|
||||
GPIOA->MODER &= ~GPIO_MODER_MODE14; /* clear mode */
|
||||
GPIOA->MODER |= GPIO_MODER_MODE14_0; /* Output mode */
|
||||
GPIOA->OTYPER &= ~GPIO_OTYPER_OT_14; /* no Push/Pull */
|
||||
GPIOA->OSPEEDR &= ~GPIO_OSPEEDER_OSPEED14; /* low speed */
|
||||
GPIOA->PUPDR &= ~GPIO_PUPDR_PUPD14; /* no pullup/pulldown */
|
||||
GPIOA->BSRR = GPIO_BSRR_BR_14; /* atomic clr */
|
||||
|
||||
GPIOA->MODER &= ~GPIO_MODER_MODE13; /* clear mode */
|
||||
GPIOA->MODER |= GPIO_MODER_MODE13_0; /* Output mode */
|
||||
GPIOA->OTYPER &= ~GPIO_OTYPER_OT_13; /* no Push/Pull */
|
||||
GPIOA->OSPEEDR &= ~GPIO_OSPEEDER_OSPEED13; /* low speed */
|
||||
GPIOA->PUPDR &= ~GPIO_PUPDR_PUPD13; /* no pullup/pulldown */
|
||||
GPIOA->BSRR = GPIO_BSRR_BR_13; /* atomic clr */
|
||||
|
||||
GPIOA->MODER &= ~GPIO_MODER_MODE7; /* clear mode */
|
||||
GPIOA->MODER |= GPIO_MODER_MODE7_0; /* Output mode */
|
||||
GPIOA->OTYPER &= ~GPIO_OTYPER_OT_7; /* no Push/Pull */
|
||||
GPIOA->OSPEEDR &= ~GPIO_OSPEEDER_OSPEED7; /* low speed */
|
||||
GPIOA->PUPDR &= ~GPIO_PUPDR_PUPD7; /* no pullup/pulldown */
|
||||
GPIOA->BSRR = GPIO_BSRR_BR_7; /* atomic clr */
|
||||
|
||||
GPIOA->MODER &= ~GPIO_MODER_MODE6; /* clear mode */
|
||||
GPIOA->MODER |= GPIO_MODER_MODE6_0; /* Output mode */
|
||||
GPIOA->OTYPER &= ~GPIO_OTYPER_OT_6; /* no Push/Pull */
|
||||
GPIOA->OSPEEDR &= ~GPIO_OSPEEDER_OSPEED6; /* low speed */
|
||||
GPIOA->PUPDR &= ~GPIO_PUPDR_PUPD6; /* no pullup/pulldown */
|
||||
GPIOA->BSRR = GPIO_BSRR_BR_6; /* atomic clr */
|
||||
|
||||
GPIOA->MODER &= ~GPIO_MODER_MODE5; /* clear mode */
|
||||
GPIOA->MODER |= GPIO_MODER_MODE5_0; /* Output mode */
|
||||
GPIOA->OTYPER &= ~GPIO_OTYPER_OT_5; /* no Push/Pull */
|
||||
GPIOA->OSPEEDR &= ~GPIO_OSPEEDER_OSPEED5; /* low speed */
|
||||
GPIOA->PUPDR &= ~GPIO_PUPDR_PUPD5; /* no pullup/pulldown */
|
||||
GPIOA->BSRR = GPIO_BSRR_BR_5; /* atomic clr */
|
||||
|
||||
GPIOA->MODER &= ~GPIO_MODER_MODE4; /* clear mode */
|
||||
GPIOA->MODER |= GPIO_MODER_MODE4_0; /* Output mode */
|
||||
GPIOA->OTYPER &= ~GPIO_OTYPER_OT_4; /* no Push/Pull */
|
||||
GPIOA->OSPEEDR &= ~GPIO_OSPEEDER_OSPEED4; /* low speed */
|
||||
GPIOA->PUPDR &= ~GPIO_PUPDR_PUPD4; /* no pullup/pulldown */
|
||||
GPIOA->BSRR = GPIO_BSRR_BR_4; /* atomic clr */
|
||||
|
||||
GPIOA->MODER &= ~GPIO_MODER_MODE1; /* clear mode */
|
||||
GPIOA->MODER |= GPIO_MODER_MODE1_0; /* Output mode */
|
||||
GPIOA->OTYPER &= ~GPIO_OTYPER_OT_1; /* no Push/Pull */
|
||||
GPIOA->OSPEEDR &= ~GPIO_OSPEEDER_OSPEED1; /* low speed */
|
||||
GPIOA->PUPDR &= ~GPIO_PUPDR_PUPD1; /* no pullup/pulldown */
|
||||
GPIOA->BSRR = GPIO_BSRR_BR_1; /* atomic clr */
|
||||
|
||||
GPIOA->MODER &= ~GPIO_MODER_MODE0; /* clear mode */
|
||||
GPIOA->MODER |= GPIO_MODER_MODE0_0; /* Output mode */
|
||||
GPIOA->OTYPER &= ~GPIO_OTYPER_OT_0; /* no Push/Pull */
|
||||
GPIOA->OSPEEDR &= ~GPIO_OSPEEDER_OSPEED0; /* low speed */
|
||||
GPIOA->PUPDR &= ~GPIO_PUPDR_PUPD0; /* no pullup/pulldown */
|
||||
GPIOA->BSRR = GPIO_BSRR_BR_0; /* atomic clr */
|
||||
|
||||
}
|
||||
|
||||
void clearGPIO(void)
|
||||
{
|
||||
GPIOA->BSRR = GPIO_BSRR_BR_14
|
||||
| GPIO_BSRR_BR_13
|
||||
| GPIO_BSRR_BR_7
|
||||
| GPIO_BSRR_BR_6
|
||||
| GPIO_BSRR_BR_5
|
||||
| GPIO_BSRR_BR_4
|
||||
| GPIO_BSRR_BR_1
|
||||
| GPIO_BSRR_BR_0;
|
||||
}
|
||||
|
||||
/*
|
||||
0: PA14
|
||||
1: PA13
|
||||
2: PA7
|
||||
3: PA6
|
||||
4: PA5
|
||||
5: PA4
|
||||
6: PA1
|
||||
7: PA0
|
||||
*/
|
||||
void setGPIO( uint8_t n )
|
||||
{
|
||||
clearGPIO();
|
||||
switch(n)
|
||||
{
|
||||
case 0: GPIOA->BSRR = GPIO_BSRR_BS_14; break;
|
||||
case 1: GPIOA->BSRR = GPIO_BSRR_BS_13; break;
|
||||
case 2: GPIOA->BSRR = GPIO_BSRR_BS_7; break;
|
||||
case 3: GPIOA->BSRR = GPIO_BSRR_BS_6; break;
|
||||
case 4: GPIOA->BSRR = GPIO_BSRR_BS_5; break;
|
||||
case 5: GPIOA->BSRR = GPIO_BSRR_BS_4; break;
|
||||
case 6: GPIOA->BSRR = GPIO_BSRR_BS_1; break;
|
||||
case 7: GPIOA->BSRR = GPIO_BSRR_BS_0; break;
|
||||
|
||||
}
|
||||
}
|
||||
|
||||
void setAllGPIO(void)
|
||||
{
|
||||
GPIOA->BSRR = GPIO_BSRR_BS_14
|
||||
| GPIO_BSRR_BS_13
|
||||
| GPIO_BSRR_BS_7
|
||||
| GPIO_BSRR_BS_6
|
||||
| GPIO_BSRR_BS_5
|
||||
| GPIO_BSRR_BS_4
|
||||
| GPIO_BSRR_BS_1
|
||||
| GPIO_BSRR_BS_0;
|
||||
}
|
||||
|
||||
int main()
|
||||
{
|
||||
uint8_t i;
|
||||
initGPIO();
|
||||
|
||||
setHSIClock();
|
||||
|
||||
i2c_init(2*17);
|
||||
|
||||
SysTick->LOAD = 32000*100 - 1; // 100 ms
|
||||
SysTick->VAL = 0;
|
||||
SysTick->CTRL = 7; /* enable, generate interrupt (SysTick_Handler), do not divide by 2 */
|
||||
|
||||
|
||||
/*
|
||||
for(;;)
|
||||
{
|
||||
delay_system_ticks(32000*200);
|
||||
setGPIO(7);
|
||||
delay_system_ticks(32000*200);
|
||||
clearGPIO();
|
||||
}
|
||||
*/
|
||||
|
||||
for( i = 0; i < 8; i++ )
|
||||
addCmdToGPIOQueue(i);
|
||||
|
||||
for(;;)
|
||||
{
|
||||
processQueue();
|
||||
}
|
||||
|
||||
}
|
||||
@@ -0,0 +1,245 @@
|
||||
/*
|
||||
|
||||
stm32l031x6.ld
|
||||
|
||||
Modified for stm32l0 from the original nokeep.ld script from the
|
||||
arm-none-eabi examples by olikraus@gmail.com
|
||||
|
||||
Assuming, that the original nokeep.ld file is available under
|
||||
the GNU General Public License, this file is available under the
|
||||
same license.
|
||||
|
||||
There are three modifications:
|
||||
|
||||
1. Provide symbols for the stm32l0 startup code
|
||||
|
||||
The following symbols are required for the stm32l0 startup
|
||||
code (e.g. startup_stm32l031xx.s)
|
||||
|
||||
_sidata start address for the initialization values of the .data section
|
||||
_sdata start address for the .data section. defined in linker script
|
||||
_edata end address for the .data section. defined in linker script
|
||||
_sbss start address for the .bss section. defined in linker script
|
||||
_ebss end address for the .bss section. defined in linker script
|
||||
_estack top address of the stack
|
||||
|
||||
2. Stack size estimation / calculation
|
||||
|
||||
_Stack_Size has been added to allow better stack size calculation
|
||||
|
||||
3. KEEP keywords
|
||||
|
||||
Additionall KEEPs added for .init and .fini. Without this KEEP the
|
||||
generated code will not work, because of the missing _init function.
|
||||
|
||||
4. Bugfix: Allign the end of the flash area
|
||||
|
||||
*/
|
||||
|
||||
_Stack_Size = 0x400; /* stm32l0: estimated amount of stack */
|
||||
|
||||
|
||||
/* Linker script to configure memory regions.
|
||||
* Need modifying for a specific board.
|
||||
* FLASH.ORIGIN: starting address of flash
|
||||
* FLASH.LENGTH: length of flash
|
||||
* RAM.ORIGIN: starting address of RAM bank 0
|
||||
* RAM.LENGTH: length of RAM bank 0
|
||||
*/
|
||||
MEMORY
|
||||
{
|
||||
FLASH (rx) : ORIGIN = 0x8000000, LENGTH = 32K
|
||||
RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 8K
|
||||
}
|
||||
|
||||
/* Linker script to place sections and symbol values. Should be used together
|
||||
* with other linker script that defines memory regions FLASH and RAM.
|
||||
* It references following symbols, which must be defined in code:
|
||||
* Reset_Handler : Entry of reset handler
|
||||
*
|
||||
* It defines following symbols, which code can use without definition:
|
||||
* __exidx_start
|
||||
* __exidx_end
|
||||
* __copy_table_start__
|
||||
* __copy_table_end__
|
||||
* __zero_table_start__
|
||||
* __zero_table_end__
|
||||
* __etext
|
||||
* __data_start__
|
||||
* __preinit_array_start
|
||||
* __preinit_array_end
|
||||
* __init_array_start
|
||||
* __init_array_end
|
||||
* __fini_array_start
|
||||
* __fini_array_end
|
||||
* __data_end__
|
||||
* __bss_start__
|
||||
* __bss_end__
|
||||
* __end__
|
||||
* end
|
||||
* __HeapLimit
|
||||
* __StackLimit
|
||||
* __StackTop
|
||||
* __stack
|
||||
*/
|
||||
ENTRY(Reset_Handler)
|
||||
|
||||
SECTIONS
|
||||
{
|
||||
.text :
|
||||
{
|
||||
KEEP(*(.isr_vector))
|
||||
*(.text*)
|
||||
|
||||
/* the st32l0 startup code calls __libc_init_array, which calls the _init */
|
||||
/* ... sooo.... better keep the init and fini sections */
|
||||
|
||||
KEEP ( *(.init) )
|
||||
KEEP ( *(.fini) )
|
||||
|
||||
/* .ctors */
|
||||
*crtbegin.o(.ctors)
|
||||
*crtbegin?.o(.ctors)
|
||||
*(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors)
|
||||
*(SORT(.ctors.*))
|
||||
*(.ctors)
|
||||
|
||||
/* .dtors */
|
||||
*crtbegin.o(.dtors)
|
||||
*crtbegin?.o(.dtors)
|
||||
*(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors)
|
||||
*(SORT(.dtors.*))
|
||||
*(.dtors)
|
||||
|
||||
*(.rodata*)
|
||||
|
||||
*(.eh_frame*)
|
||||
|
||||
/* allign the end of the flash area */
|
||||
. = ALIGN(4);
|
||||
} > FLASH
|
||||
|
||||
.ARM.extab :
|
||||
{
|
||||
*(.ARM.extab* .gnu.linkonce.armextab.*)
|
||||
} > FLASH
|
||||
|
||||
__exidx_start = .;
|
||||
.ARM.exidx :
|
||||
{
|
||||
*(.ARM.exidx* .gnu.linkonce.armexidx.*)
|
||||
} > FLASH
|
||||
__exidx_end = .;
|
||||
|
||||
/* To copy multiple ROM to RAM sections,
|
||||
* uncomment .copy.table section and,
|
||||
* define __STARTUP_COPY_MULTIPLE in startup_ARMCMx.S */
|
||||
/*
|
||||
.copy.table :
|
||||
{
|
||||
. = ALIGN(4);
|
||||
__copy_table_start__ = .;
|
||||
LONG (__etext)
|
||||
LONG (__data_start__)
|
||||
LONG (__data_end__ - __data_start__)
|
||||
LONG (__etext2)
|
||||
LONG (__data2_start__)
|
||||
LONG (__data2_end__ - __data2_start__)
|
||||
__copy_table_end__ = .;
|
||||
} > FLASH
|
||||
*/
|
||||
|
||||
/* To clear multiple BSS sections,
|
||||
* uncomment .zero.table section and,
|
||||
* define __STARTUP_CLEAR_BSS_MULTIPLE in startup_ARMCMx.S */
|
||||
/*
|
||||
.zero.table :
|
||||
{
|
||||
. = ALIGN(4);
|
||||
__zero_table_start__ = .;
|
||||
LONG (__bss_start__)
|
||||
LONG (__bss_end__ - __bss_start__)
|
||||
LONG (__bss2_start__)
|
||||
LONG (__bss2_end__ - __bss2_start__)
|
||||
__zero_table_end__ = .;
|
||||
} > FLASH
|
||||
*/
|
||||
|
||||
__etext = .;
|
||||
_sidata = .; /* for stm32l0 startup code */
|
||||
|
||||
.data : AT (__etext)
|
||||
{
|
||||
__data_start__ = .;
|
||||
_sdata = .; /* for stm32l0 startup code */
|
||||
*(vtable)
|
||||
*(.data*)
|
||||
|
||||
. = ALIGN(4);
|
||||
/* preinit data */
|
||||
PROVIDE_HIDDEN (__preinit_array_start = .);
|
||||
*(.preinit_array)
|
||||
PROVIDE_HIDDEN (__preinit_array_end = .);
|
||||
|
||||
. = ALIGN(4);
|
||||
/* init data */
|
||||
PROVIDE_HIDDEN (__init_array_start = .);
|
||||
*(SORT(.init_array.*))
|
||||
*(.init_array)
|
||||
PROVIDE_HIDDEN (__init_array_end = .);
|
||||
|
||||
|
||||
. = ALIGN(4);
|
||||
/* finit data */
|
||||
PROVIDE_HIDDEN (__fini_array_start = .);
|
||||
*(SORT(.fini_array.*))
|
||||
*(.fini_array)
|
||||
PROVIDE_HIDDEN (__fini_array_end = .);
|
||||
|
||||
*(.jcr)
|
||||
. = ALIGN(4);
|
||||
/* All data end */
|
||||
__data_end__ = .;
|
||||
_edata = .; /* for stm32l0 startup code */
|
||||
|
||||
} > RAM
|
||||
|
||||
.bss :
|
||||
{
|
||||
. = ALIGN(4);
|
||||
__bss_start__ = .;
|
||||
_sbss = .; /* for stm32l0 startup code */
|
||||
*(.bss*)
|
||||
*(COMMON)
|
||||
. = ALIGN(4);
|
||||
__bss_end__ = .;
|
||||
_ebss = .; /* for stm32l0 startup code */
|
||||
} > RAM
|
||||
|
||||
.heap (COPY):
|
||||
{
|
||||
__end__ = .;
|
||||
PROVIDE(end = .);
|
||||
*(.heap*)
|
||||
__HeapLimit = .;
|
||||
} > RAM
|
||||
|
||||
/* .stack_dummy section doesn't contains any symbols. It is only
|
||||
* used for linker to calculate size of stack sections, and assign
|
||||
* values to stack symbols later */
|
||||
.stack_dummy (COPY):
|
||||
{
|
||||
*(.stack*)
|
||||
. = . + _Stack_Size; /* estimated stack size */
|
||||
} > RAM
|
||||
|
||||
/* Set stack top to end of RAM, and stack limit move down by
|
||||
* size of stack_dummy section */
|
||||
__StackTop = ORIGIN(RAM) + LENGTH(RAM);
|
||||
_estack = __StackTop; /* for stm32l0 startup code */
|
||||
__StackLimit = __StackTop - SIZEOF(.stack_dummy);
|
||||
PROVIDE(__stack = __StackTop);
|
||||
|
||||
/* Check if data + heap + stack exceeds RAM limit */
|
||||
ASSERT(__StackLimit >= __HeapLimit, "region RAM overflowed with stack")
|
||||
}
|
||||
Reference in New Issue
Block a user