/* Example for the STM32L031 Eval Board with 128x64 OLED at PA13/PA14 */ #include #include "stm32l031xx.h" #include "delay.h" #include "u8x8.h" /*=======================================================================*/ /* external functions */ uint8_t u8x8_gpio_and_delay_stm32l0(u8x8_t *u8x8, uint8_t msg, uint8_t arg_int, void *arg_ptr); /*=======================================================================*/ /* global variables */ u8x8_t u8x8; // u8x8 object uint8_t u8x8_x, u8x8_y; // current position on the screen volatile unsigned long SysTickCount = 0; /*=======================================================================*/ void __attribute__ ((interrupt, used)) SysTick_Handler(void) { SysTickCount++; } void setHSIClock() { /* test if the current clock source is something else than HSI */ if ((RCC->CFGR & RCC_CFGR_SWS) != RCC_CFGR_SWS_HSI) { /* enable HSI */ RCC->CR |= RCC_CR_HSION; /* wait until HSI becomes ready */ while ( (RCC->CR & RCC_CR_HSIRDY) == 0 ) ; /* enable the HSI "divide by 4" bit */ RCC->CR |= (uint32_t)(RCC_CR_HSIDIVEN); /* wait until the "divide by 4" flag is enabled */ while((RCC->CR & RCC_CR_HSIDIVF) == 0) ; /* then use the HSI clock */ RCC->CFGR = (RCC->CFGR & (uint32_t) (~RCC_CFGR_SW)) | RCC_CFGR_SW_HSI; /* wait until HSI clock is used */ while ((RCC->CFGR & RCC_CFGR_SWS) != RCC_CFGR_SWS_HSI) ; } /* disable PLL */ RCC->CR &= (uint32_t)(~RCC_CR_PLLON); /* wait until PLL is inactive */ while((RCC->CR & RCC_CR_PLLRDY) != 0) ; /* set latency to 1 wait state */ FLASH->ACR |= FLASH_ACR_LATENCY; /* At this point the HSI runs with 4 MHz */ /* Multiply by 16 device by 2 --> 32 MHz */ RCC->CFGR = (RCC->CFGR & (~(RCC_CFGR_PLLMUL| RCC_CFGR_PLLDIV ))) | (RCC_CFGR_PLLMUL16 | RCC_CFGR_PLLDIV2); /* enable PLL */ RCC->CR |= RCC_CR_PLLON; /* wait until the PLL is ready */ while ((RCC->CR & RCC_CR_PLLRDY) == 0) ; /* use the PLL has clock source */ RCC->CFGR |= (uint32_t) (RCC_CFGR_SW_PLL); /* wait until the PLL source is active */ while ((RCC->CFGR & RCC_CFGR_SWS) != RCC_CFGR_SWS_PLL) ; SystemCoreClockUpdate(); /* Update SystemCoreClock global variable */ } /* Enable several power regions: PWR, GPIOA This must be executed after each reset. */ void startUp(void) { RCC->IOPENR |= RCC_IOPENR_IOPAEN; /* Enable clock for GPIO Port A */ RCC->APB1ENR |= RCC_APB1ENR_PWREN; /* enable power interface (PWR) */ PWR->CR |= PWR_CR_DBP; /* activate write access to RCC->CSR and RTC */ SysTick->LOAD = (SystemCoreClock/1000)*50 - 1; /* 50ms task */ SysTick->VAL = 0; SysTick->CTRL = 7; /* enable, generate interrupt (SysTick_Handler), do not divide by 2 */ } /*=======================================================================*/ /* u8x8 display procedures */ void initDisplay(void) { u8x8_Setup(&u8x8, u8x8_d_ssd1306_128x64_noname, u8x8_cad_ssd13xx_i2c, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_stm32l0); u8x8_InitDisplay(&u8x8); u8x8_ClearDisplay(&u8x8); u8x8_SetPowerSave(&u8x8, 0); u8x8_SetFont(&u8x8, u8x8_font_amstrad_cpc_extended_r); u8x8_x = 0; u8x8_y = 0; } void outChar(uint8_t c) { if ( u8x8_x >= u8x8_GetCols(&u8x8) ) { u8x8_x = 0; u8x8_y++; } u8x8_DrawGlyph(&u8x8, u8x8_x, u8x8_y, c); u8x8_x++; } void outStr(const char *s) { while( *s ) outChar(*s++); } void outHexHalfByte(uint8_t b) { b &= 0x0f; if ( b < 10 ) outChar(b+'0'); else outChar(b+'a'-10); } void outHex8(uint8_t b) { outHexHalfByte(b >> 4); outHexHalfByte(b); } void outHex16(uint16_t v) { outHex8(v>>8); outHex8(v); } void outHex32(uint32_t v) { outHex16(v>>16); outHex16(v); } void setRow(uint8_t r) { u8x8_x = 0; u8x8_y = r; } /*=======================================================================*/ int main() { setHSIClock(); /* enable 32 MHz Clock */ startUp(); /* enable systick irq and several power regions */ initDisplay(); /* aktivate display */ setRow(0); outStr("Hello World!"); setRow(2); outStr("RCC_CSR:"); outHex32(RCC->CSR); setRow(3); outStr("PWR_CSR:"); outHex32(PWR->CSR); for(;;) { } }