mirror of
https://github.com/Valeh2012/PersonalVotingMachine
synced 2024-11-26 02:40:59 +02:00
389 lines
9.0 KiB
C
389 lines
9.0 KiB
C
/* STM32L031 Eval Board: I2C Test */
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#include "stm32l031xx.h"
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#include "delay.h"
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#include "u8x8.h"
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/*=======================================================================*/
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/* external functions */
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uint8_t u8x8_gpio_and_delay_stm32l0(u8x8_t *u8x8, uint8_t msg, uint8_t arg_int, void *arg_ptr);
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/*=======================================================================*/
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/* global variables */
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u8x8_t u8x8; // u8x8 object
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uint8_t u8x8_x, u8x8_y; // current position on the screen
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volatile unsigned long SysTickCount = 0;
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/*=======================================================================*/
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void __attribute__ ((interrupt, used)) SysTick_Handler(void)
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{
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SysTickCount++;
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}
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void setHSIClock()
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{
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/* test if the current clock source is something else than HSI */
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if ((RCC->CFGR & RCC_CFGR_SWS) != RCC_CFGR_SWS_HSI)
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{
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/* enable HSI */
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RCC->CR |= RCC_CR_HSION;
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/* wait until HSI becomes ready */
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while ( (RCC->CR & RCC_CR_HSIRDY) == 0 )
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;
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/* enable the HSI "divide by 4" bit */
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RCC->CR |= (uint32_t)(RCC_CR_HSIDIVEN);
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/* wait until the "divide by 4" flag is enabled */
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while((RCC->CR & RCC_CR_HSIDIVF) == 0)
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;
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/* then use the HSI clock */
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RCC->CFGR = (RCC->CFGR & (uint32_t) (~RCC_CFGR_SW)) | RCC_CFGR_SW_HSI;
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/* wait until HSI clock is used */
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while ((RCC->CFGR & RCC_CFGR_SWS) != RCC_CFGR_SWS_HSI)
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;
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}
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/* disable PLL */
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RCC->CR &= (uint32_t)(~RCC_CR_PLLON);
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/* wait until PLL is inactive */
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while((RCC->CR & RCC_CR_PLLRDY) != 0)
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;
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/* set latency to 1 wait state */
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FLASH->ACR |= FLASH_ACR_LATENCY;
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/* At this point the HSI runs with 4 MHz */
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/* Multiply by 16 device by 2 --> 32 MHz */
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RCC->CFGR = (RCC->CFGR & (~(RCC_CFGR_PLLMUL| RCC_CFGR_PLLDIV ))) | (RCC_CFGR_PLLMUL16 | RCC_CFGR_PLLDIV2);
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/* enable PLL */
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RCC->CR |= RCC_CR_PLLON;
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/* wait until the PLL is ready */
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while ((RCC->CR & RCC_CR_PLLRDY) == 0)
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;
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/* use the PLL has clock source */
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RCC->CFGR |= (uint32_t) (RCC_CFGR_SW_PLL);
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/* wait until the PLL source is active */
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while ((RCC->CFGR & RCC_CFGR_SWS) != RCC_CFGR_SWS_PLL)
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;
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}
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/*
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Enable several power regions: PWR, GPIOA
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This must be executed after each reset.
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*/
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void startUp(void)
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{
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RCC->IOPENR |= RCC_IOPENR_IOPAEN; /* Enable clock for GPIO Port A */
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RCC->APB1ENR |= RCC_APB1ENR_PWREN; /* enable power interface (PWR) */
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PWR->CR |= PWR_CR_DBP; /* activate write access to RCC->CSR and RTC */
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SysTick->LOAD = (SystemCoreClock/1000)*50 - 1; /* 50ms task */
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SysTick->VAL = 0;
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SysTick->CTRL = 7; /* enable, generate interrupt (SysTick_Handler), do not divide by 2 */
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}
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/*=======================================================================*/
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/* u8x8 display procedures */
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void initDisplay(void)
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{
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u8x8_Setup(&u8x8, u8x8_d_ssd1306_128x64_noname, u8x8_cad_ssd13xx_i2c, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_stm32l0);
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u8x8_InitDisplay(&u8x8);
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u8x8_ClearDisplay(&u8x8);
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u8x8_SetPowerSave(&u8x8, 0);
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u8x8_SetFont(&u8x8, u8x8_font_amstrad_cpc_extended_r);
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u8x8_x = 0;
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u8x8_y = 0;
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}
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void outChar(uint8_t c)
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{
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if ( u8x8_x >= u8x8_GetCols(&u8x8) )
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{
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u8x8_x = 0;
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u8x8_y++;
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}
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u8x8_DrawGlyph(&u8x8, u8x8_x, u8x8_y, c);
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u8x8_x++;
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}
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void outStr(const char *s)
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{
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while( *s )
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outChar(*s++);
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}
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void outHexHalfByte(uint8_t b)
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{
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b &= 0x0f;
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if ( b < 10 )
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outChar(b+'0');
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else
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outChar(b+'a'-10);
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}
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void outHex8(uint8_t b)
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{
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outHexHalfByte(b >> 4);
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outHexHalfByte(b);
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}
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void outHex16(uint16_t v)
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{
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outHex8(v>>8);
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outHex8(v);
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}
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void outHex32(uint32_t v)
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{
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outHex16(v>>16);
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outHex16(v);
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}
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void setRow(uint8_t r)
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{
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u8x8_x = 0;
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u8x8_y = r;
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}
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/*==============================================*/
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volatile unsigned char i2c_mem[256]; /* contains data, which read or written */
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volatile unsigned char i2c_idx; /* the current index into i2c_mem */
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volatile unsigned char i2c_is_write_idx; /* write state */
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volatile uint16_t i2c_total_irq_cnt;
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volatile uint16_t i2c_TXIS_cnt;
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volatile uint16_t i2c_RXNE_cnt;
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void i2c_mem_reset_write(void)
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{
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i2c_is_write_idx = 1;
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}
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void i2c_mem_init(void)
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{
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i2c_idx = 0;
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i2c_mem_reset_write();
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}
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void i2c_mem_set_index(unsigned char value)
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{
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i2c_idx = value;
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i2c_is_write_idx = 0;
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}
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void i2c_mem_write_via_index(unsigned char value)
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{
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i2c_mem[i2c_idx++] = value;
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}
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unsigned char i2c_mem_read(void)
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{
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i2c_mem_reset_write();
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i2c_idx++;
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return i2c_mem[i2c_idx];
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}
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void i2c_mem_write(unsigned char value)
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{
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if ( i2c_is_write_idx != 0 )
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{
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i2c_mem_set_index(value);
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}
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else
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{
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i2c_is_write_idx = 0;
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i2c_mem_write_via_index(value);
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}
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}
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/* address: I2C address multiplied by 2 */
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/* Pins PA9 (SCL) and PA10 (SDA) */
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void i2c_hw_init(unsigned char address)
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{
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RCC->APB1ENR |= RCC_APB1ENR_I2C1EN; /* Enable clock for I2C */
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RCC->IOPENR |= RCC_IOPENR_IOPAEN; /* Enable clock for GPIO Port A */
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__NOP(); /* extra delay for clock stabilization required? */
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__NOP();
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/* configure io */
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GPIOA->MODER &= ~GPIO_MODER_MODE9; /* clear mode for PA9 */
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GPIOA->MODER |= GPIO_MODER_MODE9_1; /* alt fn */
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GPIOA->OTYPER |= GPIO_OTYPER_OT_9; /* open drain */
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GPIOA->AFR[1] &= ~(15<<4); /* Clear Alternate Function PA9 */
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GPIOA->AFR[1] |= 1<<4; /* I2C Alternate Function PA9 */
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GPIOA->MODER &= ~GPIO_MODER_MODE10; /* clear mode for PA10 */
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GPIOA->MODER |= GPIO_MODER_MODE10_1; /* alt fn */
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GPIOA->OTYPER |= GPIO_OTYPER_OT_10; /* open drain */
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GPIOA->AFR[1] &= ~(15<<8); /* Clear Alternate Function PA10 */
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GPIOA->AFR[1] |= 1<<8; /* I2C Alternate Function PA10 */
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RCC->CCIPR &= ~RCC_CCIPR_I2C1SEL; /* write 00 to the I2C clk selection register */
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RCC->CCIPR |= RCC_CCIPR_I2C1SEL_0; /* select system clock (01) */
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/* I2C init flow chart: Clear PE bit */
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I2C1->CR1 &= ~I2C_CR1_PE;
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/* I2C init flow chart: Configure filter */
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/* leave at defaults */
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/* I2C init flow chart: Configure timing */
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/*
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standard mode 100kHz configuration
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SYSCLK = I2CCLK = 32 MHz
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PRESC = 6 bits 28..31
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SCLL = 0x13 bits 0..7
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SCLH = 0x0f bits 8..15
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SDADEL = 0x02 bits 16..19
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SCLDEL = 0x04 bits 20..23
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*/
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I2C1->TIMINGR = 0x60420f13;
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/* I2C init flow chart: Configure NOSTRECH */
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I2C1->CR1 |= I2C_CR1_NOSTRETCH;
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/* I2C init flow chart: Enable I2C */
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I2C1->CR1 |= I2C_CR1_PE;
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/* disable OAR1 for reconfiguration */
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I2C1->OAR1 &= ~I2C_OAR1_OA1EN;
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I2C1->OAR1 = address;
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I2C1->OAR1 |= I2C_OAR1_OA1EN;
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/* enable interrupts */
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I2C1->CR1 |= I2C_CR1_STOPIE;
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I2C1->CR1 |= I2C_CR1_NACKIE;
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//I2C1->CR1 |= I2C_CR1_ADDRIE;
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I2C1->CR1 |= I2C_CR1_RXIE;
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I2C1->CR1 |= I2C_CR1_TXIE;
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/* load first value into TXDR register */
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I2C1->TXDR = i2c_mem[i2c_idx];
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/* enable IRQ in NVIC */
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NVIC_SetPriority(I2C1_IRQn, 0);
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NVIC_EnableIRQ(I2C1_IRQn);
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}
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void i2c_init()
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{
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i2c_mem_init();
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i2c_hw_init(7*2);
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}
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void __attribute__ ((interrupt, used)) I2C1_IRQHandler(void)
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{
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unsigned long isr = I2C1->ISR;
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i2c_total_irq_cnt ++;
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if ( isr & I2C_ISR_TXIS )
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{
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i2c_TXIS_cnt++;
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I2C1->TXDR = i2c_mem_read();
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}
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else if ( isr & I2C_ISR_RXNE )
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{
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i2c_RXNE_cnt++;
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i2c_mem_write(I2C1->RXDR);
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I2C1->ISR |= I2C_ISR_TXE; // allow overwriting the TCDR with new data
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I2C1->TXDR = i2c_mem[i2c_idx];
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}
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else if ( isr & I2C_ISR_STOPF )
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{
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I2C1->ICR = I2C_ICR_STOPCF;
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I2C1->ISR |= I2C_ISR_TXE; // allow overwriting the TCDR with new data
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I2C1->TXDR = i2c_mem[i2c_idx];
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i2c_mem_reset_write();
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}
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else if ( isr & I2C_ISR_NACKF )
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{
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I2C1->ICR = I2C_ICR_NACKCF;
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I2C1->ISR |= I2C_ISR_TXE; // allow overwriting the TCDR with new data
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I2C1->TXDR = i2c_mem[i2c_idx];
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i2c_mem_reset_write();
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}
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else if ( isr & I2C_ISR_ADDR )
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{
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/* not required, the addr match interrupt is not enabled */
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I2C1->ICR = I2C_ICR_ADDRCF;
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I2C1->ISR |= I2C_ISR_TXE; // allow overwriting the TCDR with new data
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I2C1->TXDR = i2c_mem[i2c_idx];
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i2c_mem_reset_write();
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}
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/* if at any time the addr match is set, clear the flag */
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/* not sure, whether this is required */
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if ( isr & I2C_ISR_ADDR )
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{
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I2C1->ICR = I2C_ICR_ADDRCF;
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}
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}
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/*==============================================*/
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int main()
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{
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setHSIClock();
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startUp();
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initDisplay(); /* aktivate display */
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i2c_init();
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__enable_irq();
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setRow(0); outStr("Hello World!");
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for(;;)
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{
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setRow(2); outHex32(SysTickCount);
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setRow(3); outHex16(i2c_total_irq_cnt);
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setRow(4); outHex16(i2c_TXIS_cnt); outStr(" "); outHex16(i2c_RXNE_cnt);
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setRow(5); outStr("I2C_ISR:"); outHex32(I2C1->ISR);
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setRow(6); outStr("idx: "); outHex8(i2c_idx);
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setRow(7); outHex8(i2c_mem[0]); outStr(" "); outHex8(i2c_mem[1]); outStr(" "); outHex8(i2c_mem[2]);
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}
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}
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