From dfc2cbe198122bd6c0c164d407f8c10cae978c90 Mon Sep 17 00:00:00 2001
From: Arti Zirk <arti.zirk@gmail.com>
Date: Sun, 30 Apr 2023 21:38:25 +0300
Subject: [PATCH] Remap pins for soldered version

---
 main.c      | 12 ++++++------
 openocd.cfg |  2 +-
 2 files changed, 7 insertions(+), 7 deletions(-)

diff --git a/main.c b/main.c
index 538a4db..3ce62f5 100644
--- a/main.c
+++ b/main.c
@@ -32,14 +32,14 @@
 #define DHT_PIN  GPIO0
 
 #define SEGMENT_PORT GPIOA
-#define SEGMENT_A GPIO7
-#define SEGMENT_B GPIO5
-#define SEGMENT_C GPIO2
+#define SEGMENT_A GPIO5
+#define SEGMENT_B GPIO3
+#define SEGMENT_C GPIO6
 #define SEGMENT_D GPIO0
 #define SEGMENT_E GPIO1
-#define SEGMENT_F GPIO3
-#define SEGMENT_G GPIO6
-#define SEGMENT_DOT GPIO4
+#define SEGMENT_F GPIO7
+#define SEGMENT_G GPIO4
+#define SEGMENT_DOT GPIO2
 #define SEGMENT_ALL GPIO0 | GPIO1 | GPIO2 | GPIO3 | GPIO4 | GPIO5 | GPIO6 | GPIO7 | GPIO4
 #define COMMON_PORT GPIOB
 #define COMMON_ALL GPIO15 | GPIO14 | GPIO13 | GPIO12 | GPIO11
diff --git a/openocd.cfg b/openocd.cfg
index 98c3032..dd90553 100644
--- a/openocd.cfg
+++ b/openocd.cfg
@@ -20,7 +20,7 @@ ftdi_layout_signal nSRST -ndata 0x0020 -noe 0x0040
 
 source [find target/stm32f1x.cfg]
 
-reset_config srst_only
+#reset_config srst_only
 
 # Search for RTT string from start of RAM
 rtt setup 0x20000000 8192 "SEGGER RTT"