From parry@hobbs.asd.sgi.com  Thu Jan 13 13:56:20 1994
Status: RO

Jeff,

    I mentioned yesterday that we should test the hardware with more
aggressive settings for the programmable read/write levels.  Kianoosh and I
developed some formulas for setting these based on the frequency ratio a
while back.  Each of these levels are programmed with fields in the GCache
Control register.  Here are the formulas:


First, let R = proc_freq/sysad_freq


1. Read_Resp_Full_Level - controls when CC begins to read data out of
   read_response or prefetch_response buffer with respect to when CC begins
   to receive response data on sysad and write it to this buffer.  Setting
   should be: 

     rr_level = floor[(47R-28)/3R]

2. Release_Delay - controls when CC asserts RELEASE on the sysad with
   respect to when CC begins reading data out of prefetch_response buffer when
   the release is for a subsequent prefetch which will overwrite the buffer.
   Setting should be: 

     rel_delay = max{floor[17-27.5R],floor[10-3R]}

3. WB_Restart_Level - controls when CC will start reading data out of the
   GCache to write to the writeback buffer with respect to the CC begins
   reading data out of the buffer for a previous writeback.  Setting should
   be: 
     
     wb_level = ceiling[15 - 19/R]



Kianoosh and Waidy - could you verify that you agree with the above and
that this is how the counters are programmed in the regression suite?

 
     thanks,
        dp


