# This is an ide startup file.
report=1

# THE FOLLOWING IS THE STARTUP SCRIPT FOR THE GRAPHICS DIAGNOSTICS.

gr1 {
buffon
initgr
$failed=0

# Microcode RAM address uniqueness test
if (urama) $failed=1

# Microcode RAM walking-bit test
#if (uramd) $failed=1

# Data RAM address uniqueness test (from host)
if (drama) $failed=1

# Data RAM walking-bit test
#if (dramd) $failed=1

# FIFO test
if (fifo) $failed=1

# Download the diagnostic microcode
ge5load

# Data RAM address uniqueness test (implemented in microcode)
if (drama2) $failed=1

# Download the diagnostic microcode
ge5load

# CPU to GE5 and GE5 to CPU DMA test
if (gedma) $failed=1

# Test of the XMAPs
if (xmap) $failed=1

# Test of the DACs
if (dac) $failed=1


# Initialize graphics board (to prepare for displaying)
initgr

# Raster Engine test
if (re) $failed=1

# Test GRF chip functionality
if (gefifo) $failed=1
if (finflgs) $failed=1
if (redma) $failed=1

initgr
$bpfailed=0
# Test of the bitplane expansion board.
$bpfailed= bitp b

$zfailed=0
# Test of the z-buffer board.
$zfailed= bitp z 

resetcons
buffoff

if ($failed) echo "ERROR:  Failure detected on GRAPHICS board."
else echo "Graphics board tests passed."
fi
if ($bpfailed) echo "ERROR:  Failure detected on BITPLANE board."
else echo "Bitplane board tests passed."
fi
if ($zfailed) echo "ERROR:  Failure detected on Z-BUFFER board."
else echo "Z-buffer board tests passed."
fi
}

# THE FOLLOWING IS THE STARTUP SCRIPT FOR THE CPU DIAGNOSTICS.
#
# IN ORDER FOR THE SCRIPT TO RUN PROPERLY, THE FOLLOWING MUST BE DONE:
#	1. CONNECT THE TRANSMIT AND RECEIVE PINS ON CHANNEL A AND B OF DUART 0,
#	   CHANNEL B OF DUART 1 (FOR CHANNEL B OF DUART 1, THE REQUEST_TO_SEND
#	   AND CLEAR_TO_SEND PINS MUST ALSO BE CONNECTED).
#	2. CONNECT A MICROPHONE AND A SPEAKER TO THE AUDIO CIRCUITRY.
#	3. CONNECT A ETHERNET CABLE TO THE ONBOARD ETHERNET CONNECTOR, THE CABLE
#	   MUST BE CONNECTED TO A TRANSCEIVER.

ip22 {
# Interrupt mask registers data test.
int2

# TLB test. Verify different tlb functions.
tlb

# UTLB miss exception test. Verify the exception generating capability of the
# mips chip during a utlb miss.
utlb

# Real time clock test. Verify the accuracy of the real time clock and the carry
# circuitry by using the timer within the ctl1 gate array.
clock

# Interval timer test. Verify the accuracy of the interval timer by using the
# real time clock.
timer

# DUART 0A/keyboard, 0B/mouse, 1B/modem, internal loopback test. Execute the
# internal loopback diagnostics provided by the DUART chips.
duart -i1

# EEPROM pin signal test. Verify the pin signals provided for the EEPROM.
nvram5

# EEPROM address test. Verify the addressing mechanism within the EEPROM.
nvram1

# EEPROM data test. Verify the data RAM within the EEPROM.
nvram3

# EEPROM checksum test. Verify the data retention capability of the EEPROM.
nvram2

# HPC1 peripheral controller register data test.
hpc3
}
