Summary of ICO/OCO ide diagnostics:

I. MCO Basic Probe and Initialization functions (mco_probe.c, mco_fpga.c)

IDE command	Function Name		Description
------------	-------------		---------------------------------
mco_probe	mco_Probe		probe for MCO board
mco_nic_check	mco_nic_check		Check MCO board NICs	(OCO Only!)
mco_initfpga	mco_Initfpga		Initialize MCO Altera FPGAs
mco_indextest	mco_IndexTest		Test MCO Index register

2. VC2 Diagnostics (mco_vc2.c, mco_vc2_register.c)

IDE command		Function Name		Description
------------		-------------		--------------------------------
mco_VC2probe		mco_VC2probe		MCO VC2 probe and initialization
mco_vc2internalreg	mco_VC2InternalRegTest	MCO VC2 Internal Register Tests
mco_vc2addrsbus		mco_VC2AddrsBusTest	MCO VC2 Address Bus Test
mco_vc2databus		mco_VC2DataBusTest	MCO VC2 Data Bus Test
mco_vc2addrsuniq	mco_VC2AddrsUniqTest	MCO VC2 Address Uniqueness Test
mco_vc2patrn		mco_VC2PatrnTest	MCO VC2 SRAM Pattern Test
mco_setvof		mco_SetVOF		Load and start MGRAS and MCO VOF
mco_loadvof		mco_LoadVOF		Load and start MCO VOF (no MGRAS)
mgras_loadvof		mgras_LoadVOF		Load and start MGRAS VOF (no MCO)
mgras_setgenlock	mgras_setgenlock	Turn on/off MRAS genlock

mco_pokevc2		mco_PokeVC2		Utility to write VC2 Reg Values
mco_peekvc2		mco_PeekVC2		Utility to read VC2 Reg Values
mco_pokevc2ram		mco_PokeVC2Ram		Utility to write VC2 SRAM
mco_peekvc2ram		mco_PeekVC2Ram		Utility to read VC2 SRAM

3. MCO ADV7162 DAC Diagnostics (mco_7162.c)

IDE command		Function Name		Description
------------		-------------		--------------------------------
mco_7162dacreset	mco_Dac7162Reset	MCO 7162 reset
mco_7162dacload		mco_Load7162		Init MCO 7162 for specified VOF
mco_7162probe		mco_Dac7162Probe	MCO 7162 probe & initialization
mco_7162ctrlreg		mco_Dac7162CtrlRegTest	MCO 7162 Control Register Test
mco_7162modereg		mco_Dac7162ModeRegTest	MCO 7162 Mode Register Test
mco_7162addrreg		mco_Dac7162AddrRegTest	MCO 7162 Address Register Test
mco_7162clrpaletteaddrUniq	mco_Dac7162ClrPaletteAddrUniqTest	MCO 7162 Color Palette Address Uniqueness Test
mco_7162clrpalettewalkbit	mco_Dac7162ClrPaletteWalkBitTest	MCO 7162 Color Palette Walking Bit Test
mco_7162clrpalettepatrn	mco_Dac7162ClrPalettePatrnTest	MCO 7162 Color Palette Pattern Test

mco_poke7162addr	mco_Poke7162Addr      Utility to write 7162 Address Reg
mco_peek7162addr	mco_Peek7162Addr      Utility to read 7162 Address Reg
mco_poke7162mode	mco_Poke7162Mode      Utility to write 7162 Mode Reg
mco_peek7162mode	mco_Peek7162Mode      Utility to read 7162 Mode Reg
mco_poke7162ctrl	mco_Poke7162Ctrl      Utility to write 7162 Control Reg
mco_peek7162ctrl	mco_Peek7162Ctrl      Utility to read 7162 Control Reg
mco_poke7162clrpalette	mco_Poke7162ClrPalette  Utility to write 7162 Color Palette RAM
mco_peek7162clrpalette	mco_Peek7162ClrPalette  Utility to read 7162 Color Palette RAM

4. MCO ADV473 DAC Diagnostics (mco_473.c)

IDE command		Function Name		Description
------------		-------------		--------------------------------
mco_473probe		mco_Dac473Probe		MCO 473 DAC probe and init
mco_473RAMaddrreg	mco_Dac473RAMAddrRegTest MCO 473 DAC RAM Address Register Test
mco_473Ovrlayaddrreg	mco_Dac473OverlayAddrRegTest MCO 473 DAC Overlay Address Register Test
mco_473clrpaletteaddrUniq mco_Dac473ClrPaletteAddrUniqTest MCO 473 DAC Color Palette Address Uniqueness Test
mco_473clrpalettewalkbit mco_Dac473ClrPaletteWalkBitTest MCO 473 DAC Color Palette Walking Bit Test 
mco_473clrpalettepatrn	mco_Dac473ClrPalettePatrnTest MCO 473 DAC Color Palette Pattern Test
mco_473overlayaddrUniq	mco_Dac473OvrlayPaletteAddrUniqTest MCO 473 DAC Overlay Palette Address Uniqueness Test
mco_473overlaywalkbit mco_Dac473OvrlayPaletteWalkBitTest MCO 473 DAC Overlay Palette Walking Bit Test 
mco_473overlaypatrn	mco_Dac473OvrlayPalettePatrnTest MCO 473 DAC Overlay Palette Pattern Test


5. MCO Input/Output Swizzle Diagnostics (mco_swizzletests.c)

IDE command		Function Name		Description
------------		-------------		--------------------------------
mco_chkcmpbittest	mco_ChkCompareBitTest	MCO Check Compare Bit Test (ICO Only!)
mco_oschksumtest	mco_OSChksumTest	MCO Input/Output Swizzle Test
mco_daccrctest		mco_DacCrcTest		MCO 7162 DAC Signature Test


II.	Test Descriptions


mco_probe		mco_probe [-d]
	This test tries to read the MCO board ID on the MGRAS DCBus.
	The following command line option is recognized:
	    -d	runs extra MCO verification tests of the DCBus interface PAL.

	PREREQUISITES:
	    This test assumes the Mardi Gras (Impact/Gamera) DCBus has been 
	    initialized (e.g. allsetup)

	TESTING:
	    mco_probe does the following:
	    a. Set HQ3 dcbcontrol register for MCO CRS(0) addresses
	    b. Write 0xff to MCO FPGA Config address
	    c. Read MCO BOARD ID register
	    d. Write 0x00 to MCO FPGA Config address
	    e. Read and compare MCO BOARD ID register
	       If the board ID register value is incorrect, then the
	       following message will be printed:
	       "No MCO Board found"
	    f. If -d option is specified, the following tests are done to
	       verify the integrity of the MCO DCBus interface PAL:
	       1. Write 0xff to MCO FPGA Config address
	       2. Read MCO FPGA Control address
	       3. Verify BIT[2] is high, and BIT[3] is low
	       4. Write 0x00 to MCO FPGA Control address
	       5. Read MCO FPGA Control address
	       6. Verify BIT[2] is low, and BIT[3] is low
	    g. If the board ID register value is correct, then the
	       following message will be printed:
	       "mco_Probe: MCO Board is present"

mco_nic_check   	mco_nic_check
	This test verifies the MCO board NIC contains the name "MCO".  
	This test runs on OCO Only!


mco_initfpga		mco_initfpga -f {path_prefix}/fpga.file
	This test programs all eight Altera FPGA chips on the MCO
	using the specified Altera microcode file fpga.file.

	The {path_prefix} may have one of two forms:
	    bootp()machine:/path    (boot from a remote server on the network)
	    dksc(0,1,0)/path        (boot from the local scsi drive)

	PREREQUISITES:
	    This test assumes the Mardi Gras (Impact/Gamera) DCBus has been 
	    initialized (e.g. allsetup)

	TESTING:
	    mco_inifpga does the following:
	    a. Attempt to open and read the specified file containing
	       the Altera FPGA microcode.

	       If the file cannot be accessed, messages similar to any of the 
	       following error messages may be printed:

	       Error: Unable to access file bootp():mco_a0c0f0.rbf

	       *** error termination on read

	       mco_initfpga: ERROR: Couldn't download FPGA file bootp():mco_a0c0f0.rbf

	    b. Write the Altera FPGA microcode into all eight FPGAs 
	       simultaneously, checking the FPGA control bits during
	       each write cycle.  After all of the microcode has been
	       written, verify the FPGA configuration/control bits are
	       correct, indicating a successful download.

	       If errors occur during the programming of the Altera FPGAs,
	       messages similar to the following may be printed:

		MCO FPGA Reset Failed: nCONFIG is not low (Expected = 0xYY, 
		Actual 0xZZ)

		MCO FPGA Reset Failed: nSTATUS is not low (Expected = 0xYY, 
		Actual 0xZZ)

		MCO FPGA Reset Failed: CONFDONE is not low (Expected = 0xYY, 
		Actual 0xZZ)

		MCO FPGA Reset Failed: nCONFIG never went high (Expected = 0xYY, Actual 0xZZ)

		MCO FPGA Reset Failed: nSTATUS never went high (Expected = 0xYY, Actual 0xZZ)

		MCO FPGA Reset Failed: CONFDONE went high (Expected = 0xYY, Actual 0xZZ)

		MCO FPGA Download Failed: nCONFIG_RD is not high (Expected = 0xYY, Actual 0xZZ)

		MCO FPGA Download Failed: nSTATUS indicates error (Expected = 0xYY, Actual 0xZZ)

		MCO FPGA Download Failed: CONFDONE is not low (Expected = 0xYY, Actual 0xZZ)

		MCO FPGA Download Failed: nSTATUS indicates error (Expected = 0xYY, Actual 0xZZ)

		MCO FPGA Download Failed: CONFDONE never went high (Expected = 0xYY, Actual 0xZZ)

	    c. Write to MCO Control Reg 2 to start an on-board oscillator
	       to provide a clock to the VC2.
	       


mco_indextest		mco_indextest
	This test writes and verifies the values 0 to 255 to the MCO 
	Index Register.  This verifies the Altera FPGA which contains the
	DCBus interface is alive and healthy, and that the DCBus data
	lines are sound.

	PREREQUISITES:
	    This test assumes the Mardi Gras (Impact/Gamera) DCBus has been 
	    initialized (e.g. allsetup)

	TESTING:
	    mco_indextest does the following:
	    a. Write, then read and compare values 0-255 to the 
	       MCO Index Register

	       A successful MCO index register test will display the
	       following:
		   MCO Index Reg Test passed.

	       An unsuccessful MCO index register test will display messages
	       similar to any of the following:
		   MCO Index Test Failed -- Exp 170 Actual 165
						    		- ERROR -
		   **** MCO Index Reg Test failed.  ErrCode FPGA002 Errors 10

	       

2. VC2 Diagnostics (mco_vc2.c, mco_vc2_register.c)

mco_VC2probe
	This test probes for the VC2 and does a quick write and compare of 
	the VC2 Video Entry Ptr Register.

	PREREQUISITES:
	    This test assumes the Mardi Gras (Impact/Gamera) DCBus has been 
	    initialized (e.g. allsetup)

	    This test assumes the MCO FPGAs have been initialized,
	    and the MCO DCBus interface is active.

	    This test assumes the 7162A DAC has been initialized (mco_7162probe)

	TESTING:
	    mco_VC2probe does the following:
	    a. Starts the on-board oscillator to the VC2 by setting the 
	       appropriate bits in MCO Control Register 2

	    b. Resets the VC2 by toggling the VC2_Reset bit in the VC2 
	       configuration register

	    c. Writes and verifies 0 to 0xFFFF to the VC2 Video Entry Ptr
	       Register


mco_vc2internalreg	mco_VC2probe 
	This test writes, reads, and compares the values 0 - 0xFFFF various
	VC2 internal registers:

	PREREQUISITES:
	    This test assumes the Mardi Gras (Impact/Gamera) DCBus has been 
	    initialized (e.g. allsetup)

	    This test assumes the MCO FPGAs have been initialized,
	    and the MCO DCBus interface is active.

	    This test assumes the 7162A DAC has been initialized (mco_7162probe)

	TESTING:
	    mco_vc2internalreg writes and verifies walking 1s and 0s patterns
	    to the following VC2 internal registers:
		VC2_VIDEO_ENTRY_PTR
		VC2_CURS_ENTRY_PTR
		VC2_CURS_X_LOC
		VC2_CURS_Y_LOC
		VC2_DID_ENTRY_PTR
		VC2_SCAN_LENGTH
		VC2_RAM_ADDR Register
		VC2_VT_FRAME_TBL_PTR
		VC2_VT_LINESEQ_PTR
		VC2_VT_LINES_IN_RUN
		VC2_VERTICAL_LINE_CTR
		VC2_CURS_TABLE_PTR
		VC2_WORKING_CURS_Y
		VC2_CURRENT_CURS_X_LOC
		VC2_DID_FRAME_PTR
		VC2_DID_LINE_TABLE_PTR


mco_vc2addrsbus	
	This test tests the Address lines going to the VC2 SRAM chips

	PREREQUISITES:
	    This test assumes the Mardi Gras (Impact/Gamera) DCBus has been 
	    initialized (e.g. allsetup)

	    This test assumes the MCO FPGAs have been initialized,
	    and the MCO DCBus interface is active.

	    This test assumes the 7162A DAC has been initialized (mco_7162probe)

	TESTING:
	    mco_vc2addrsbus does the following:
	    a. Set 7162 DAC clock output (which serves as the VC2 input
	       clock) to 40 MHz
	    b. write the values 0xfffe, 0xfffd, 0xfff7, 0xffef, 0xffdf, ..., 
	       etc to VC2 SRAM locations 1, 2, 4, 8, 0x10, ..., etc.
	    c. After each write specified above, write data to the 
	       7162A DAC color palette ram -- this ensures the DCBus address 
	       and data lines get toggled to something different.
	    d. Read and verify the values in VC2 SRAM locations 1, 2, 4, 8, 
	       0x10, etc.

mco_vc2databus
	This test verifies the data bus lines going to the VC2 SRAM by 
	writing walking 1s and walking 0s patterns to location 1
	of the VC2 SRAM.

	PREREQUISITES:
	    This test assumes the Mardi Gras (Impact/Gamera) DCBus has been 
	    initialized (e.g. allsetup)

	    This test assumes the MCO FPGAs have been initialized,
	    and the MCO DCBus interface is active.

	    This test assumes the 7162A DAC has been initialized (mco_7162probe)

	TESTING:
	    mco_vc2databus does the following:
	    a. Set 7162 DAC clock output (which serves as the VC2 input
	       clock) to 40 MHz
	    b. write the values 1, 2, 4, 8, 0x10, ..., etc. to VC2 SRAM 
	       location 1
	    c. After each write specified above, write data to the 
	       7162A DAC color palette ram -- this ensures the DCBus address 
	       and data lines get toggled to something different.
	    d. Read and verify the values in VC2 SRAM location 1.


mco_vc2addrsuniq
	This test checks VC2 SRAM address uniqueness by writing the valures
	0, 1, 2, 3, etc. into VC2 SRAM locations 0, 1, 2, 3, etc.

	PREREQUISITES:
	    This test assumes the Mardi Gras (Impact/Gamera) DCBus has been 
	    initialized (e.g. allsetup)

	    This test assumes the MCO FPGAs have been initialized,
	    and the MCO DCBus interface is active.

	    This test assumes the 7162A DAC has been initialized (mco_7162probe)

	TESTING:
	    mco_vc2addrsuniq does the following:
	    a. Set 7162 DAC clock output (which serves as the VC2 input
	       clock) to 40 MHz
	    b. write the values 0, 1, 2, 3, ..., etc. to VC2 SRAM 
	       location 0, 1, 2, 3, ..., etc.
	    c. Read and verify the values in VC2 SRAM locations
	       0, 1, 2, 3, ..., etc.
	    d. write the values 0xffff, 0xfffe, 0xfffd, 0xfff7, ..., etc. 
	       to VC2 SRAM location 0, 1, 2, 3, ..., etc.
	    e. Read and verify the values in VC2 SRAM locations
	       0, 1, 2, 3, ..., etc.

mco_vc2patrn
	This test writes and verifies patterns to the VC2 SRAM.

	PREREQUISITES:
	    This test assumes the Mardi Gras (Impact/Gamera) DCBus has been 
	    initialized (e.g. allsetup)

	    This test assumes the MCO FPGAs have been initialized,
	    and the MCO DCBus interface is active.

	    This test assumes the 7162A DAC has been initialized (mco_7162probe)

	TESTING:
	    mco_vc2patrn does the following:
	    a. Set 7162 DAC clock output (which serves as the VC2 input
	       clock) to 40 MHz
	    b. Fill the VC2 SRAM sequentially with different values for
	       adjacent locations.
	    c. Read and verify the values in VC2 SRAM locations
	       0, 1, 2, 3, ..., etc.
	    d. Repeat b. and c. above 5 more times to assure each pattern
	       is written to each location at least once.


mco_setvof		mco_setvof [-g] MCO_format 
	This test loads and starts the specified MCO_format.

	The following command line option is recognized:
	    -g	Enable framelock (genlock) on MGRAS boards.

	PREREQUISITES:
	    This test assumes the Mardi Gras (Impact/Gamera) DCBus has been 
	    initialized (e.g. allsetup)

	    This test assumes the MCO FPGAs have been initialized,
	    and the MCO DCBus interface is active.

	    This test assumes the 7162 DACs, 473 DACs, and VC2 are functional.

	TESTING:
	    mco_setvof does the following:
	    a. Parse the command line arguments (MCO_format and genlock 
	       enable).  If the specified MCO_format does not exist,
	       it prints a list of the available MCO formats.
	    b. Initialize the MGRAS boards:
		* Reset MGRAS boards
		* Initialize the HQ3
		* Initialize the MGRAS Dac
		* Synch the PP-RDRAMs
		* Load the VC3 Timing Table associated with the specified
		  MCO format.
		* Initialize the VC3 internal registers
		* Initialize the XMAP
		* Initialize the CCR
		* Initialize the Raster Subsystem
		* Initialize the CMAP
	    c. Load the MCO FPGA file associated with the specified MCO format
	    d. Initialize the MCO 7162 DACs and 473 DACs
	    e. Set MCO Control Registers
	    f. Initialize MCO VC2 -- load timing tables, etc.
	    g. If specified, turn on framelock bits in MGRAS VC3.

mco_loadvof		mco_loadvof [-g] MCO_format 
	This test loads and starts the specified MCO_format.

	Unlike the similar command "mco_setvof", this command loads and
	starts the MCO VOF only! 

	The following command line option is recognized:
	    -g	Enable framelock (genlock) on MGRAS boards.

	PREREQUISITES:
	    This test assumes the Mardi Gras (Impact/Gamera) DCBus has been 
	    initialized (e.g. allsetup)

	    This test assumes the MGRAS (Impact/Gamera) has been initialized
	    with the appropriate VOF.

	    This test assumes the MCO FPGAs have been initialized,
	    and the MCO DCBus interface is active.

	    This test assumes the 7162 DACs, 473 DACs, and VC2 are functional.

	TESTING:
	    mco_loadvof does the following:
	    a. Parse the command line arguments (MCO_format and genlock 
	       enable).  If the specified MCO_format does not exist,
	       it prints a list of the available MCO formats.
	    b. Load the MCO FPGA file associated with the specified MCO format
	    c. Initialize the MCO 7162 DACs and 473 DACs
	    d. Set MCO Control Registers
	    e. Initialize MCO VC2 -- load timing tables, etc.
	    f. If specified, turn on framelock bits in MGRAS VC3.

mgras_loadvof		mgras_loadvof [-g] MCO_format 
	This test loads and starts the specified MGRAS VOF corresponding to
	the specified MCO_format.

	Unlike the similar command "mco_setvof", this command loads and
	starts the MGRAS VOF only! 

	The following command line option is recognized:
	    -g	Enable framelock (genlock) on MGRAS boards.

	PREREQUISITES:
	    This test assumes the Mardi Gras (Impact/Gamera) DCBus has been 
	    initialized (e.g. allsetup)

	TESTING:
	    mgras_loadvof does the following:
	    a. Parse the command line arguments (MCO_format and genlock 
	       enable).  If the specified MCO_format does not exist,
	       it prints a list of the available MCO formats.
	    b. Initialize the MGRAS boards:
		* Reset MGRAS boards
		* Initialize the HQ3
		* Initialize the MGRAS Dac
		* Synch the PP-RDRAMs
		* Load the VC3 Timing Table associated with the specified
		  MCO format.
		* Initialize the VC3 internal registers
		* Initialize the XMAP
		* Initialize the CCR
		* Initialize the Raster Subsystem
		* Initialize the CMAP
	    c. If specified, turn on framelock bits in MGRAS VC3.

mgras_setgenlock	mgras_setgenlock [on|off]
	This command turns MGRAS genlock on or off 

	The following command line options are recognized:
	    on	Enable framelock (genlock) on MGRAS boards.
	    off	Disable framelock (genlock) on MGRAS boards.

	PREREQUISITES:
	    This test assumes the appropriate Mardi Gras (Impact/Gamera) VOF 
	    has been initialized.


mco_pokevc2		mco_pokevc2 [-l LOOPCOUNT] -r VC2Register -d DATA
mco_peekvc2		mco_peekvc2 [-l LOOPCOUNT] -r VC2Register
	These utilities allow an operator to write (mco_pokevc2) values to or 
	read (mco_peekvc2) ICO VC2 registers.

	PREREQUISITES:
	    These utilities assume the Mardi Gras (Impact/Gamera) DCBus has been 
	    initialized (e.g. allsetup)

	    These utilities assume the ICO FPGAs have been initialized,
	    and the ICO DCBus interface is active.

	    These utilities assume the input clock to the VC2 has been 
	    initialized.

mco_pokevc2ram		mco_pokevc2ram [-l loopcount] -a Addrs Range  -d Data
mco_peekvc2ram		mco_peekvc2ram [-l loopcount] -a Addrs Range
	These utilities allow an operator to write (mco_pokevc2ram) values to 
	or read (mco_peekvc2ram) ICO VC2 SRAM locations.

	PREREQUISITES:
	    These utilities assume the Mardi Gras (Impact/Gamera) DCBus has been 
	    initialized (e.g. allsetup)

	    These utilities assume the ICO FPGAs have been initialized,
	    and the ICO DCBus interface is active.

	    These utilities assume the input clock to the VC2 has been 
	    initialized.


3. MCO ADV7162 DAC Diagnostics (mco_7162.c)

mco_7162probe		mco_7162probe [A|B]
	This test tries to probe for the specified 7162 DAC
	The following command line option is recognized:
	    A,B	 specifies which 7162 DAC to probe for

	PREREQUISITES:
	    This test assumes the Mardi Gras (Impact/Gamera) DCBus has been 
	    initialized (e.g. allsetup)

	    This test assumes the MCO FPGAs have been initialized,
	    and the MCO DCBus interface is active.

	TESTING:
	    mco_7162probe does the following:
	    a. Set HQ3 dcbcontrol register for MCO CRS(2) addresses
	    b. Reset the DAC
	    c. Read and verify the DAC ID register
	    d. Set DAC for 24 bit true color
	    e. Set DAC to 4:1 mux
	    f. Disable signature, set sync recognition for red and blue
	    g. Disable Cursors
	    h. Set up Gamma Tables to a ramp

mco_7162dacload		mco_7162dacload [A|B] MCO_format
	This test initializes the specified 7162 DAC with parameters
	determined by the specified MCO_format

	The following command line option is recognized:
	    A,B	 specifies which 7162 DAC to probe for

	PREREQUISITES:
	    This test assumes the Mardi Gras (Impact/Gamera) DCBus has been 
	    initialized (e.g. allsetup)

	    This test assumes the MCO FPGAs have been initialized,
	    and the MCO DCBus interface is active.

	TESTING:
	    mco_7162dacload does the following:
	    a. Parse the command line arguments (7162 Device and MCO_format).
	       If the specified MCO_format does not exist,
	       it prints a list of the available MCO formats.
	    b. Set HQ3 dcbcontrol register for MCO CRS(2) addresses
	    c. Reset the DAC
	    d. Read and verify the DAC ID register
	    e. Set the DAC cmd2, cmd3, cmd4 registers.
	    f. Set the DAC PLL registers (pllr, pllv, pllcntl)
	    g. Enable the DAC internal PLL
	    h. Disable Cursors
	    i. Set up Gamma Tables to a ramp

mco_7162ctrlreg 	mco_7162ctrlreg [A|B] 
	mco7162ctrlreg tests the Control Register of the specified 7162 DAC
	The following command line option is recognized:
	    A,B	 specifies which 7162 DAC to test

	PREREQUISITES:
	    This test assumes the Mardi Gras (Impact/Gamera) DCBus has been 
	    initialized (e.g. allsetup)

	    This test assumes the MCO FPGAs have been initialized,
	    and the MCO DCBus interface is active.

	TESTING:
	    mco_7162ctrlreg does the following:
	    a. Set HQ3 dcbcontrol register for MCO CRS(2) addresses
	    b. Write and compare the values 0-255 to the following
	       7162 DAC internal registers:
		MCO_ADV7162_PIXMASK_ADDR
	    c. Read and verify expected values from the following internal
	       registers:
		MCO_ADV7162_ID_ADDR
		MCO_ADV7162_REV_ADDR


mco_7162modereg		mco_Dac7162ModeRegTest	MCO 7162 Mode Register Test
mco_7162addrreg		mco_Dac7162AddrRegTest	MCO 7162 Address Register Test
mco_7162clrpaletteaddrUniq	mco_Dac7162ClrPaletteAddrUniqTest	MCO 7162 Color Palette Address Uniqueness Test
mco_7162clrpalettewalkbit	mco_Dac7162ClrPaletteWalkBitTest	MCO 7162 Color Palette Walking Bit Test
mco_7162clrpalettepatrn	mco_Dac7162ClrPalettePatrnTest	MCO 7162 Color Palette Pattern Test
mco_7162modereg		mco_7162modereg [A|B] 
	This test writes, reads, and compares walking ones and zeros patterns
	to the Mode Register of the specified 7162 DAC.

	The following command line option is recognized:
	    A,B	 specifies which 7162 DAC to test

	PREREQUISITES:
	    This test assumes the Mardi Gras (Impact/Gamera) DCBus has been 
	    initialized (e.g. allsetup)

	    This test assumes the MCO FPGAs have been initialized,
	    and the MCO DCBus interface is active.

	TESTING:
	    mco_7162modereg does the following:
	    a. Set HQ3 dcbcontrol register for MCO CRS(2) addresses
	    b. Read and save the original value of the Mode Register.
	    c. For the values 1, 2, 4, 8, 0x10, etc:
	       * Write the value to the Mode Register
	       * Write different data to a different 7162 DAC register
		 to ensure the data and address lines are changed.
	       * Read and verify data from the Mode Register
	    d. Restore the Mode Register to the original value

mco_7162addrreg		mco_7162addrreg [A|B] 
	This test writes, reads, and compares walking ones and zeros patterns
	to the Address Register of the specified 7162 DAC.

	The following command line option is recognized:
	    A,B	 specifies which 7162 DAC to test

	PREREQUISITES:
	    This test assumes the Mardi Gras (Impact/Gamera) DCBus has been 
	    initialized (e.g. allsetup)

	    This test assumes the MCO FPGAs have been initialized,
	    and the MCO DCBus interface is active.

	TESTING:
	    mco_7162addrreg does the following:
	    a. Set HQ3 dcbcontrol register for MCO CRS(2) addresses
	    b. For a series of values:
	       * Write the value to the Address Register
	       * Read and verify data from the Address Register

mco_poke7162addr	mco_poke7162addr [A|B] AddressValue 
mco_peek7162addr	mco_peek7162addr [A|B] 
	These utilities write (mco_poke7162addr) or read (mco_peek7162addr)
	the Address Register of the specified 7162 DAC.

	The following command line arguments are recognized:
	    A,B	 specifies which 7162 DAC to test
	    AddressValue	specifies the value to write to 
				the Address Register

	PREREQUISITES:
	    This test assumes the Mardi Gras (Impact/Gamera) DCBus has been 
	    initialized (e.g. allsetup)

	    This test assumes the MCO FPGAs have been initialized,
	    and the MCO DCBus interface is active.

mco_poke7162mode	mco_poke7162mode [A|B] ModeValue 
mco_peek7162mode	mco_peek7162mode [A|B] 
	These utilities write (mco_poke7162mode) or read (mco_peek7162mode)
	the Mode Register of the specified 7162 DAC.

	The following command line arguments are recognized:
	    A,B	 specifies which 7162 DAC to test
	    ModeValue	specifies the value to write to the Mode Register

	PREREQUISITES:
	    This test assumes the Mardi Gras (Impact/Gamera) DCBus has been 
	    initialized (e.g. allsetup)

	    This test assumes the MCO FPGAs have been initialized,
	    and the MCO DCBus interface is active.

mco_poke7162ctrl	mco_poke7162ctrl [A|B] CtrlValue 
mco_peek7162ctrl	mco_peek7162ctrl [A|B] 
	These utilities write (mco_poke7162ctrl) or read (mco_peek7162ctrl)
	the Control Register of the specified 7162 DAC.

	The following command line arguments are recognized:
	    A,B	 specifies which 7162 DAC to test
	    CtrlValue	specifies the value to write to the Control Register

	PREREQUISITES:
	    This test assumes the Mardi Gras (Impact/Gamera) DCBus has been 
	    initialized (e.g. allsetup)

	    This test assumes the MCO FPGAs have been initialized,
	    and the MCO DCBus interface is active.

mco_poke7162clrpalette	mco_poke7162clrpalette [A|B] Addr Red Green Blue 
mco_peek7162clrpalette	mco_peek7162clrpalette [A|B] Addr
	These utilities write (mco_poke7162clrpalette) or 
	read (mco_peek7162clrpalette) the Color Palette of the specified 
	7162 DAC.

	The following command line arguments are recognized:
	    A,B	 specifies which 7162 DAC to test
	    Addr specifies the Color Palette address to write to or read from
	    Red		specifies the Red value to write to the 
			Color Palette address
	    Green	specifies the Green value to write to the 
			Color Palette address
	    Blue	specifies the Blue value to write to the 
			Color Palette address

	PREREQUISITES:
	    This test assumes the Mardi Gras (Impact/Gamera) DCBus has been 
	    initialized (e.g. allsetup)

	    This test assumes the MCO FPGAs have been initialized,
	    and the MCO DCBus interface is active.

4. MCO ADV473 DAC Diagnostics (mco_473.c)

IDE command		Function Name		Description
------------		-------------		--------------------------------
mco_473probe		mco_473probe [A|B]
	This test probes and initializes the specified 473 DAC

	The following command line option is recognized:
	    A,B	 specifies which 473 DAC to probe for

	PREREQUISITES:
	    This test assumes the Mardi Gras (Impact/Gamera) DCBus has been 
	    initialized (e.g. allsetup)

	    This test assumes the MCO FPGAs have been initialized,
	    and the MCO DCBus interface is active.

	TESTING:
	    mco_473probe does the following:
	    a. Set HQ3 dcbcontrol register for MCO CRS(2) addresses
	    b. Initialize the 473 Command Register
	    c. Read and verify the 473 Command Register


mco_473RAMaddrreg	mco_473RAMaddrreg [A|B] 
	This test writes and compares the values 0 - 0xFF to the specified
	Bt473 RAM Address Register

	The following command line option is recognized:
	    A,B	 specifies which 473 DAC to test

	PREREQUISITES:
	    This test assumes the Mardi Gras (Impact/Gamera) DCBus has been 
	    initialized (e.g. allsetup)

	    This test assumes the MCO FPGAs have been initialized,
	    and the MCO DCBus interface is active.

	TESTING:
	    mco_473RAMaddrreg does the following:
	    a. Set HQ3 dcbcontrol register for MCO CRS(2) addresses
	    b. For the values 0 - 0xFF:
	       * Write data to Color Palette Write Mode Address Register
	       * Read and compare data from Color Palette Address 
		 Write Mode Register

mco_473Ovrlayaddrreg	mco_473Ovrlayaddrreg [A|B] 
	This test writes and compares the values 0 - 0xF to the specified
	Bt473 Overlay Address Register

	The following command line option is recognized:
	    A,B	 specifies which 473 DAC to test

	PREREQUISITES:
	    This test assumes the Mardi Gras (Impact/Gamera) DCBus has been 
	    initialized (e.g. allsetup)

	    This test assumes the MCO FPGAs have been initialized,
	    and the MCO DCBus interface is active.

	TESTING:
	    mco_473Ovrlayaddrreg does the following:
	    a. Set HQ3 dcbcontrol register for MCO CRS(2) addresses
	    b. For the values 0 - 0xF:
	       * Write data to Overlay Write Mode Address Register
	       * Read and compare data from Overlay Address Write Mode Register


mco_473clrpaletteaddrUniq	mco_473clrpaletteaddrUniq [A|B] 
	This test writes and compares unique values to the Color Palette RAM
	of the specified Bt473 DAC

	The following command line option is recognized:
	    A,B	 specifies which 473 DAC to test

	PREREQUISITES:
	    This test assumes the Mardi Gras (Impact/Gamera) DCBus has been 
	    initialized (e.g. allsetup)

	    This test assumes the MCO FPGAs have been initialized,
	    and the MCO DCBus interface is active.

	TESTING:
	    mco_473clrpaletteaddrUniq does the following:
	    a. Set HQ3 dcbcontrol register for MCO CRS(2) addresses
	    b. Fill the Red, Green, and Blue Color Palette Ram with
	       values 0 - 0xFF.
	    c. Read and compare data from the Red, Green, and Blue 
	       Color Palette Ram

mco_473clrpalettewalkbit	mco_473clrpalettewalkbit [A|B] 
	This test writes and compares unique values to the Color Palette RAM
	of the specified Bt473 DAC

	The following command line option is recognized:
	    A,B	 specifies which 473 DAC to test

	PREREQUISITES:
	    This test assumes the Mardi Gras (Impact/Gamera) DCBus has been 
	    initialized (e.g. allsetup)

	    This test assumes the MCO FPGAs have been initialized,
	    and the MCO DCBus interface is active.

	TESTING:
	    mco_473clrpalettewalkbit does the following:
	    a. Set HQ3 dcbcontrol register for MCO CRS(2) addresses
	    b. Fill Red, Green, and Blue Color Palette RAM with 
	       walking ones and walking zeros pattern
	    c. Read and compare data from the Red, Green, and Blue 
	       Color Palette Ram
	    d. Do b. and c. above until each Color Palette RAM location
	       has walked a one and a zero on all data lines.

mco_473clrpalettepatrn	mco_473clrpalettepatrn [A|B] 
	This test writes and compares various patterns to the Color Palette RAM
	of the specified Bt473 DAC

	The following command line option is recognized:
	    A,B	 specifies which 473 DAC to test

	PREREQUISITES:
	    This test assumes the Mardi Gras (Impact/Gamera) DCBus has been 
	    initialized (e.g. allsetup)

	    This test assumes the MCO FPGAs have been initialized,
	    and the MCO DCBus interface is active.

	TESTING:
	    mco_473clrpalettepatrn does the following:
	    a. Set HQ3 dcbcontrol register for MCO CRS(2) addresses
	    b. Fill Red, Green, and Blue Color Palette RAM with 
	       a pattern
	    c. Read and compare data from the Red, Green, and Blue 
	       Color Palette Ram
	    d. Do b. and c. above until each Color Palette RAM location
	       has been tested with each pattern.

mco_473overlayaddrUniq	mco_473overlayaddrUniq [A|B] 
	This test writes and compares unique values to the Overlay Palette RAM
	of the specified Bt473 DAC

	The following command line option is recognized:
	    A,B	 specifies which 473 DAC to test

	PREREQUISITES:
	    This test assumes the Mardi Gras (Impact/Gamera) DCBus has been 
	    initialized (e.g. allsetup)

	    This test assumes the MCO FPGAs have been initialized,
	    and the MCO DCBus interface is active.

	TESTING:
	    mco_473overlayaddrUniq does the following:
	    a. Set HQ3 dcbcontrol register for MCO CRS(2) addresses
	    b. Fill the Red, Green, and Blue Overlay Palette Ram with
	       values 0 - 0xF.
	    c. Read and compare data from the Red, Green, and Blue 
	       Overlay Palette Ram

mco_473overlaywalkbit	mco_473overlaywalkbit [A|B] 
	This test writes and compares unique values to the Overlay Palette RAM
	of the specified Bt473 DAC

	The following command line option is recognized:
	    A,B	 specifies which 473 DAC to test

	PREREQUISITES:
	    This test assumes the Mardi Gras (Impact/Gamera) DCBus has been 
	    initialized (e.g. allsetup)

	    This test assumes the MCO FPGAs have been initialized,
	    and the MCO DCBus interface is active.

	TESTING:
	    mco_473overlaywalkbit does the following:
	    a. Set HQ3 dcbcontrol register for MCO CRS(2) addresses
	    b. Fill Red, Green, and Blue Overlay Palette RAM with 
	       walking ones and walking zeros pattern
	    c. Read and compare data from the Red, Green, and Blue 
	       Overlay Palette Ram
	    d. Do b. and c. above until each Overlay Palette RAM location
	       has walked a one and a zero on all data lines.

mco_473overlaypatrn	mco_473overlaypatrn [A|B] 
	This test writes and compares various patterns to the 
	Overlay Palette RAM of the specified Bt473 DAC

	The following command line option is recognized:
	    A,B	 specifies which 473 DAC to test

	PREREQUISITES:
	    This test assumes the Mardi Gras (Impact/Gamera) DCBus has been 
	    initialized (e.g. allsetup)

	    This test assumes the MCO FPGAs have been initialized,
	    and the MCO DCBus interface is active.

	TESTING:
	    mco_473overlaypatrn does the following:
	    a. Set HQ3 dcbcontrol register for MCO CRS(2) addresses
	    b. Fill Red, Green, and Blue Overlay Palette RAM with 
	       a pattern
	    c. Read and compare data from the Red, Green, and Blue 
	       Overlay Palette Ram
	    d. Do b. and c. above until each Overlay Palette RAM location
	       has been tested with each pattern.



5. MCO Input/Output Swizzle Diagnostics (mco_swizzletests.c)

mco_chkcmpbittest	mco_chkcmpbittest 
	This test reads the Test Result bits from the Input and Output
	Swizzle FPGAs and checks the results.

	This test runs on ICO Only!

	PREREQUISITES:
	    This test assumes the Mardi Gras (Impact/Gamera) DCBus has been 
	    initialized (e.g. allsetup)

	    This test assumes the MCO FPGAs have been initialized,
	    and the MCO DCBus interface is active.

	    This test assumes the MGRAS is running a valid video format.

	TESTING:
	    mco_chkcmpbittest does the following:
	    a. Load special FPGA microcode ("bootp()chkcmpbittest1.rbf")
	       which sets the Check Compare Bits high.
	    b. Read the Check Compare Bits in the MCO_ISOS_TESTREG register
	       and verify they are all high.
	    c. Load special FPGA microcode ("bootp()chkcmpbittest1.rbf")
	       which sets the Check Compare Bits low.
	    d. Read the Check Compare Bits in the MCO_ISOS_TESTREG register
	       and verify they are all low.

mco_oschksumtest	mco_oschksumtest mode testpattern 
	This test reads the Output Swizzle checksums and compares them with the
	pre-computed OS checksum values.  If the values don't match, it 
	attempts to determine likely failing chipsling chips.

	The following command line options are recognized:
	    mode	can be one of:	vga mini field
	    testpattern specifies which test pattern CRC values (1 - 6) to use 

	PREREQUISITES:
	    This test assumes the Mardi Gras (Impact/Gamera) DCBus has been 
	    initialized (e.g. allsetup)

	    This test assumes the MCO FPGAs have been initialized,
	    and the MCO DCBus interface is active.

	    This test assumes the MCO VOF is set up already (mco_setvof)
	    and that the test pattern is written into the MGRAS framebuffer.

	TESTING:
	    mco_oschksumtest does the following:
	    a. Parse the command line arguments (MCO_format and pattern 
	       number).  If the specified MCO_format does not exist,
	       it prints a list of the available MCO formats.
	    b. Reset the DIAG state machine
	    c. Read 64 bits (8 bits * 8 swizzle buses)
	    d. Compare data received with expected (compiled-in) values
	       If failures are detected, attempt to pinpoint the 
	       failing Swizzle or Field Memory chip.


mco_daccrctest		mco_daccrctest [A|B] testpattern
	This test reads CRC Signature from specified 7162 DAC and 
	compares against "known good" precomputed CRC signatures

	The following command line options are recognized:
	    A,B		specifies which 7162 DAC to test
	    testpattern specifies which test pattern CRC values (1 - 6) to use 

	PREREQUISITES:
	    This test assumes the Mardi Gras (Impact/Gamera) DCBus has been 
	    initialized (e.g. allsetup)

	    This test assumes the MCO FPGAs have been initialized,
	    and the MCO DCBus interface is active.

	    This test assumes the MCO VOF is set up already and that the 
	    test pattern is written into the MGRAS framebuffer

	TESTING:
	    mco_daccrctest does the following:
	    a. Reads the CRC signature from the specified 7162 DAC
	    b. Compares the actual signature values received with the 
	       expected signature values


