140 lines
4.0 KiB
C
140 lines
4.0 KiB
C
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/** @addtogroup usb_file USB peripheral API
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* @ingroup peripheral_apis
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*
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* @brief USB Peripheral for Happy Gecko
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*
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* The Happy Gecko uses the "standard" usb_dwc_otg core.
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*
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* @sa usb_defines
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* @copyright See @ref lgpl_license
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*/
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/*
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* This file is part of the libopencm3 project.
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*
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* Copyright (C) 2011 Gareth McMullin <gareth@blacksphere.co.nz>
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* Copyright (C) 2018 Seb Holzapfel <schnommus@gmail.com>
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*
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* This library is free software: you can redistribute it and/or modify
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* it under the terms of the GNU Lesser General Public License as published by
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* the Free Software Foundation, either version 3 of the License, or
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* (at your option) any later version.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public License
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* along with this library. If not, see <http://www.gnu.org/licenses/>.
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*/
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#include <string.h>
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#include <libopencm3/cm3/common.h>
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#include <libopencm3/efm32/memorymap.h>
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#include <libopencm3/efm32/cmu.h>
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#include <libopencm3/efm32/usb.h>
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#include <libopencm3/usb/usbd.h>
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#include <libopencm3/usb/dwc/otg_fs.h>
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#include "usb_private.h"
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#include "usb_dwc_common.h"
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/**@{*/
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/* Receive FIFO size in 32-bit words. */
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#define RX_FIFO_SIZE 256
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/* FIXME: EFM32HG has 6 bidirectional endpoints.
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* problem is "uint32_t doeptsiz[4];" in usb_private.h */
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#define ENDPOINT_COUNT 4
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static struct _usbd_device _usbd_dev;
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/** Initialize the USB device controller hardware of the EFM32HG. */
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static usbd_device *efm32hg_usbd_init(void)
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{
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/* Enable peripheral clocks required for USB */
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cmu_periph_clock_enable(CMU_USB);
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cmu_periph_clock_enable(CMU_USBC);
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cmu_periph_clock_enable(CMU_LE);
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/* Select LFRCO as LFCCLK clock */
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CMU_LFCLKSEL = CMU_LFCLKSEL_LFC_LFRCO;
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/* Enable the USBLE peripheral clock (sits on LFCCLK) */
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cmu_periph_clock_enable(CMU_USBLE);
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/* Calibrate USB based on communications */
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CMU_USHFRCOCONF = CMU_USHFRCOCONF_BAND_48MHZ;
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/* Enable USHFRCO Clock Recovery mode. */
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CMU_USBCRCTRL |= CMU_USBCRCTRL_EN;
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/* Select USHFRCO as clock source for USB */
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cmu_osc_on(USHFRCO);
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cmu_wait_for_osc_ready(USHFRCO);
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/* Set up the USB clock source */
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cmu_set_usbclk_source(USHFRCO);
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cmu_wait_for_usbclk_selected(USHFRCO);
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/* Turn off all Low Energy Mode (LEM) features. */
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USB_CTRL = 0;
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/* Initialize USB core */
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USB_ROUTE = USB_ROUTE_PHYPEN; /* Enable PHY pins. */
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/* Wait for AHB idle. */
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while (!(OTG_FS_GRSTCTL & OTG_GRSTCTL_AHBIDL));
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/* Do core soft reset. */
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OTG_FS_GRSTCTL |= OTG_GRSTCTL_CSRST;
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while (OTG_FS_GRSTCTL & OTG_GRSTCTL_CSRST);
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/* Explicitly enable DP pullup (not all cores do this by default) */
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OTG_FS_DCTL &= ~OTG_DCTL_SDIS;
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/* Force peripheral only mode. */
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OTG_FS_GUSBCFG |= OTG_GUSBCFG_FDMOD | OTG_GUSBCFG_TRDT_MASK;
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OTG_FS_GINTSTS = OTG_GINTSTS_MMIS;
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/* Full speed device. */
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OTG_FS_DCFG |= OTG_DCFG_DSPD;
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/* Restart the PHY clock. */
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OTG_FS_PCGCCTL = 0;
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OTG_FS_GRXFSIZ = efm32hg_usb_driver.rx_fifo_size;
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_usbd_dev.fifo_mem_top = efm32hg_usb_driver.rx_fifo_size;
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/* Unmask interrupts for TX and RX. */
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OTG_FS_GAHBCFG |= OTG_GAHBCFG_GINT;
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OTG_FS_GINTMSK = OTG_GINTMSK_ENUMDNEM |
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OTG_GINTMSK_RXFLVLM |
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OTG_GINTMSK_IEPINT |
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OTG_GINTMSK_USBSUSPM |
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OTG_GINTMSK_WUIM;
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OTG_FS_DAINTMSK = 0xF;
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OTG_FS_DIEPMSK = OTG_DIEPMSK_XFRCM;
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return &_usbd_dev;
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}
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const struct _usbd_driver efm32hg_usb_driver = {
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.init = efm32hg_usbd_init,
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.set_address = dwc_set_address,
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.ep_setup = dwc_ep_setup,
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.ep_reset = dwc_endpoints_reset,
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.ep_stall_set = dwc_ep_stall_set,
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.ep_stall_get = dwc_ep_stall_get,
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.ep_nak_set = dwc_ep_nak_set,
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.ep_write_packet = dwc_ep_write_packet,
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.ep_read_packet = dwc_ep_read_packet,
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.poll = dwc_poll,
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.disconnect = dwc_disconnect,
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.base_address = USB_OTG_FS_BASE,
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.set_address_before_status = 1,
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.rx_fifo_size = RX_FIFO_SIZE,
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};
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/**@}*/
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