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git subrepo clone https://github.com/libopencm3/libopencm3.git

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subrepo:
  subdir:   "libopencm3"
  merged:   "88e91c9a7cce"
upstream:
  origin:   "https://github.com/libopencm3/libopencm3.git"
  branch:   "master"
  commit:   "88e91c9a7cce"
git-subrepo:
  version:  "0.4.3"
  origin:   "???"
  commit:   "???"
This commit is contained in:
Arti Zirk
2023-01-21 21:54:42 +02:00
parent f01f2a30fa
commit 054740c5de
1205 changed files with 191912 additions and 0 deletions
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73
libopencm3/lib/sam/common/gpio_common_3a3u3x.c Normal file
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/** @addtogroup gpio_defines
*
* @brief <b>Access functions for the SAM3A/U/X I/O Controller</b>
* @ingroup SAM3_defines
* LGPL License Terms @ref lgpl_license
* @author @htmlonly &copy; @endhtmlonly 2012
* Gareth McMullin <gareth@blacksphere.co.nz>
* @author @htmlonly &copy; @endhtmlonly 2014
* Felix Held <felix-libopencm3@felixheld.de>
*
*/
/*
* This file is part of the libopencm3 project.
*
* Copyright (C) 2012 Gareth McMullin <gareth@blacksphere.co.nz>
* Copyright (C) 2014 Felix Held <felix-libopencm3@felixheld.de>
*
* This library is free software: you can redistribute it and/or modify
* it under the terms of the GNU Lesser General Public License as published by
* the Free Software Foundation, either version 3 of the License, or
* (at your option) any later version.
*
* This library is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU Lesser General Public License for more details.
*
* You should have received a copy of the GNU Lesser General Public License
* along with this library. If not, see <http://www.gnu.org/licenses/>.
*/
#include <libopencm3/sam/gpio.h>
/** @brief Initialize GPIO pins
*
* @param[in] port uint32_t: GPIO Port base address
* @param[in] pins uint32_t bitfield of pins to initialize
* @param[in] flags enum gpio_flags
*/
void gpio_init(uint32_t port, uint32_t pins, enum gpio_flags flags)
{
switch (flags & 0x7) {
case GPIO_FLAG_GPINPUT:
PIO_ODR(port) = pins;
PIO_PER(port) = pins;
break;
case GPIO_FLAG_GPOUTPUT:
PIO_OER(port) = pins;
PIO_PER(port) = pins;
break;
case GPIO_FLAG_PERIPHA:
PIO_ABSR(port) &= ~pins;
PIO_PDR(port) = pins;
break;
case GPIO_FLAG_PERIPHB:
PIO_ABSR(port) |= pins;
PIO_PDR(port) = pins;
}
if (flags & GPIO_FLAG_OPEN_DRAIN) {
PIO_MDER(port) = pins;
} else {
PIO_MDDR(port) = pins;
}
if (flags & GPIO_FLAG_PULL_UP) {
PIO_PUER(port) = pins;
} else {
PIO_PUDR(port) = pins;
}
}

86
libopencm3/lib/sam/common/gpio_common_3n3s.c Normal file
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/** @addtogroup gpio_defines
*
* @brief <b>Access functions for the SAM3N/S I/O Controller</b>
* @ingroup SAM3_defines
* LGPL License Terms @ref lgpl_license
* @author @htmlonly &copy; @endhtmlonly 2012
* Gareth McMullin <gareth@blacksphere.co.nz>
* @author @htmlonly &copy; @endhtmlonly 2014
* Felix Held <felix-libopencm3@felixheld.de>
*
*/
/*
* This file is part of the libopencm3 project.
*
* Copyright (C) 2012 Gareth McMullin <gareth@blacksphere.co.nz>
* Copyright (C) 2014 Felix Held <felix-libopencm3@felixheld.de>
*
* This library is free software: you can redistribute it and/or modify
* it under the terms of the GNU Lesser General Public License as published by
* the Free Software Foundation, either version 3 of the License, or
* (at your option) any later version.
*
* This library is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU Lesser General Public License for more details.
*
* You should have received a copy of the GNU Lesser General Public License
* along with this library. If not, see <http://www.gnu.org/licenses/>.
*/
#include <libopencm3/sam/gpio.h>
/** @brief Initialize GPIO pins
*
* @param[in] port uint32_t: GPIO Port base address
* @param[in] pins uint32_t bitfield of pins to initialize
* @param[in] flags enum gpio_flags
*/
void gpio_init(uint32_t port, uint32_t pins, enum gpio_flags flags)
{
switch (flags & 0x7) {
case GPIO_FLAG_GPINPUT:
PIO_ODR(port) = pins;
PIO_PER(port) = pins;
break;
case GPIO_FLAG_GPOUTPUT:
PIO_OER(port) = pins;
PIO_PER(port) = pins;
break;
case GPIO_FLAG_PERIPHA:
PIO_ABCDSR1(port) &= ~pins;
PIO_ABCDSR2(port) &= ~pins;
PIO_PDR(port) = pins;
break;
case GPIO_FLAG_PERIPHB:
PIO_ABCDSR1(port) |= pins;
PIO_ABCDSR2(port) &= ~pins;
PIO_PDR(port) = pins;
break;
case GPIO_FLAG_PERIPHC:
PIO_ABCDSR1(port) &= ~pins;
PIO_ABCDSR2(port) |= pins;
PIO_PDR(port) = pins;
break;
case GPIO_FLAG_PERIPHD:
PIO_ABCDSR1(port) |= pins;
PIO_ABCDSR2(port) |= pins;
PIO_PDR(port) = pins;
break;
}
if (flags & GPIO_FLAG_OPEN_DRAIN) {
PIO_MDER(port) = pins;
} else {
PIO_MDDR(port) = pins;
}
if (flags & GPIO_FLAG_PULL_UP) {
PIO_PUER(port) = pins;
} else {
PIO_PUDR(port) = pins;
}
}

66
libopencm3/lib/sam/common/gpio_common_all.c Normal file
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/** @addtogroup gpio_defines
*
* @brief <b>Access functions for the SAM3 I/O Controller</b>
* @ingroup SAM3_defines
* LGPL License Terms @ref lgpl_license
* @author @htmlonly &copy; @endhtmlonly 2012
* Gareth McMullin <gareth@blacksphere.co.nz>
* @author @htmlonly &copy; @endhtmlonly 2014
* Felix Held <felix-libopencm3@felixheld.de>
*
*/
/*
* This file is part of the libopencm3 project.
*
* Copyright (C) 2012 Gareth McMullin <gareth@blacksphere.co.nz>
* Copyright (C) 2014 Felix Held <felix-libopencm3@felixheld.de>
*
* This library is free software: you can redistribute it and/or modify
* it under the terms of the GNU Lesser General Public License as published by
* the Free Software Foundation, either version 3 of the License, or
* (at your option) any later version.
*
* This library is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU Lesser General Public License for more details.
*
* You should have received a copy of the GNU Lesser General Public License
* along with this library. If not, see <http://www.gnu.org/licenses/>.
*/
#include <libopencm3/sam/gpio.h>
/** @brief Atomic set output
*
* @param[in] gpioport uint32_t: GPIO Port base address
* @param[in] gpios uint32_t
*/
void gpio_set(uint32_t gpioport, uint32_t gpios)
{
PIO_SODR(gpioport) = gpios;
}
/** @brief Atomic clear output
*
* @param[in] gpioport uint32_t: GPIO Port base address
* @param[in] gpios uint32_t
*/
void gpio_clear(uint32_t gpioport, uint32_t gpios)
{
PIO_CODR(gpioport) = gpios;
}
/** @brief Toggle output
*
* @param[in] gpioport uint32_t: GPIO Port base address
* @param[in] gpios uint32_t
*/
void gpio_toggle(uint32_t gpioport, uint32_t gpios)
{
uint32_t odsr = PIO_ODSR(gpioport);
PIO_CODR(gpioport) = odsr & gpios;
PIO_SODR(gpioport) = ~odsr & gpios;
}

106
libopencm3/lib/sam/common/pmc.c Normal file
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/*
* This file is part of the libopencm3 project.
*
* Copyright (C) 2013 Gareth McMullin <gareth@blacksphere.co.nz>
*
* This library is free software: you can redistribute it and/or modify
* it under the terms of the GNU Lesser General Public License as published by
* the Free Software Foundation, either version 3 of the License, or
* (at your option) any later version.
*
* This library is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU Lesser General Public License for more details.
*
* You should have received a copy of the GNU Lesser General Public License
* along with this library. If not, see <http://www.gnu.org/licenses/>.
*/
#include <libopencm3/sam/pmc.h>
#include <libopencm3/sam/eefc.h>
/** Default peripheral clock frequency after reset. */
uint32_t pmc_mck_frequency = 4000000;
void pmc_xtal_enable(bool en, uint8_t startup_time)
{
if (en) {
CKGR_MOR = (CKGR_MOR & ~CKGR_MOR_MOSCXTST_MASK) |
CKGR_MOR_KEY | CKGR_MOR_MOSCXTEN |
(startup_time << 8);
while (!(PMC_SR & PMC_SR_MOSCXTS));
} else {
CKGR_MOR = CKGR_MOR_KEY | (CKGR_MOR & ~CKGR_MOR_MOSCXTEN);
}
}
void pmc_plla_config(uint8_t mul, uint8_t div)
{
CKGR_PLLAR = CKGR_PLLAR_ONE | ((mul - 1) << 16) |
CKGR_PLLAR_PLLACOUNT_MASK | div;
while (!(PMC_SR & PMC_SR_LOCKA));
}
void pmc_peripheral_clock_enable(uint8_t pid)
{
#if defined(PMC_PCER1)
if (pid < 32) {
PMC_PCER0 = 1 << pid;
} else {
PMC_PCER1 = 1 << (pid & 31);
}
#else
/* SAM3N and SAM3U only have one Peripheral Clock Enable Register */
PMC_PCER = 1 << pid;
#endif
}
void pmc_peripheral_clock_disable(uint8_t pid)
{
#if defined(PMC_PCER1)
if (pid < 32) {
PMC_PCDR0 = 1 << pid;
} else {
PMC_PCDR1 = 1 << (pid & 31);
}
#else
PMC_PCDR = 1 << pid;
#endif
}
void pmc_mck_set_source(enum mck_src src)
{
PMC_MCKR = (PMC_MCKR & ~PMC_MCKR_CSS_MASK) | src;
while (!(PMC_SR & PMC_SR_MCKRDY));
}
void pmc_clock_setup_in_xtal_12mhz_out_84mhz(void)
{
eefc_set_latency(4);
/* 12MHz external xtal, maximum possible startup time */
pmc_xtal_enable(true, 0xff);
/* Select as main oscillator */
CKGR_MOR |= CKGR_MOR_KEY | CKGR_MOR_MOSCSEL;
/* Multiply by 7 for 84MHz */
pmc_plla_config(7, 1);
pmc_mck_set_source(MCK_SRC_PLLA);
pmc_mck_frequency = 84000000;
}
void pmc_clock_setup_in_rc_4mhz_out_84mhz(void)
{
eefc_set_latency(4);
/* Select as main oscillator */
CKGR_MOR = CKGR_MOR_KEY |
(CKGR_MOR & ~(CKGR_MOR_MOSCSEL | CKGR_MOR_MOSCRCF_MASK));
/* Multiply by 21 for 84MHz */
pmc_plla_config(21, 1);
pmc_mck_set_source(MCK_SRC_PLLA);
pmc_mck_frequency = 84000000;
}

27
libopencm3/lib/sam/common/usart_common_3.c Normal file
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/*
* This file is part of the libopencm3 project.
*
* Copyright (C) 2013 Gareth McMullin <gareth@blacksphere.co.nz>
*
* This library is free software: you can redistribute it and/or modify
* it under the terms of the GNU Lesser General Public License as published by
* the Free Software Foundation, either version 3 of the License, or
* (at your option) any later version.
*
* This library is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU Lesser General Public License for more details.
*
* You should have received a copy of the GNU Lesser General Public License
* along with this library. If not, see <http://www.gnu.org/licenses/>.
*/
#include <libopencm3/sam/usart.h>
extern uint32_t pmc_mck_frequency;
void usart_set_baudrate(uint32_t usart, uint32_t baud)
{
USART_BRGR(usart) = pmc_mck_frequency / (16 * baud);
}

126
libopencm3/lib/sam/common/usart_common_all.c Normal file
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/*
* This file is part of the libopencm3 project.
*
* Copyright (C) 2013 Gareth McMullin <gareth@blacksphere.co.nz>
*
* This library is free software: you can redistribute it and/or modify
* it under the terms of the GNU Lesser General Public License as published by
* the Free Software Foundation, either version 3 of the License, or
* (at your option) any later version.
*
* This library is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU Lesser General Public License for more details.
*
* You should have received a copy of the GNU Lesser General Public License
* along with this library. If not, see <http://www.gnu.org/licenses/>.
*/
#include <libopencm3/sam/usart.h>
void usart_set_databits(uint32_t usart, int bits)
{
USART_MR(usart) = (USART_MR(usart) & ~USART_MR_CHRL_MASK) |
((bits - 5) << 6);
}
void usart_set_stopbits(uint32_t usart, enum usart_stopbits sb)
{
USART_MR(usart) = (USART_MR(usart) & ~USART_MR_NBSTOP_MASK) |
(sb << 12);
}
void usart_set_parity(uint32_t usart, enum usart_parity par)
{
USART_MR(usart) = (USART_MR(usart) & ~USART_MR_PAR_MASK) | (par << 9);
}
void usart_set_mode(uint32_t usart, enum usart_mode mode)
{
USART_CR(usart) =
(mode & USART_MODE_RX) ? USART_CR_RXEN : USART_CR_RXDIS;
USART_CR(usart) = (mode & USART_MODE_TX) ? USART_CR_TXEN
: USART_CR_TXDIS;
}
void usart_set_flow_control(uint32_t usart, enum usart_flowcontrol fc)
{
USART_MR(usart) = (USART_MR(usart) & ~USART_MR_MODE_MASK) |
(fc ? USART_MR_MODE_HW_HANDSHAKING : 0);
}
void usart_enable(uint32_t usart)
{
USART_CR(usart) = USART_CR_TXEN | USART_CR_RXEN;
}
void usart_disable(uint32_t usart)
{
USART_CR(usart) = USART_CR_TXDIS | USART_CR_RXDIS;
}
void usart_send(uint32_t usart, uint16_t data)
{
USART_THR(usart) = data;
}
uint16_t usart_recv(uint32_t usart)
{
return USART_RHR(usart) & 0x1f;
}
void usart_wait_send_ready(uint32_t usart)
{
while ((USART_CSR(usart) & USART_CSR_TXRDY) == 0);
}
void usart_wait_recv_ready(uint32_t usart)
{
while ((USART_CSR(usart) & USART_CSR_RXRDY) == 0);
}
void usart_send_blocking(uint32_t usart, uint16_t data)
{
usart_wait_send_ready(usart);
usart_send(usart, data);
}
uint16_t usart_recv_blocking(uint32_t usart)
{
usart_wait_recv_ready(usart);
return usart_recv(usart);
}
void usart_enable_rx_interrupt(uint32_t usart)
{
USART_IER(usart) = USART_CSR_RXRDY;
}
void usart_disable_rx_interrupt(uint32_t usart)
{
USART_IDR(usart) = USART_CSR_RXRDY;
}
void usart_wp_enable(uint32_t usart)
{
USART_WPMR(usart) = USART_WPMR_KEY | USART_WPMR_WPEN;
}
void usart_wp_disable(uint32_t usart)
{
USART_WPMR(usart) = USART_WPMR_KEY & (~USART_WPMR_WPEN);
}
void usart_select_clock(uint32_t usart, enum usart_clock clk)
{
uint32_t reg_mr = USART_MR(usart) & (~USART_MR_USCLKS_MASK);
USART_MR(usart) = ((clk << USART_MR_USCLKS_SHIFT) & USART_MR_USCLKS_MASK) | reg_mr;
}
void usart_set_character_length(uint32_t usart, enum usart_chrl chrl)
{
uint32_t reg_mr = USART_MR(usart) & (~USART_MR_CHRL_MASK);
USART_MR(usart) = reg_mr | (chrl << USART_MR_CHRL_SHIFT);
}