70 lines
1.2 KiB
Plaintext
70 lines
1.2 KiB
Plaintext
EXTERN(vector_table)
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ENTRY(reset_handler)
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MEMORY
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{
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ram (rwx) : ORIGIN = 0x20000000, LENGTH = 20K
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rom (rx) : ORIGIN = 0x08000000, LENGTH = 64K
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}
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SECTIONS
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{
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.text : {
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*(.vectors)
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*(.text*)
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. = ALIGN(4);
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*(.rodata*)
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. = ALIGN(4);
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} >rom
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.preinit_array : {
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. = ALIGN(4);
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__preinit_array_start = .;
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KEEP (*(.preinit_array))
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__preinit_array_end = .;
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} >rom
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.init_array : {
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. = ALIGN(4);
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__init_array_start = .;
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KEEP (*(SORT(.init_array.*)))
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KEEP (*(.init_array))
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__init_array_end = .;
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} >rom
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.fini_array : {
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. = ALIGN(4);
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__fini_array_start = .;
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KEEP (*(.fini_array))
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KEEP (*(SORT(.fini_array.*)))
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__fini_array_end = .;
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} >rom
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.ARM.extab : {
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*(.ARM.extab*)
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} >rom
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.ARM.exidx : {
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__exidx_start = .;
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*(.ARM.exidx*)
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__exidx_end = .;
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} >rom
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. = ALIGN(4);
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_etext = .;
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.noinit (NOLOAD) : {
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*(.noinit*)
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} >ram
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. = ALIGN(4);
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.data : {
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_data = .;
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*(.data*)
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*(.ramtext*)
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. = ALIGN(4);
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_edata = .;
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} >ram AT >rom
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_data_loadaddr = LOADADDR(.data);
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.bss : {
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*(.bss*)
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*(COMMON)
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. = ALIGN(4);
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_ebss = .;
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} >ram
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/DISCARD/ : { *(.eh_frame) }
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. = ALIGN(4);
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end = .;
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}
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PROVIDE(_stack = ORIGIN(ram) + LENGTH(ram));
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