Arti Zirk
054740c5de
subrepo: subdir: "libopencm3" merged: "88e91c9a7cce" upstream: origin: "https://github.com/libopencm3/libopencm3.git" branch: "master" commit: "88e91c9a7cce" git-subrepo: version: "0.4.3" origin: "???" commit: "???"
1417 lines
31 KiB
YAML
1417 lines
31 KiB
YAML
!!omap
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- USB0_CAPLENGTH:
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fields: !!omap
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- CAPLENGTH:
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access: r
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description: Indicates offset to add to the register base address at the beginning
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of the Operational Register
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lsb: 0
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reset_value: '0x40'
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width: 8
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- HCIVERSION:
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access: r
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description: BCD encoding of the EHCI revision number supported by this host
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controller
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lsb: 8
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reset_value: '0x100'
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width: 16
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- USB0_HCSPARAMS:
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fields: !!omap
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- N_PORTS:
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access: r
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description: Number of downstream ports
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lsb: 0
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reset_value: '0x1'
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width: 4
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- PPC:
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access: r
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description: Port Power Control
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lsb: 4
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reset_value: '0x1'
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width: 1
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- N_PCC:
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access: r
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description: Number of Ports per Companion Controller
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lsb: 8
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reset_value: '0x0'
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width: 4
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- N_CC:
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access: r
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description: Number of Companion Controller
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lsb: 12
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reset_value: '0x0'
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width: 4
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- PI:
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access: r
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description: Port indicators
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lsb: 16
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reset_value: '0x1'
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width: 1
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- N_PTT:
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access: r
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description: Number of Ports per Transaction Translator
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lsb: 20
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reset_value: '0x0'
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width: 4
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- N_TT:
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access: r
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description: Number of Transaction Translators
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lsb: 24
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reset_value: '0x0'
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width: 4
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- USB0_HCCPARAMS:
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fields: !!omap
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- ADC:
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access: r
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description: 64-bit Addressing Capability
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lsb: 0
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reset_value: '0'
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width: 1
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- PFL:
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access: r
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description: Programmable Frame List Flag
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lsb: 1
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reset_value: '1'
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width: 1
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- ASP:
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access: r
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description: Asynchronous Schedule Park Capability
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lsb: 2
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reset_value: '1'
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width: 1
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- IST:
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access: r
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description: Isochronous Scheduling Threshold
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lsb: 4
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reset_value: '0'
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width: 4
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- EECP:
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access: r
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description: EHCI Extended Capabilities Pointer
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lsb: 8
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reset_value: '0'
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width: 4
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- USB0_DCCPARAMS:
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fields: !!omap
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- DEN:
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access: r
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description: Device Endpoint Number
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lsb: 0
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reset_value: '0x4'
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width: 5
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- DC:
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access: r
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description: Device Capable
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lsb: 7
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reset_value: '0x1'
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width: 1
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- HC:
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access: r
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description: Host Capable
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lsb: 8
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reset_value: '0x1'
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width: 1
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- USB0_USBCMD_D:
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fields: !!omap
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- RS:
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access: rw
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description: Run/Stop
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lsb: 0
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reset_value: '0'
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width: 1
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- RST:
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access: rw
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description: Controller reset
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lsb: 1
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reset_value: '0'
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width: 1
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- SUTW:
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access: rw
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description: Setup trip wire
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lsb: 13
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reset_value: '0'
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width: 1
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- ATDTW:
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access: rw
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description: Add dTD trip wire
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lsb: 14
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reset_value: '0'
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width: 1
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- ITC:
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access: rw
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description: Interrupt threshold control
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lsb: 16
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reset_value: '0x8'
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width: 8
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- USB0_USBCMD_H:
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fields: !!omap
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- RS:
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access: rw
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description: Run/Stop
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lsb: 0
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reset_value: '0'
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width: 1
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- RST:
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access: rw
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description: Controller reset
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lsb: 1
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reset_value: '0'
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width: 1
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- FS0:
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access: ''
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description: Bit 0 of the Frame List Size bits
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lsb: 2
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reset_value: '0'
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width: 1
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- FS1:
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access: ''
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description: Bit 1 of the Frame List Size bits
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lsb: 3
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reset_value: '0'
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width: 1
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- PSE:
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access: rw
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description: This bit controls whether the host controller skips processing
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the periodic schedule
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lsb: 4
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reset_value: '0'
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width: 1
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- ASE:
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access: rw
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description: This bit controls whether the host controller skips processing
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the asynchronous schedule
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lsb: 5
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reset_value: '0'
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width: 1
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- IAA:
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access: rw
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description: This bit is used as a doorbell by software to tell the host controller
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to issue an interrupt the next time it advances asynchronous schedule
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lsb: 6
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reset_value: '0'
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width: 1
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- ASP1_0:
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access: rw
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description: Asynchronous schedule park mode
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lsb: 8
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reset_value: '0x3'
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width: 2
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- ASPE:
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access: rw
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description: Asynchronous Schedule Park Mode Enable
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lsb: 11
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reset_value: '1'
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width: 1
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- FS2:
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access: ''
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description: Bit 2 of the Frame List Size bits
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lsb: 15
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reset_value: '0'
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width: 1
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- ITC:
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access: rw
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description: Interrupt threshold control
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lsb: 16
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reset_value: '0x8'
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width: 8
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- USB0_USBSTS_D:
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fields: !!omap
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- UI:
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access: rwc
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description: USB interrupt
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lsb: 0
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reset_value: '0'
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width: 1
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- UEI:
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access: rwc
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description: USB error interrupt
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lsb: 1
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reset_value: '0'
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width: 1
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- PCI:
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access: rwc
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description: Port change detect
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lsb: 2
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reset_value: '0'
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width: 1
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- URI:
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access: rwc
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description: USB reset received
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lsb: 6
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reset_value: '0'
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width: 1
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- SRI:
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access: rwc
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description: SOF received
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lsb: 7
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reset_value: '0'
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width: 1
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- SLI:
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access: rwc
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description: DCSuspend
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lsb: 8
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reset_value: '0'
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width: 1
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- NAKI:
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access: r
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description: NAK interrupt bit
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lsb: 16
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reset_value: '0'
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width: 1
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- USB0_USBSTS_H:
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fields: !!omap
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- UI:
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access: rwc
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description: USB interrupt
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lsb: 0
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reset_value: '0'
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width: 1
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- UEI:
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access: rwc
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description: USB error interrupt
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lsb: 1
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reset_value: '0'
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width: 1
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- PCI:
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access: rwc
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description: Port change detect
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lsb: 2
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reset_value: '0'
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width: 1
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- FRI:
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access: rwc
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description: Frame list roll-over
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lsb: 3
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reset_value: '0'
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width: 1
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- AAI:
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access: rwc
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description: Interrupt on async advance
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lsb: 5
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reset_value: '0'
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width: 1
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- SRI:
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access: rwc
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description: SOF received
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lsb: 7
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reset_value: '0'
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width: 1
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- HCH:
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access: r
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description: HCHalted
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lsb: 12
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reset_value: '1'
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width: 1
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- RCL:
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access: r
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description: Reclamation
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lsb: 13
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reset_value: '0'
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width: 1
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- PS:
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access: r
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description: Periodic schedule status
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lsb: 14
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reset_value: '0'
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width: 1
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- AS:
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access: ''
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description: Asynchronous schedule status
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lsb: 15
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reset_value: '0'
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width: 1
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- UAI:
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access: rwc
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description: USB host asynchronous interrupt (USBHSTASYNCINT)
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lsb: 18
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reset_value: '0'
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width: 1
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- UPI:
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access: rwc
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description: USB host periodic interrupt (USBHSTPERINT)
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lsb: 19
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reset_value: '0'
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width: 1
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- USB0_USBINTR_D:
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fields: !!omap
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- UE:
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access: rw
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description: USB interrupt enable
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lsb: 0
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reset_value: '0'
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width: 1
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- UEE:
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access: rw
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description: USB error interrupt enable
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lsb: 1
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reset_value: '0'
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width: 1
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- PCE:
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access: rw
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description: Port change detect enable
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lsb: 2
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reset_value: '0'
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width: 1
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- URE:
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access: rw
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description: USB reset enable
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lsb: 6
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reset_value: '0'
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width: 1
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- SRE:
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access: rw
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description: SOF received enable
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lsb: 7
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reset_value: '0'
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width: 1
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- SLE:
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access: rw
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description: Sleep enable
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lsb: 8
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reset_value: '0'
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width: 1
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- NAKE:
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access: rw
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description: NAK interrupt enable
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lsb: 16
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reset_value: '0'
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width: 1
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- USB0_USBINTR_H:
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fields: !!omap
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- UE:
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access: rw
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description: USB interrupt enable
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lsb: 0
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reset_value: '0'
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width: 1
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- UEE:
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access: rw
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description: USB error interrupt enable
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lsb: 1
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reset_value: '0'
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width: 1
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- PCE:
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access: rw
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description: Port change detect enable
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lsb: 2
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reset_value: '0'
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width: 1
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- FRE:
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access: rw
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description: Frame list rollover enable
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lsb: 3
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reset_value: '0'
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width: 1
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- AAE:
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access: rw
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description: Interrupt on asynchronous advance enable
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lsb: 5
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reset_value: '0'
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width: 1
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- SRE:
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access: ''
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description: SOF received enable
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lsb: 7
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reset_value: '0'
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width: 1
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- UAIE:
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access: rw
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description: USB host asynchronous interrupt enable
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lsb: 18
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reset_value: '0'
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width: 1
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- UPIA:
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access: rw
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description: USB host periodic interrupt enable
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lsb: 19
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reset_value: '0'
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width: 1
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- USB0_FRINDEX_D:
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fields: !!omap
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- FRINDEX2_0:
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access: r
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description: Current micro frame number
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lsb: 0
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reset_value: ''
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width: 3
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- FRINDEX13_3:
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access: r
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description: Current frame number of the last frame transmitted
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lsb: 3
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reset_value: ''
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width: 11
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- USB0_FRINDEX_H:
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fields: !!omap
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- FRINDEX2_0:
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access: rw
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description: Current micro frame number
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lsb: 0
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reset_value: ''
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width: 3
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- FRINDEX12_3:
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access: rw
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description: Frame list current index
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lsb: 3
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reset_value: ''
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width: 10
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- USB0_DEVICEADDR:
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fields: !!omap
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- USBADRA:
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access: ''
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description: Device address advance
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lsb: 24
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reset_value: '0'
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width: 1
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- USBADR:
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access: rw
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description: USB device address
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lsb: 25
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reset_value: '0'
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width: 7
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- USB0_PERIODICLISTBASE:
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fields: !!omap
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- PERBASE31_12:
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access: rw
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description: Base Address (Low)
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lsb: 12
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reset_value: ''
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width: 20
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- USB0_ENDPOINTLISTADDR:
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fields: !!omap
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- EPBASE31_11:
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access: rw
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description: Endpoint list pointer (low)
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lsb: 11
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reset_value: ''
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width: 21
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- USB0_ASYNCLISTADDR:
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fields: !!omap
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- ASYBASE31_5:
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access: rw
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description: Link pointer (Low) LPL
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lsb: 5
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reset_value: ''
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width: 27
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- USB0_TTCTRL:
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fields: !!omap
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- TTHA:
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access: rw
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description: Hub address when FS or LS device are connected directly
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lsb: 24
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reset_value: ''
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width: 7
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- USB0_BURSTSIZE:
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fields: !!omap
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- RXPBURST:
|
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access: rw
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description: Programmable RX burst length
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lsb: 0
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reset_value: '0x10'
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width: 8
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|
- TXPBURST:
|
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access: rw
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description: Programmable TX burst length
|
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lsb: 8
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reset_value: '0x10'
|
|
width: 8
|
|
- USB0_TXFILLTUNING:
|
|
fields: !!omap
|
|
- TXSCHOH:
|
|
access: rw
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|
description: FIFO burst threshold
|
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lsb: 0
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reset_value: '0x2'
|
|
width: 8
|
|
- TXSCHEATLTH:
|
|
access: rw
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|
description: Scheduler health counter
|
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lsb: 8
|
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reset_value: '0x0'
|
|
width: 5
|
|
- TXFIFOTHRES:
|
|
access: rw
|
|
description: Scheduler overhead
|
|
lsb: 16
|
|
reset_value: '0x0'
|
|
width: 6
|
|
- USB0_BINTERVAL:
|
|
fields: !!omap
|
|
- BINT:
|
|
access: rw
|
|
description: bInterval value
|
|
lsb: 0
|
|
reset_value: '0x00'
|
|
width: 4
|
|
- USB0_ENDPTNAK:
|
|
fields: !!omap
|
|
- EPRN:
|
|
access: rwc
|
|
description: Rx endpoint NAK
|
|
lsb: 0
|
|
reset_value: '0x00'
|
|
width: 6
|
|
- EPTN:
|
|
access: rwc
|
|
description: Tx endpoint NAK
|
|
lsb: 16
|
|
reset_value: '0x00'
|
|
width: 6
|
|
- USB0_ENDPTNAKEN:
|
|
fields: !!omap
|
|
- EPRNE:
|
|
access: rw
|
|
description: Rx endpoint NAK enable
|
|
lsb: 0
|
|
reset_value: '0x00'
|
|
width: 6
|
|
- EPTNE:
|
|
access: rw
|
|
description: Tx endpoint NAK
|
|
lsb: 16
|
|
reset_value: '0x00'
|
|
width: 6
|
|
- USB0_PORTSC1_D:
|
|
fields: !!omap
|
|
- CCS:
|
|
access: r
|
|
description: Current connect status
|
|
lsb: 0
|
|
reset_value: '0'
|
|
width: 1
|
|
- PE:
|
|
access: r
|
|
description: Port enable
|
|
lsb: 2
|
|
reset_value: '1'
|
|
width: 1
|
|
- PEC:
|
|
access: r
|
|
description: Port enable/disable change
|
|
lsb: 3
|
|
reset_value: '0'
|
|
width: 1
|
|
- FPR:
|
|
access: rw
|
|
description: Force port resume
|
|
lsb: 6
|
|
reset_value: '0'
|
|
width: 1
|
|
- SUSP:
|
|
access: r
|
|
description: Suspend
|
|
lsb: 7
|
|
reset_value: '0'
|
|
width: 1
|
|
- PR:
|
|
access: r
|
|
description: Port reset
|
|
lsb: 8
|
|
reset_value: '0'
|
|
width: 1
|
|
- HSP:
|
|
access: r
|
|
description: High-speed status
|
|
lsb: 9
|
|
reset_value: '0'
|
|
width: 1
|
|
- PIC1_0:
|
|
access: rw
|
|
description: Port indicator control
|
|
lsb: 14
|
|
reset_value: '0'
|
|
width: 2
|
|
- PTC3_0:
|
|
access: rw
|
|
description: Port test control
|
|
lsb: 16
|
|
reset_value: '0'
|
|
width: 4
|
|
- PHCD:
|
|
access: rw
|
|
description: PHY low power suspend - clock disable (PLPSCD)
|
|
lsb: 23
|
|
reset_value: '0'
|
|
width: 1
|
|
- PFSC:
|
|
access: rw
|
|
description: Port force full speed connect
|
|
lsb: 24
|
|
reset_value: '0'
|
|
width: 1
|
|
- PSPD:
|
|
access: r
|
|
description: Port speed
|
|
lsb: 26
|
|
reset_value: '0'
|
|
width: 2
|
|
- USB0_PORTSC1_H:
|
|
fields: !!omap
|
|
- CCS:
|
|
access: rwc
|
|
description: Current connect status
|
|
lsb: 0
|
|
reset_value: '0'
|
|
width: 1
|
|
- CSC:
|
|
access: rwc
|
|
description: Connect status change
|
|
lsb: 1
|
|
reset_value: '0'
|
|
width: 1
|
|
- PE:
|
|
access: rw
|
|
description: Port enable
|
|
lsb: 2
|
|
reset_value: '0'
|
|
width: 1
|
|
- PEC:
|
|
access: rwc
|
|
description: Port disable/enable change
|
|
lsb: 3
|
|
reset_value: '0'
|
|
width: 1
|
|
- OCA:
|
|
access: r
|
|
description: Over-current active
|
|
lsb: 4
|
|
reset_value: '0'
|
|
width: 1
|
|
- OCC:
|
|
access: rwc
|
|
description: Over-current change
|
|
lsb: 5
|
|
reset_value: '0'
|
|
width: 1
|
|
- FPR:
|
|
access: rw
|
|
description: Force port resume
|
|
lsb: 6
|
|
reset_value: '0'
|
|
width: 1
|
|
- SUSP:
|
|
access: rw
|
|
description: Suspend
|
|
lsb: 7
|
|
reset_value: '0'
|
|
width: 1
|
|
- PR:
|
|
access: rw
|
|
description: Port reset
|
|
lsb: 8
|
|
reset_value: '0'
|
|
width: 1
|
|
- HSP:
|
|
access: r
|
|
description: High-speed status
|
|
lsb: 9
|
|
reset_value: '0'
|
|
width: 1
|
|
- LS:
|
|
access: r
|
|
description: Line status
|
|
lsb: 10
|
|
reset_value: '0x3'
|
|
width: 2
|
|
- PP:
|
|
access: rw
|
|
description: Port power control
|
|
lsb: 12
|
|
reset_value: '0'
|
|
width: 1
|
|
- PIC1_0:
|
|
access: rw
|
|
description: Port indicator control
|
|
lsb: 14
|
|
reset_value: '0'
|
|
width: 2
|
|
- PTC3_0:
|
|
access: rw
|
|
description: Port test control
|
|
lsb: 16
|
|
reset_value: '0'
|
|
width: 4
|
|
- WKCN:
|
|
access: rw
|
|
description: Wake on connect enable (WKCNNT_E)
|
|
lsb: 20
|
|
reset_value: '0'
|
|
width: 1
|
|
- WKDC:
|
|
access: rw
|
|
description: Wake on disconnect enable (WKDSCNNT_E)
|
|
lsb: 21
|
|
reset_value: '0'
|
|
width: 1
|
|
- WKOC:
|
|
access: rw
|
|
description: Wake on over-current enable (WKOC_E)
|
|
lsb: 22
|
|
reset_value: '0'
|
|
width: 1
|
|
- PHCD:
|
|
access: rw
|
|
description: PHY low power suspend - clock disable (PLPSCD)
|
|
lsb: 23
|
|
reset_value: '0'
|
|
width: 1
|
|
- PFSC:
|
|
access: rw
|
|
description: Port force full speed connect
|
|
lsb: 24
|
|
reset_value: '0'
|
|
width: 1
|
|
- PSPD:
|
|
access: r
|
|
description: Port speed
|
|
lsb: 26
|
|
reset_value: '0'
|
|
width: 2
|
|
- USB0_OTGSC:
|
|
fields: !!omap
|
|
- VD:
|
|
access: rw
|
|
description: VBUS_Discharge
|
|
lsb: 0
|
|
reset_value: '0'
|
|
width: 1
|
|
- VC:
|
|
access: rw
|
|
description: VBUS_Charge
|
|
lsb: 1
|
|
reset_value: '0'
|
|
width: 1
|
|
- HAAR:
|
|
access: rw
|
|
description: Hardware assist auto_reset
|
|
lsb: 2
|
|
reset_value: '0'
|
|
width: 1
|
|
- OT:
|
|
access: rw
|
|
description: OTG termination
|
|
lsb: 3
|
|
reset_value: '0'
|
|
width: 1
|
|
- DP:
|
|
access: rw
|
|
description: Data pulsing
|
|
lsb: 4
|
|
reset_value: '0'
|
|
width: 1
|
|
- IDPU:
|
|
access: rw
|
|
description: ID pull-up
|
|
lsb: 5
|
|
reset_value: '1'
|
|
width: 1
|
|
- HADP:
|
|
access: rw
|
|
description: Hardware assist data pulse
|
|
lsb: 6
|
|
reset_value: '0'
|
|
width: 1
|
|
- HABA:
|
|
access: rw
|
|
description: Hardware assist B-disconnect to A-connect
|
|
lsb: 7
|
|
reset_value: '0'
|
|
width: 1
|
|
- ID:
|
|
access: r
|
|
description: USB ID
|
|
lsb: 8
|
|
reset_value: '0'
|
|
width: 1
|
|
- AVV:
|
|
access: r
|
|
description: A-VBUS valid
|
|
lsb: 9
|
|
reset_value: '0'
|
|
width: 1
|
|
- ASV:
|
|
access: r
|
|
description: A-session valid
|
|
lsb: 10
|
|
reset_value: '0'
|
|
width: 1
|
|
- BSV:
|
|
access: r
|
|
description: B-session valid
|
|
lsb: 11
|
|
reset_value: '0'
|
|
width: 1
|
|
- BSE:
|
|
access: r
|
|
description: B-session end
|
|
lsb: 12
|
|
reset_value: '0'
|
|
width: 1
|
|
- MS1T:
|
|
access: r
|
|
description: 1 millisecond timer toggle
|
|
lsb: 13
|
|
reset_value: '0'
|
|
width: 1
|
|
- DPS:
|
|
access: r
|
|
description: Data bus pulsing status
|
|
lsb: 14
|
|
reset_value: '0'
|
|
width: 1
|
|
- IDIS:
|
|
access: rwc
|
|
description: USB ID interrupt status
|
|
lsb: 16
|
|
reset_value: '0'
|
|
width: 1
|
|
- AVVIS:
|
|
access: rwc
|
|
description: A-VBUS valid interrupt status
|
|
lsb: 17
|
|
reset_value: '0'
|
|
width: 1
|
|
- ASVIS:
|
|
access: rwc
|
|
description: A-Session valid interrupt status
|
|
lsb: 18
|
|
reset_value: '0'
|
|
width: 1
|
|
- BSVIS:
|
|
access: rwc
|
|
description: B-Session valid interrupt status
|
|
lsb: 19
|
|
reset_value: '0'
|
|
width: 1
|
|
- BSEIS:
|
|
access: rwc
|
|
description: B-Session end interrupt status
|
|
lsb: 20
|
|
reset_value: '0'
|
|
width: 1
|
|
- MS1S:
|
|
access: rwc
|
|
description: 1 millisecond timer interrupt status
|
|
lsb: 21
|
|
reset_value: '0'
|
|
width: 1
|
|
- DPIS:
|
|
access: rwc
|
|
description: Data pulse interrupt status
|
|
lsb: 22
|
|
reset_value: '0'
|
|
width: 1
|
|
- IDIE:
|
|
access: rw
|
|
description: USB ID interrupt enable
|
|
lsb: 24
|
|
reset_value: '0'
|
|
width: 1
|
|
- AVVIE:
|
|
access: rw
|
|
description: A-VBUS valid interrupt enable
|
|
lsb: 25
|
|
reset_value: '0'
|
|
width: 1
|
|
- ASVIE:
|
|
access: rw
|
|
description: A-session valid interrupt enable
|
|
lsb: 26
|
|
reset_value: '0'
|
|
width: 1
|
|
- BSVIE:
|
|
access: rw
|
|
description: B-session valid interrupt enable
|
|
lsb: 27
|
|
reset_value: '0'
|
|
width: 1
|
|
- BSEIE:
|
|
access: rw
|
|
description: B-session end interrupt enable
|
|
lsb: 28
|
|
reset_value: '0'
|
|
width: 1
|
|
- MS1E:
|
|
access: rw
|
|
description: 1 millisecond timer interrupt enable
|
|
lsb: 29
|
|
reset_value: '0'
|
|
width: 1
|
|
- DPIE:
|
|
access: rw
|
|
description: Data pulse interrupt enable
|
|
lsb: 30
|
|
reset_value: '0'
|
|
width: 1
|
|
- USB0_USBMODE_D:
|
|
fields: !!omap
|
|
- CM1_0:
|
|
access: rwo
|
|
description: Controller mode
|
|
lsb: 0
|
|
reset_value: '0'
|
|
width: 2
|
|
- ES:
|
|
access: rw
|
|
description: Endian select
|
|
lsb: 2
|
|
reset_value: '0'
|
|
width: 1
|
|
- SLOM:
|
|
access: rw
|
|
description: Setup Lockout mode
|
|
lsb: 3
|
|
reset_value: '0'
|
|
width: 1
|
|
- SDIS:
|
|
access: rw
|
|
description: Setup Lockout mode
|
|
lsb: 4
|
|
reset_value: '0'
|
|
width: 1
|
|
- USB0_USBMODE_H:
|
|
fields: !!omap
|
|
- CM:
|
|
access: rwo
|
|
description: Controller mode
|
|
lsb: 0
|
|
reset_value: '0'
|
|
width: 2
|
|
- ES:
|
|
access: rw
|
|
description: Endian select
|
|
lsb: 2
|
|
reset_value: '0'
|
|
width: 1
|
|
- SDIS:
|
|
access: rw
|
|
description: Stream disable mode
|
|
lsb: 4
|
|
reset_value: '0'
|
|
width: 1
|
|
- VBPS:
|
|
access: rwo
|
|
description: VBUS power select
|
|
lsb: 5
|
|
reset_value: '0'
|
|
width: 1
|
|
- USB0_ENDPTSETUPSTAT:
|
|
fields: !!omap
|
|
- ENDPTSETUPSTAT:
|
|
access: rwc
|
|
description: Setup endpoint status for logical endpoints 0 to 5
|
|
lsb: 0
|
|
reset_value: '0'
|
|
width: 6
|
|
- USB0_ENDPTPRIME:
|
|
fields: !!omap
|
|
- PERB:
|
|
access: rws
|
|
description: Prime endpoint receive buffer for physical OUT endpoints 5 to
|
|
0
|
|
lsb: 0
|
|
reset_value: '0'
|
|
width: 6
|
|
- PETB:
|
|
access: rws
|
|
description: Prime endpoint transmit buffer for physical IN endpoints 5 to
|
|
0
|
|
lsb: 16
|
|
reset_value: '0'
|
|
width: 6
|
|
- USB0_ENDPTFLUSH:
|
|
fields: !!omap
|
|
- FERB:
|
|
access: rwc
|
|
description: Flush endpoint receive buffer for physical OUT endpoints 5 to
|
|
0
|
|
lsb: 0
|
|
reset_value: '0'
|
|
width: 6
|
|
- FETB:
|
|
access: rwc
|
|
description: Flush endpoint transmit buffer for physical IN endpoints 5 to
|
|
0
|
|
lsb: 16
|
|
reset_value: '0'
|
|
width: 6
|
|
- USB0_ENDPTSTAT:
|
|
fields: !!omap
|
|
- ERBR:
|
|
access: r
|
|
description: Endpoint receive buffer ready for physical OUT endpoints 5 to
|
|
0
|
|
lsb: 0
|
|
reset_value: '0'
|
|
width: 6
|
|
- ETBR:
|
|
access: r
|
|
description: Endpoint transmit buffer ready for physical IN endpoints 3 to
|
|
0
|
|
lsb: 16
|
|
reset_value: '0'
|
|
width: 6
|
|
- USB0_ENDPTCOMPLETE:
|
|
fields: !!omap
|
|
- ERCE:
|
|
access: rwc
|
|
description: Endpoint receive complete event for physical OUT endpoints 5
|
|
to 0
|
|
lsb: 0
|
|
reset_value: '0'
|
|
width: 6
|
|
- ETCE:
|
|
access: rwc
|
|
description: Endpoint transmit complete event for physical IN endpoints 5
|
|
to 0
|
|
lsb: 16
|
|
reset_value: '0'
|
|
width: 6
|
|
- USB0_ENDPTCTRL0:
|
|
fields: !!omap
|
|
- RXS:
|
|
access: rw
|
|
description: Rx endpoint stall
|
|
lsb: 0
|
|
reset_value: '0'
|
|
width: 1
|
|
- RXT1_0:
|
|
access: rw
|
|
description: Endpoint type
|
|
lsb: 2
|
|
reset_value: '0'
|
|
width: 2
|
|
- RXE:
|
|
access: r
|
|
description: Rx endpoint enable
|
|
lsb: 7
|
|
reset_value: '1'
|
|
width: 1
|
|
- TXS:
|
|
access: rw
|
|
description: Tx endpoint stall
|
|
lsb: 16
|
|
reset_value: ''
|
|
width: 1
|
|
- TXT1_0:
|
|
access: r
|
|
description: Endpoint type
|
|
lsb: 18
|
|
reset_value: '0'
|
|
width: 2
|
|
- TXE:
|
|
access: r
|
|
description: Tx endpoint enable
|
|
lsb: 23
|
|
reset_value: '1'
|
|
width: 1
|
|
- USB0_ENDPTCTRL1:
|
|
fields: !!omap
|
|
- RXS:
|
|
access: rw
|
|
description: Rx endpoint stall
|
|
lsb: 0
|
|
reset_value: '0'
|
|
width: 1
|
|
- RXT:
|
|
access: rw
|
|
description: Endpoint type
|
|
lsb: 2
|
|
reset_value: '0'
|
|
width: 2
|
|
- RXI:
|
|
access: rw
|
|
description: Rx data toggle inhibit
|
|
lsb: 5
|
|
reset_value: '0'
|
|
width: 1
|
|
- RXR:
|
|
access: ws
|
|
description: Rx data toggle reset
|
|
lsb: 6
|
|
reset_value: '0'
|
|
width: 1
|
|
- RXE:
|
|
access: rw
|
|
description: Rx endpoint enable
|
|
lsb: 7
|
|
reset_value: '0'
|
|
width: 1
|
|
- TXS:
|
|
access: rw
|
|
description: Tx endpoint stall
|
|
lsb: 16
|
|
reset_value: '0'
|
|
width: 1
|
|
- TXT1_0:
|
|
access: r
|
|
description: Tx Endpoint type
|
|
lsb: 18
|
|
reset_value: '0'
|
|
width: 2
|
|
- TXI:
|
|
access: rw
|
|
description: Tx data toggle inhibit
|
|
lsb: 21
|
|
reset_value: '0'
|
|
width: 1
|
|
- TXR:
|
|
access: ws
|
|
description: Tx data toggle reset
|
|
lsb: 22
|
|
reset_value: '1'
|
|
width: 1
|
|
- TXE:
|
|
access: r
|
|
description: Tx endpoint enable
|
|
lsb: 23
|
|
reset_value: '0'
|
|
width: 1
|
|
- USB0_ENDPTCTRL2:
|
|
fields: !!omap
|
|
- RXS:
|
|
access: rw
|
|
description: Rx endpoint stall
|
|
lsb: 0
|
|
reset_value: '0'
|
|
width: 1
|
|
- RXT:
|
|
access: rw
|
|
description: Endpoint type
|
|
lsb: 2
|
|
reset_value: '0'
|
|
width: 2
|
|
- RXI:
|
|
access: rw
|
|
description: Rx data toggle inhibit
|
|
lsb: 5
|
|
reset_value: '0'
|
|
width: 1
|
|
- RXR:
|
|
access: ws
|
|
description: Rx data toggle reset
|
|
lsb: 6
|
|
reset_value: '0'
|
|
width: 1
|
|
- RXE:
|
|
access: rw
|
|
description: Rx endpoint enable
|
|
lsb: 7
|
|
reset_value: '0'
|
|
width: 1
|
|
- TXS:
|
|
access: rw
|
|
description: Tx endpoint stall
|
|
lsb: 16
|
|
reset_value: '0'
|
|
width: 1
|
|
- TXT1_0:
|
|
access: r
|
|
description: Tx Endpoint type
|
|
lsb: 18
|
|
reset_value: '0'
|
|
width: 2
|
|
- TXI:
|
|
access: rw
|
|
description: Tx data toggle inhibit
|
|
lsb: 21
|
|
reset_value: '0'
|
|
width: 1
|
|
- TXR:
|
|
access: ws
|
|
description: Tx data toggle reset
|
|
lsb: 22
|
|
reset_value: '1'
|
|
width: 1
|
|
- TXE:
|
|
access: r
|
|
description: Tx endpoint enable
|
|
lsb: 23
|
|
reset_value: '0'
|
|
width: 1
|
|
- USB0_ENDPTCTRL3:
|
|
fields: !!omap
|
|
- RXS:
|
|
access: rw
|
|
description: Rx endpoint stall
|
|
lsb: 0
|
|
reset_value: '0'
|
|
width: 1
|
|
- RXT:
|
|
access: rw
|
|
description: Endpoint type
|
|
lsb: 2
|
|
reset_value: '0'
|
|
width: 2
|
|
- RXI:
|
|
access: rw
|
|
description: Rx data toggle inhibit
|
|
lsb: 5
|
|
reset_value: '0'
|
|
width: 1
|
|
- RXR:
|
|
access: ws
|
|
description: Rx data toggle reset
|
|
lsb: 6
|
|
reset_value: '0'
|
|
width: 1
|
|
- RXE:
|
|
access: rw
|
|
description: Rx endpoint enable
|
|
lsb: 7
|
|
reset_value: '0'
|
|
width: 1
|
|
- TXS:
|
|
access: rw
|
|
description: Tx endpoint stall
|
|
lsb: 16
|
|
reset_value: '0'
|
|
width: 1
|
|
- TXT1_0:
|
|
access: r
|
|
description: Tx Endpoint type
|
|
lsb: 18
|
|
reset_value: '0'
|
|
width: 2
|
|
- TXI:
|
|
access: rw
|
|
description: Tx data toggle inhibit
|
|
lsb: 21
|
|
reset_value: '0'
|
|
width: 1
|
|
- TXR:
|
|
access: ws
|
|
description: Tx data toggle reset
|
|
lsb: 22
|
|
reset_value: '1'
|
|
width: 1
|
|
- TXE:
|
|
access: r
|
|
description: Tx endpoint enable
|
|
lsb: 23
|
|
reset_value: '0'
|
|
width: 1
|
|
- USB0_ENDPTCTRL4:
|
|
fields: !!omap
|
|
- RXS:
|
|
access: rw
|
|
description: Rx endpoint stall
|
|
lsb: 0
|
|
reset_value: '0'
|
|
width: 1
|
|
- RXT:
|
|
access: rw
|
|
description: Endpoint type
|
|
lsb: 2
|
|
reset_value: '0'
|
|
width: 2
|
|
- RXI:
|
|
access: rw
|
|
description: Rx data toggle inhibit
|
|
lsb: 5
|
|
reset_value: '0'
|
|
width: 1
|
|
- RXR:
|
|
access: ws
|
|
description: Rx data toggle reset
|
|
lsb: 6
|
|
reset_value: '0'
|
|
width: 1
|
|
- RXE:
|
|
access: rw
|
|
description: Rx endpoint enable
|
|
lsb: 7
|
|
reset_value: '0'
|
|
width: 1
|
|
- TXS:
|
|
access: rw
|
|
description: Tx endpoint stall
|
|
lsb: 16
|
|
reset_value: '0'
|
|
width: 1
|
|
- TXT1_0:
|
|
access: r
|
|
description: Tx Endpoint type
|
|
lsb: 18
|
|
reset_value: '0'
|
|
width: 2
|
|
- TXI:
|
|
access: rw
|
|
description: Tx data toggle inhibit
|
|
lsb: 21
|
|
reset_value: '0'
|
|
width: 1
|
|
- TXR:
|
|
access: ws
|
|
description: Tx data toggle reset
|
|
lsb: 22
|
|
reset_value: '1'
|
|
width: 1
|
|
- TXE:
|
|
access: r
|
|
description: Tx endpoint enable
|
|
lsb: 23
|
|
reset_value: '0'
|
|
width: 1
|
|
- USB0_ENDPTCTRL5:
|
|
fields: !!omap
|
|
- RXS:
|
|
access: rw
|
|
description: Rx endpoint stall
|
|
lsb: 0
|
|
reset_value: '0'
|
|
width: 1
|
|
- RXT:
|
|
access: rw
|
|
description: Endpoint type
|
|
lsb: 2
|
|
reset_value: '0'
|
|
width: 2
|
|
- RXI:
|
|
access: rw
|
|
description: Rx data toggle inhibit
|
|
lsb: 5
|
|
reset_value: '0'
|
|
width: 1
|
|
- RXR:
|
|
access: ws
|
|
description: Rx data toggle reset
|
|
lsb: 6
|
|
reset_value: '0'
|
|
width: 1
|
|
- RXE:
|
|
access: rw
|
|
description: Rx endpoint enable
|
|
lsb: 7
|
|
reset_value: '0'
|
|
width: 1
|
|
- TXS:
|
|
access: rw
|
|
description: Tx endpoint stall
|
|
lsb: 16
|
|
reset_value: '0'
|
|
width: 1
|
|
- TXT1_0:
|
|
access: r
|
|
description: Tx Endpoint type
|
|
lsb: 18
|
|
reset_value: '0'
|
|
width: 2
|
|
- TXI:
|
|
access: rw
|
|
description: Tx data toggle inhibit
|
|
lsb: 21
|
|
reset_value: '0'
|
|
width: 1
|
|
- TXR:
|
|
access: ws
|
|
description: Tx data toggle reset
|
|
lsb: 22
|
|
reset_value: '1'
|
|
width: 1
|
|
- TXE:
|
|
access: r
|
|
description: Tx endpoint enable
|
|
lsb: 23
|
|
reset_value: '0'
|
|
width: 1
|