Arti Zirk
054740c5de
subrepo: subdir: "libopencm3" merged: "88e91c9a7cce" upstream: origin: "https://github.com/libopencm3/libopencm3.git" branch: "master" commit: "88e91c9a7cce" git-subrepo: version: "0.4.3" origin: "???" commit: "???"
152 lines
4.3 KiB
C
152 lines
4.3 KiB
C
/** @addtogroup dac_file DAC peripheral API
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* @ingroup peripheral_apis
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@author @htmlonly © @endhtmlonly 2020 Ben Brewer <ben.brewer@codethink.co.uk>
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LGPL License Terms @ref lgpl_license
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*/
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/*
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* This file is part of the libopencm3 project.
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*
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* Copyright (C) 2020 Ben Brewer
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*
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* This library is free software: you can redistribute it and/or modify
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* it under the terms of the GNU Lesser General Public License as published by
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* the Free Software Foundation, either version 3 of the License, or
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* (at your option) any later version.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public License
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* along with this library. If not, see <http://www.gnu.org/licenses/>.
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*/
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/**@{*/
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#include <libopencm3/stm32/dac.h>
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/** @brief DAC Channel Output Buffer Enable.
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Enable a digital to analog converter channel output drive buffer. This is an
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optional amplifying buffer that provides additional drive for the output
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signal. The buffer is enabled by default after a reset and needs to be
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explicitly disabled if required.
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@param[in] dac the base address of the DAC. @ref dac_reg_base
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@param[in] channel with DAC mask. @ref dac_channel_id
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*/
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void dac_buffer_enable(uint32_t dac, int channel)
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{
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switch (channel) {
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case DAC_CHANNEL1:
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DAC_MCR(dac) &= ~DAC_MCR_MODE1_UNBUFFERED;
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break;
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case DAC_CHANNEL2:
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DAC_MCR(dac) &= ~DAC_MCR_MODE2_UNBUFFERED;
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break;
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case DAC_CHANNEL_BOTH:
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DAC_MCR(dac) &= ~(DAC_MCR_MODE1_UNBUFFERED |
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DAC_MCR_MODE2_UNBUFFERED);
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break;
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default:
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break;
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}
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}
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/** @brief DAC Channel Output Buffer Disable.
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Disable a digital to analog converter channel output drive buffer. Disabling
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this will reduce power consumption slightly and will increase the output
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impedance of the DAC. The buffers are enabled by default after a reset.
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@param[in] dac the base address of the DAC. @ref dac_reg_base
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@param[in] channel with DAC mask. @ref dac_channel_id
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*/
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void dac_buffer_disable(uint32_t dac, int channel)
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{
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switch (channel) {
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case DAC_CHANNEL1:
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DAC_MCR(dac) |= DAC_MCR_MODE1_UNBUFFERED;
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break;
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case DAC_CHANNEL2:
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DAC_MCR(dac) |= DAC_MCR_MODE2_UNBUFFERED;
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break;
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case DAC_CHANNEL_BOTH:
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DAC_MCR(dac) |= (DAC_MCR_MODE1_UNBUFFERED
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| DAC_MCR_MODE2_UNBUFFERED);
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break;
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default:
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break;
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}
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}
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/** @brief DAC Channel Output Mode.
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Each DAC channel can be configured in Normal mode or Sample and hold mode. The
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output buffer can be enabled to allow a high drive capability. Before enabling
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output buffer, the voltage offset needs to be calibrated. This calibration is
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performed at the factory (loaded after reset) and can be adjusted by software
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during application operation.
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@note This must be called before enabling the DAC as the settings will then
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become read-only.
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@param[in] dac the base address of the DAC. @ref dac_reg_base
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@param[in] mode Taken from @ref dac_mode2_sel or @ref dac_mode1_sel or
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a logical OR of one of each of these to set both channels simultaneously.
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*/
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void dac_set_mode(uint32_t dac, uint32_t mode)
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{
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DAC_MCR(dac) |= mode;
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}
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/** @brief Check if DAC channel is ready to receive data.
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@param[in] dac the base address of the DAC. @ref dac_reg_base
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@param[in] channel with DAC mask. @ref dac_channel_id
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*/
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bool dac_is_ready(uint32_t dac, int channel)
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{
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uint32_t mask = 0;
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if (channel & DAC_CHANNEL1) {
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mask |= DAC_SR_DAC1RDY;
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}
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if (channel & DAC_CHANNEL2) {
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mask |= DAC_SR_DAC2RDY;
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}
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return (DAC_SR(dac) & mask) != 0;
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}
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/** @brief Wait until DAC channel is ready to receive data.
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@param[in] dac the base address of the DAC. @ref dac_reg_base
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@param[in] channel with DAC mask. @ref dac_channel_id
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*/
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void dac_wait_on_ready(uint32_t dac, int channel)
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{
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while (!dac_is_ready(dac, channel));
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}
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/** @brief High frequency interface mode selection.
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If the AHB frequency of the DAC is above 80MHz then this value needs setting
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to an appropriate value.
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@param[in] dac the base address of the DAC. @ref dac_reg_base
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@param[in] hfsel uint32_t with appropriate HFSEL mask.
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*/
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void dac_set_high_frequency_mode(uint32_t dac, uint32_t hfsel)
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{
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uint32_t reg32 = DAC_MCR(dac);
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reg32 &= ~(DAC_MCR_HFSEL_MASK << DAC_MCR_HFSEL_SHIFT);
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reg32 |= hfsel;
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DAC_MCR(dac) = reg32;
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}
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/**@}*/
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