449 lines
14 KiB
C
449 lines
14 KiB
C
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/** @defgroup gpio_file General-Purpose I/O
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*
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* @ingroup MSP432E4xx
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*
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* @brief libopencm3 MSP432E4xx General Purpose Input/Outputs
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*
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* @version 1.0.0
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*
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* @date 23 September 2018
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*
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* LGPL License Terms @ref lgpl_license
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*/
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/*
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* This file is part of the libopencm3 project.
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*
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* Copyright (C) 2011 Gareth McMullin <gareth@blacksphere.co.nz>
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* Copyright (C) 2013 Alexandru Gagniuc <mr.nuke.me@gmail.com>
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* Copyright (C) 2018 Dmitry Rezvanov <dmitry.rezvanov@yandex.ru>
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*
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* This library is free software: you can redistribute it and/or modify
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* it under the terms of the GNU Lesser General Public License as published by
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* the Free Software Foundation, either version 3 of the License, or
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* (at your option) any later version.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public License
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* along with this library. If not, see <http://www.gnu.org/licenses/>.
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*/
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#include <libopencm3/msp432/e4/gpio.h>
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#include <libopencm3/msp432/e4/systemcontrol.h>
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/** @brief General Purpose Input/Outputs Set Pin Mode
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*
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* Sets the Pin Direction, Analog/Digital Mode and Output Pin Pull,
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* for a set of GPIO pins on a given GPIO port.
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*
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* @param[in] gpioport GPIO block register address base @ref gpio_reg_base
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* @param[in] mode Pin mode @ref gpio_mode
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* - GPIO_MODE_OUTPUT -- Configure pin as output
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* - GPIO_MODE_INPUT -- Configure pin as input
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* - GPIO_MODE_ANALOG -- Configure pin as analog function
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* @param[in] pull_up_down Pin pull up/down configuration @ref gpio_pull_up_down
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* - GPIO_PUPD_NONE -- Do not pull the pin high or low
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* - GPIO_PUPD_PULLUP -- Pull the pin high
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* - GPIO_PUPD_PULLDOWN -- Pull the pin low
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* @param[in] gpios Pin identifiers @ref gpio_pin_id. If multiple pins are
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* to be set, use bitwise OR '|' to separate them.
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*/
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void gpio_mode_setup(uint32_t gpioport, enum gpio_mode mode,
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enum gpio_pull_up_down pull_up_down, uint8_t gpios)
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{
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GPIO_AFSEL(gpioport) &= ~gpios;
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switch (mode) {
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case GPIO_MODE_OUTPUT:
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GPIO_DIR(gpioport) |= gpios;
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GPIO_DEN(gpioport) |= gpios;
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GPIO_AMSEL(gpioport) &= ~gpios;
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break;
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case GPIO_MODE_INPUT:
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GPIO_DIR(gpioport) &= ~gpios;
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GPIO_DEN(gpioport) |= gpios;
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GPIO_AMSEL(gpioport) &= ~gpios;
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break;
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case GPIO_MODE_ANALOG:
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GPIO_AFSEL(gpioport) |= gpios;
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GPIO_DEN(gpioport) &= ~gpios;
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GPIO_AMSEL(gpioport) |= gpios;
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break;
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default:
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/* Don't do anything */
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break;
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}
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/*
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* Setting a bit in the GPIO_PDR register clears the corresponding bit
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* in the GPIO_PUR register, and vice-versa.
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*/
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switch (pull_up_down) {
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case GPIO_PUPD_PULLUP:
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GPIO_PDR(gpioport) &= ~gpios;
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GPIO_PUR(gpioport) |= gpios;
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break;
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case GPIO_PUPD_PULLDOWN:
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GPIO_PUR(gpioport) &= ~gpios;
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GPIO_PDR(gpioport) |= gpios;
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break;
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case GPIO_PUPD_NONE: /* Fall through */
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default:
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GPIO_PUR(gpioport) &= ~gpios;
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GPIO_PDR(gpioport) &= ~gpios;
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break;
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}
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}
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/** @brief General Purpose Input/Outputs Set Output Options
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*
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* When the pin is set to output mode, this sets the configuration
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* (open drain/push pull), drive strength, speed and slew rate control,
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* for a set of GPIO pins on a given GPIO port.
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*
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* @param[in] gpioport GPIO block register address base @ref gpio_reg_base
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* @param[in] otype Output driver configuration @ref gpio_output_type
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* - GPIO_OTYPE_PP -- Configure pin driver as push-pull \n
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* - GPIO_OTYPE_OD -- Configure pin driver as open drain
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* @param[in] drive Pin drive strength @ref gpio_drive_strength
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* - GPIO_DRIVE_2MA -- 2mA drive \n
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* - GPIO_DRIVE_4MA -- 4mA drive \n
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* - GPIO_DRIVE_6MA -- 4mA drive \n
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* - GPIO_DRIVE_8MA -- 8mA drive \n
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* - GPIO_DRIVE_10MA -- 10mA drive \n
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* - GPIO_DRIVE_12MA -- 12mA drive
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* @param[in] slewctl Pin slew rate control select @ref gpio_slew_ctl
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* @note Available only for 8, 10 and 12-ma drive strength.
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* - GPIO_SLEW_CTL_ENABLE -- Slew rate control enable
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* - GPIO_SLEW_CTL_DISABLE -- Slew rate control disable
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* @param[in] gpios Pin identifiers @ref gpio_pin_id. If multiple pins are
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* to be set, use bitwise OR '|' to separate them.
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*/
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void gpio_set_output_options(uint32_t gpioport,
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enum gpio_output_type otype,
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enum gpio_drive_strength drive,
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enum gpio_slew_ctl slewctl,
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uint8_t gpios)
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{
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uint8_t i;
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uint8_t pin_mask;
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if (otype == GPIO_OTYPE_OD) {
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GPIO_ODR(gpioport) |= gpios;
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} else {
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GPIO_ODR(gpioport) &= ~gpios;
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}
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GPIO_PP(gpioport) |= GPIO_PP_EDE;
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for (i = 0; i < 8; i++) {
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pin_mask = (1 << i);
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if (!(gpios & pin_mask)) {
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continue;
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}
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GPIO_PC(gpioport) &= ~GPIO_PC_EDM_MASK(i);
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GPIO_PC(gpioport) |= GPIO_PC_EDM(i, GPIO_PC_EDM_FULL_RANGE);
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}
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GPIO_DR4R(gpioport) &= ~gpios;
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GPIO_DR8R(gpioport) &= ~gpios;
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GPIO_DR12R(gpioport) &= ~gpios;
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switch (drive) {
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case GPIO_DRIVE_4MA:
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GPIO_DR4R(gpioport) |= gpios;
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break;
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case GPIO_DRIVE_6MA:
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GPIO_DR8R(gpioport) |= gpios;
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break;
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case GPIO_DRIVE_8MA:
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GPIO_DR4R(gpioport) |= gpios;
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GPIO_DR8R(gpioport) |= gpios;
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break;
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case GPIO_DRIVE_10MA:
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GPIO_DR8R(gpioport) |= gpios;
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GPIO_DR12R(gpioport) |= gpios;
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break;
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case GPIO_DRIVE_12MA:
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GPIO_DR4R(gpioport) |= gpios;
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GPIO_DR8R(gpioport) |= gpios;
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GPIO_DR12R(gpioport) |= gpios;
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break;
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case GPIO_DRIVE_2MA: /* Fall through */
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default:
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/* don't anything */
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break;
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}
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if ((slewctl == GPIO_SLEW_CTL_ENABLE) &&
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((drive == GPIO_DRIVE_8MA) || (drive == GPIO_DRIVE_10MA) ||
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(drive == GPIO_DRIVE_12MA))) {
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GPIO_SLR(gpioport) |= gpios;
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} else {
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GPIO_SLR(gpioport) &= ~gpios;
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}
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}
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/** @brief General Purpose Input/Outputs Set Alternate Function Selection
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*
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* Mux the pin or group of pins to the given alternate function. Note that a
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* number of pins may be set but only with a single AF number.
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*
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* Because AF0 is not used on the MSP432E4,
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* passing GPIO_AF_DISABLE as the alt_func_num parameter will disable
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* the alternate function of the given pins.
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*
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* @param[in] gpioport GPIO block register address base @ref gpio_reg_base
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* @param[in] alt_func_num Pin alternate function number or GPIO_AF_DISABLE to
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* disable the alternate function multiplexing.
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* @param[in] gpios Pin identifiers @ref gpio_pin_id. If multiple pins are
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* to be set, use bitwise OR '|' to separate them.
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*/
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void gpio_set_af(uint32_t gpioport, uint8_t alt_func_num, uint8_t gpios)
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{
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uint32_t pctl32;
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uint8_t pin_mask;
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uint8_t i;
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/* Did we mean to disable the alternate function? */
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if (alt_func_num == 0) {
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GPIO_AFSEL(gpioport) &= ~gpios;
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return;
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}
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/* Enable the alternate function */
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GPIO_AFSEL(gpioport) |= gpios;
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/* Now take care of the actual multiplexing */
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pctl32 = GPIO_PCTL(gpioport);
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for (i = 0; i < 8; i++) {
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pin_mask = (1 << i);
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if (!(gpios & pin_mask)) {
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continue;
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}
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pctl32 &= ~GPIO_PCTL_MASK(i);
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pctl32 |= GPIO_PCTL_AF(i, (alt_func_num & 0xf));
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}
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GPIO_PCTL(gpioport) = pctl32;
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}
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/** @brief General Purpose Input/Outputs Configure Interrupt Trigger
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*
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* Sets the trigger level/edge, for a set of GPIO pins on a given GPIO port.
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*
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* @param[in] gpioport GPIO block register address base @ref gpio_reg_base
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* @param[in] trigger Trigger configuration @ref gpio_trigger
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* - GPIO_TRIG_LVL_LOW -- Trigger on low level
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* - GPIO_TRIG_LVL_HIGH -- Trigger on high level
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* - GPIO_TRIG_EDGE_FALL -- Trigger on falling edges
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* - GPIO_TRIG_EDGE_RISE -- Trigger on rising edges
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* - GPIO_TRIG_EDGE_BOTH -- Trigger on all edges
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* @param[in] gpios Pin identifiers @ref gpio_pin_id. If multiple pins are
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* to be configure, use bitwise OR '|' to separate them.
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*/
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void gpio_configure_trigger(uint32_t gpioport, enum gpio_trigger trigger,
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uint8_t gpios)
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{
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switch (trigger) {
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case GPIO_TRIG_LVL_LOW:
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GPIO_IS(gpioport) |= gpios;
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GPIO_IEV(gpioport) &= ~gpios;
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break;
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case GPIO_TRIG_LVL_HIGH:
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GPIO_IS(gpioport) |= gpios;
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GPIO_IEV(gpioport) |= gpios;
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break;
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case GPIO_TRIG_EDGE_FALL:
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GPIO_IS(gpioport) &= ~gpios;
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GPIO_IBE(gpioport) &= ~gpios;
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GPIO_IEV(gpioport) &= ~gpios;
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break;
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case GPIO_TRIG_EDGE_RISE:
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GPIO_IS(gpioport) &= ~gpios;
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GPIO_IBE(gpioport) &= ~gpios;
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GPIO_IEV(gpioport) |= gpios;
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break;
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case GPIO_TRIG_EDGE_BOTH:
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GPIO_IS(gpioport) &= ~gpios;
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GPIO_IBE(gpioport) |= gpios;
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break;
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default:
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/* Don't do anything */
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break;
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}
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}
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/** @brief General Purpose Input/Outputs Set a Group of Pins Atomic
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*
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* Set one or more pins of the given GPIO port to 1 in an atomic operation.
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*
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* @param[in] gpioport GPIO block register address base @ref gpio_reg_base
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* @param[in] gpios Pin identifiers @ref gpio_pin_id. If multiple pins are
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* to be changed, use bitwise OR '|' to separate them.
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*/
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void gpio_set(uint32_t gpioport, uint8_t gpios)
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{
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GPIO_DATA(gpioport)[gpios] = 0xFF;
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}
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/** @brief General Purpose Input/Outputs Clear a Group of Pins Atomic
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*
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* Clear one or more pins of the given GPIO port to 0 in an atomic operation.
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*
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* @param[in] gpioport GPIO block register address base @ref gpio_reg_base
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* @param[in] gpios Pin identifiers @ref gpio_pin_id. If multiple pins are
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* to be changed, use bitwise OR '|' to separate them.
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*/
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void gpio_clear(uint32_t gpioport, uint8_t gpios)
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{
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GPIO_DATA(gpioport)[gpios] = 0x0;
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}
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/** @brief General Purpose Input/Outputs Read a Group of Pins
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*
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* @param[in] gpioport GPIO block register address base @ref gpio_reg_base
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* @param[in] gpios Pin identifiers @ref gpio_pin_id. If multiple pins are
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* to be read, use bitwise OR '|' to separate them.
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*
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* @return Unsigned int8 value of the pin values. The bit position of the pin
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value returned corresponds to the pin number.
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*/
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uint8_t gpio_get(uint32_t gpioport, uint8_t gpios)
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{
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return (uint8_t)GPIO_DATA(gpioport)[gpios];
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}
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/** @brief General Purpose Input/Outputs Toggle a Group of Pins
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*
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* Toggle one or more pins of the given GPIO port.
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* The non-toggled pins are not affected.
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*
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* @param[in] gpioport GPIO block register address base @ref gpio_reg_base
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* @param[in] gpios Pin identifiers @ref gpio_pin_id. If multiple pins are
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* to be changed, use bitwise OR '|' to separate them.
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*/
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void gpio_toggle(uint32_t gpioport, uint8_t gpios)
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{
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/* The mask makes sure we only toggle the GPIOs we want to */
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GPIO_DATA(gpioport)[gpios] ^= GPIO_ALL;
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}
|
||
|
|
|
||
|
|
/** @brief General Purpose Input/Outputs Read from a Port
|
||
|
|
*
|
||
|
|
* Read the current value of the given GPIO port.
|
||
|
|
*
|
||
|
|
* @param[in] gpioport GPIO block register address base @ref gpio_reg_base
|
||
|
|
*
|
||
|
|
* @return Unsigned int8. The value held in the specified GPIO port.
|
||
|
|
*/
|
||
|
|
uint8_t gpio_port_read(uint32_t gpioport)
|
||
|
|
{
|
||
|
|
return (uint8_t)GPIO_DATA(gpioport)[GPIO_ALL];
|
||
|
|
}
|
||
|
|
|
||
|
|
/** @brief General Purpose Input/Outputs Write to a Port
|
||
|
|
*
|
||
|
|
* Write a value to the given GPIO port.
|
||
|
|
*
|
||
|
|
* @param[in] gpioport GPIO block register address base @ref gpio_reg_base
|
||
|
|
* @param[in] data Unsigned int8. The value to be written to the GPIO port.
|
||
|
|
*/
|
||
|
|
void gpio_port_write(uint32_t gpioport, uint8_t data)
|
||
|
|
{
|
||
|
|
GPIO_DATA(gpioport)[GPIO_ALL] = data;
|
||
|
|
}
|
||
|
|
|
||
|
|
/** @brief General Purpose Input/Outputs Enable Interrupts on specified pins
|
||
|
|
*
|
||
|
|
* Enable interrupts on the specified GPIO pins.
|
||
|
|
*
|
||
|
|
* @note The NVIC must be enabled and properly configured for the interrupt
|
||
|
|
* to be routed to the CPU.
|
||
|
|
*
|
||
|
|
* @param[in] gpioport GPIO block register address base @ref gpio_reg_base)
|
||
|
|
* @param[in] gpios Pin identifiers @ref gpio_pin_id.
|
||
|
|
* Pins whose interrupts to enable.
|
||
|
|
* If multiple pins are to be enable interrupt,
|
||
|
|
* use bitwise OR '|' to separate them.
|
||
|
|
*/
|
||
|
|
void gpio_enable_interrupts(uint32_t gpioport, uint8_t gpios)
|
||
|
|
{
|
||
|
|
GPIO_IM(gpioport) |= gpios;
|
||
|
|
}
|
||
|
|
|
||
|
|
/** @brief General Purpose Input/Outputs Disable interrupts on specified pins
|
||
|
|
*
|
||
|
|
* Disable interrupts on the specified GPIO pins.
|
||
|
|
*
|
||
|
|
* @param[in] gpioport GPIO block register address base @ref gpio_reg_base
|
||
|
|
* @param[in] gpios Pin identifiers @ref gpio_pin_id.
|
||
|
|
* Pins whose interrupts to disable.
|
||
|
|
* If multiple pins are to be disable interrupt,
|
||
|
|
* use bitwise OR '|' to separate them.
|
||
|
|
*/
|
||
|
|
void gpio_disable_interrupts(uint32_t gpioport, uint8_t gpios)
|
||
|
|
{
|
||
|
|
GPIO_IM(gpioport) &= ~gpios;
|
||
|
|
}
|
||
|
|
|
||
|
|
/** @brief General Purpose Input/Outputs Unlock The Commit Control
|
||
|
|
*
|
||
|
|
* Unlocks the commit control of the given pin or group of pins. If a pin is a
|
||
|
|
* JTAG/SWD or NMI, the pin may then be reconfigured as a GPIO pin. If the pin
|
||
|
|
* is not locked by default, this has no effect.
|
||
|
|
*
|
||
|
|
* @param[in] gpioport GPIO block register address base @ref gpio_reg_base
|
||
|
|
* @param[in] gpios Pin identifiers @ref gpio_pin_id.
|
||
|
|
* If multiple pins are to be unlock,
|
||
|
|
* use bitwise OR '|' to separate them.
|
||
|
|
*/
|
||
|
|
void gpio_unlock_commit(uint32_t gpioport, uint8_t gpios)
|
||
|
|
{
|
||
|
|
/* Unlock the GPIO_CR register */
|
||
|
|
GPIO_LOCK(gpioport) = GPIO_LOCK_UNLOCK_CODE;
|
||
|
|
/* Enable committing changes */
|
||
|
|
GPIO_CR(gpioport) |= gpios;
|
||
|
|
/* Lock the GPIO_CR register */
|
||
|
|
GPIO_LOCK(gpioport) = ~GPIO_LOCK_UNLOCK_CODE;
|
||
|
|
}
|
||
|
|
|
||
|
|
/** @brief General Purpose Input/Outputs Determine if interrupt is generated
|
||
|
|
* by the given pin
|
||
|
|
*
|
||
|
|
* @param[in] gpioport GPIO block register address base @ref gpio_reg_base
|
||
|
|
* @param[in] gpios Source pin identifiers @ref gpio_pin_id.
|
||
|
|
* If multiple pins are to be check,
|
||
|
|
* use bitwise OR '|' to separate them.
|
||
|
|
*
|
||
|
|
* @return Unsigned int8. The bit position of the pin
|
||
|
|
value returned corresponds to the pin number.
|
||
|
|
*/
|
||
|
|
uint8_t gpio_is_interrupt_source(uint32_t gpioport, uint8_t gpios)
|
||
|
|
{
|
||
|
|
return GPIO_MIS(gpioport) & gpios;
|
||
|
|
}
|
||
|
|
|
||
|
|
/** @brief General Purpose Input/Outputs Mark Interrupt as Serviced
|
||
|
|
*
|
||
|
|
* After an interrupt is services, its flag must be cleared. If the flag is not
|
||
|
|
* cleared, then execution will jump back to the start of the ISR after the ISR
|
||
|
|
* returns.
|
||
|
|
*
|
||
|
|
* @param[in] gpioport GPIO block register address base @ref gpio_reg_base
|
||
|
|
* @param[in] gpios Pin identifiers @ref gpio_pin_id. If multiple pins are
|
||
|
|
* to be clear interrupt flag, use bitwise OR '|' to separate them.
|
||
|
|
*/
|
||
|
|
void gpio_clear_interrupt_flag(uint32_t gpioport, uint8_t gpios)
|
||
|
|
{
|
||
|
|
GPIO_ICR(gpioport) |= gpios;
|
||
|
|
}
|