Arti Zirk
2de3a91b0a
subrepo: subdir: "libopencm3" merged: "88e91c9a7cce" upstream: origin: "https://github.com/libopencm3/libopencm3.git" branch: "master" commit: "88e91c9a7cce" git-subrepo: version: "0.4.3" origin: "???" commit: "???"
209 lines
5.5 KiB
C
209 lines
5.5 KiB
C
/** @addtogroup gpio_file GPIO peripheral API
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*
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* @brief <b>Access functions for the I/O Controller</b>
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*
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* @ingroup peripheral_apis
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* LGPL License Terms @ref lgpl_license
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* @author @htmlonly © @endhtmlonly 2016
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* Maxim Sloyko <maxims@google.com>
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*
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*/
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/*
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* This file is part of the libopencm3 project.
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*
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* Copyright (C) 2017-2018 Unicore MX project<dev(at)lists(dot)unicore-mx(dot)org>
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* Copyright (C) 2021 Eduard Drusa <ventyl86(at)netkosice(dot)sk>
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*
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* This library is free software: you can redistribute it and/or modify
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* it under the terms of the GNU Lesser General Public License as published by
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* the Free Software Foundation, either version 3 of the License, or
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* (at your option) any later version.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public License
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* along with this library. If not, see <http://www.gnu.org/licenses/>.
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*/
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/** @{ */
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#include <libopencm3/nrf/gpio.h>
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/** @brief Atomic set output
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*
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* @param[in] gpioport Port identifier @ref gpio_port_id
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* @param[in] gpios Pin identifiers @ref gpio_pin_id
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*/
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void gpio_set(uint32_t gpioport, uint32_t gpios)
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{
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(void) gpioport;
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GPIO_OUTSET = gpios;
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}
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/** @brief Atomic clear output
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*
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* @param[in] gpioport Port identifier @ref gpio_port_id
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* @param[in] gpios Pin identifiers @ref gpio_pin_id
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*/
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void gpio_clear(uint32_t gpioport, uint32_t gpios)
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{
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(void) gpioport;
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GPIO_OUTCLR = gpios;
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}
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/** @brief Toggle output
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*
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* @param[in] gpioport Port identifier @ref gpio_port_id
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* @param[in] gpios Pin identifiers @ref gpio_pin_id
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*/
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void gpio_toggle(uint32_t gpioport, uint32_t gpios)
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{
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(void) gpioport;
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uint32_t reg_val = GPIO_OUT;
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GPIO_OUTCLR = reg_val & gpios;
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GPIO_OUTSET = (~reg_val) & gpios;
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}
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/** @brief Read GPIO values
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*
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* @param[in] gpioport Port identifier @ref gpio_port_id
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* @param[in] gpios Pin identifiers @ref gpio_pin_id
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*/
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uint32_t gpio_get(uint32_t gpioport, uint32_t gpios)
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{
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(void) gpioport;
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return GPIO_IN & gpios;
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}
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/** @brief Set GPIO Pin Mode
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*
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* Sets the mode (input/output) and configuration (analog/digitial and
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* open drain/push pull), for a set of GPIO pins on a given GPIO port.
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*
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* @param[in] gpioport Port identifier @ref gpio_port_id
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* @param[in] mode Pin mode @ref gpio_mode
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* @param[in] pull_up_down Pull up / pull down configuration @ref gpio_pupd
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* @param[in] gpios Pin identifiers @ref gpio_pin_id
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* If multiple pins are to be set, use bitwise OR '|' to separate
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* them.
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*/
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void gpio_mode_setup(uint32_t gpioport, uint32_t mode, uint32_t pull_up_down,
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uint32_t gpios)
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{
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(void) gpioport;
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uint8_t i = 0;
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while (gpios) {
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if (gpios & 1) {
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GPIO_PIN_CNF(i) = (
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GPIO_PIN_CNF(i) &
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~((GPIO_CNF_MODE_MASK << GPIO_CNF_MODE_SHIFT)
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| (GPIO_CNF_PUPD_MASK << GPIO_CNF_PUPD_SHIFT)
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)
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) | (mode << GPIO_CNF_MODE_SHIFT)
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| (pull_up_down << GPIO_CNF_PUPD_SHIFT);
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}
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++i;
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gpios >>= 1;
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}
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}
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/** Configure GPIO pin input and output specifics.
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*
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* Configure drive strength and input sensing for given GPIO port.
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* @param [in] gpioport GPIO port identifier, see @ref gpio_port_id
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* @param [in] drive Drive schema used to drive pin, see @ref gpio_drive
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* @param [in] sense Pin sensing mechanism, see @ref gpio_sense
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* @param[in] gpios Pin identifiers @ref gpio_pin_id
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* If multiple pins are to be set, use bitwise OR '|' to separate
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* them.
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*/
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void gpio_set_options(uint32_t gpioport, uint32_t drive, uint32_t sense,
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uint32_t gpios)
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{
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(void) gpioport;
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uint8_t i = 0;
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while (gpios) {
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if (gpios & 1) {
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GPIO_PIN_CNF(i) = (GPIO_PIN_CNF(i) &
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~((GPIO_CNF_DRIVE_MASK << GPIO_CNF_DRIVE_SHIFT)
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| (GPIO_CNF_SENSE_MASK << GPIO_CNF_SENSE_SHIFT)
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)
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) | (drive << GPIO_CNF_DRIVE_SHIFT)
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| (sense << GPIO_CNF_SENSE_SHIFT);
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}
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++i;
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gpios >>= 1;
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}
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}
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/** @brief Configure Task in GPIO TE Module
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*
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* @param[in] task_num uint8_t Task number (0-3)
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* @param[in] pin_num uint8_t GPIO Pin number (0-31)
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* @param[in] polarity uint8_t polarity Operation to perform when task is triggered.
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* @param[in] init uint8_t Initial state of the pin, non-zero means initially active,
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* zero means initially inactive
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*/
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void gpio_configure_task(uint8_t task_num,
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uint8_t pin_num, uint8_t polarity, uint32_t init)
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{
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/* any non-zero value means, that pin is active */
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if (init) {
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init = GPIO_TE_CONFIG_OUTINIT;
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}
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GPIO_TE_CONFIG(task_num) = (GPIO_TE_MODE_TASK << GPIO_TE_CONFIG_MODE_SHIFT)
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| (pin_num << GPIO_TE_CONFIG_PSEL_SHIFT)
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| (polarity << GPIO_TE_CONFIG_POLARITY_SHIFT)
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| init;
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}
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/** @brief Configure Event in GPIO TE Module
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*
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* @param[in] event_num Event number (0-3)
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* @param[in] pin_num GPIO Pin number (0-31)
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* @param[in] polarity Operation to perform when task is triggered.
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*/
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void gpio_configure_event(uint8_t event_num, uint8_t pin_num, uint8_t polarity)
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{
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GPIO_TE_CONFIG(event_num) = (GPIO_TE_MODE_EVENT << GPIO_TE_CONFIG_MODE_SHIFT)
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| (pin_num << GPIO_TE_CONFIG_PSEL_SHIFT)
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| (polarity << GPIO_TE_CONFIG_POLARITY_SHIFT);
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}
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/** @brief Enable GPIO interrupts
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*
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* @param[in] mask interrupts to enable.
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*/
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void gpio_enable_interrupts(uint32_t mask)
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{
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GPIO_INTENSET = mask;
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}
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/** @brief Disable GPIO interrupts
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*
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* @param[in] mask interrupts to disable.
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*/
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void gpio_disable_interrupts(uint32_t mask)
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{
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GPIO_INTENCLR = mask;
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}
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/** @brief Disable all GPIO interrupts
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*
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*/
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void gpio_clear_interrupts(void)
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{
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GPIO_INTENCLR = 0xffffffff;
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}
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/** @} */
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