Arti Zirk
2de3a91b0a
subrepo: subdir: "libopencm3" merged: "88e91c9a7cce" upstream: origin: "https://github.com/libopencm3/libopencm3.git" branch: "master" commit: "88e91c9a7cce" git-subrepo: version: "0.4.3" origin: "???" commit: "???"
91 lines
2.6 KiB
C
91 lines
2.6 KiB
C
/** @addtogroup adc_file ADC peripheral API
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@ingroup peripheral_apis
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@author @htmlonly © @endhtmlonly 2014 Karl Palsson <karlp@tweak.net.au>
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LGPL License Terms @ref lgpl_license
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*/
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/*
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* This file is part of the libopencm3 project.
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*
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* Copyright (C) 2014 Karl Palsson <karlp@tweak.net.au>
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*
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* This library is free software: you can redistribute it and/or modify
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* it under the terms of the GNU Lesser General Public License as published by
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* the Free Software Foundation, either version 3 of the License, or
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* (at your option) any later version.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public License
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* along with this library. If not, see <http://www.gnu.org/licenses/>.
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*/
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#include <libopencm3/stm32/adc.h>
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/**@{*/
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/*----------------------------------------------------------------------------*/
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/** @brief ADC Set the Sample Time for a Single Channel
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The sampling time can be selected in ADC clock cycles from 4 to 384.
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@param[in] adc Unsigned int32. ADC block base address @ref adc_reg_base.
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@param[in] channel uint8. ADC Channel integer 0..18 or from @ref adc_channel.
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@param[in] time Unsigned int8. Sampling time selection from @ref adc_sample_rg.
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*/
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void adc_set_sample_time(uint32_t adc, uint8_t channel, uint8_t time)
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{
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uint32_t reg32;
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if (channel < 10) {
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reg32 = ADC_SMPR3(adc);
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reg32 &= ~(0x7 << (channel * 3));
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reg32 |= (time << (channel * 3));
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ADC_SMPR3(adc) = reg32;
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} else if (channel < 20) {
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reg32 = ADC_SMPR2(adc);
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reg32 &= ~(0x7 << ((channel - 10) * 3));
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reg32 |= (time << ((channel - 10) * 3));
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ADC_SMPR2(adc) = reg32;
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} else {
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reg32 = ADC_SMPR1(adc);
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reg32 &= ~(0x7 << ((channel - 20) * 3));
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reg32 |= (time << ((channel - 20) * 3));
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ADC_SMPR1(adc) = reg32;
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}
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}
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/*----------------------------------------------------------------------------*/
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/** @brief ADC Set the Sample Time for All Channels
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The sampling time can be selected in ADC clock cycles, same for
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all channels.
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@param[in] adc Unsigned int32. ADC block base address @ref adc_reg_base.
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@param[in] time Unsigned int8. Sampling time selection from @ref adc_sample_rg.
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*/
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void adc_set_sample_time_on_all_channels(uint32_t adc, uint8_t time)
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{
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uint8_t i;
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uint32_t reg32 = 0;
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for (i = 0; i <= 9; i++) {
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reg32 |= (time << (i * 3));
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}
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ADC_SMPR0(adc) = reg32;
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ADC_SMPR1(adc) = reg32;
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ADC_SMPR2(adc) = reg32;
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ADC_SMPR3(adc) = reg32;
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}
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/**@}*/
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