76 lines
2.0 KiB
C
76 lines
2.0 KiB
C
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/** @defgroup pwr_file PWR peripheral API
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*
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* @ingroup peripheral_apis
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*
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* @brief <b>libopencm3 STM32L4xx Power Control</b>
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*
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* @version 1.0.0
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*
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* @author @htmlonly © @endhtmlonly 2016 Benjamin Levine <benjamin@jesco.karoo.co.uk>
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*
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* @date 4 March 2013
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*
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* This library supports the power control system for the
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* STM32L4 series of ARM Cortex Microcontrollers by ST Microelectronics.
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*
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* LGPL License Terms @ref lgpl_license
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*/
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/*
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* This file is part of the libopencm3 project.
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*
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* Copyright (C) 2016 Benjamin Levine <benjamin@jesco.karoo.co.uk>
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*
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* This library is free software: you can redistribute it and/or modify
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* it under the terms of the GNU Lesser General Public License as published by
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* the Free Software Foundation, either version 3 of the License, or
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* (at your option) any later version.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public License
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* along with this library. If not, see <http://www.gnu.org/licenses/>.
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*/
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/**@{*/
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#include <libopencm3/stm32/pwr.h>
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void pwr_set_vos_scale(enum pwr_vos_scale scale)
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{
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uint32_t reg32;
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reg32 = PWR_CR1;
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reg32 &= ~(PWR_CR1_VOS_MASK << PWR_CR1_VOS_SHIFT);
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switch (scale) {
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case PWR_SCALE1:
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reg32 |= (PWR_CR1_VOS_RANGE_1 << PWR_CR1_VOS_SHIFT);
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break;
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case PWR_SCALE2:
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reg32 |= (PWR_CR1_VOS_RANGE_2 << PWR_CR1_VOS_SHIFT);
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break;
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}
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PWR_CR1 = reg32;
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}
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/** Disable Backup Domain Write Protection
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*
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* This allows backup domain registers to be changed. These registers are write
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* protected after a reset.
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*/
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void pwr_disable_backup_domain_write_protect(void)
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{
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PWR_CR1 |= PWR_CR1_DBP;
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}
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/** Re-enable Backup Domain Write Protection
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*
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* This protects backup domain registers from inadvertent change.
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*/
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void pwr_enable_backup_domain_write_protect(void)
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{
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PWR_CR1 &= ~PWR_CR1_DBP;
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}
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/**@}*/
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