subrepo:
  subdir:   "libopencm3"
  merged:   "f5813a54"
upstream:
  origin:   "https://github.com/libopencm3/libopencm3"
  branch:   "master"
  commit:   "f5813a54"
git-subrepo:
  version:  "0.4.3"
  origin:   "???"
  commit:   "???"
This commit is contained in:
2021-09-30 16:34:10 +03:00
parent 1a441e5806
commit 244fdbc35c
1125 changed files with 185440 additions and 0 deletions

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##
## This file is part of the libopencm3 project.
##
## Copyright (C) 2009 Uwe Hermann <uwe@hermann-uwe.de>
##
## This library is free software: you can redistribute it and/or modify
## it under the terms of the GNU Lesser General Public License as published by
## the Free Software Foundation, either version 3 of the License, or
## (at your option) any later version.
##
## This library is distributed in the hope that it will be useful,
## but WITHOUT ANY WARRANTY; without even the implied warranty of
## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
## GNU Lesser General Public License for more details.
##
## You should have received a copy of the GNU Lesser General Public License
## along with this library. If not, see <http://www.gnu.org/licenses/>.
##
LIBNAME = libopencm3_sam3a
SRCLIBDIR ?= ../..
CC = $(PREFIX)gcc
AR = $(PREFIX)ar
TGT_CFLAGS = -Os -Wall -Wextra -I../../../include -fno-common \
-mcpu=cortex-m3 -mthumb $(FP_FLAGS) -Wstrict-prototypes \
-ffunction-sections -fdata-sections -MD -DSAM3A
TGT_CFLAGS += $(DEBUG_FLAGS)
TGT_CFLAGS += $(STANDARD_FLAGS)
# ARFLAGS = rcsv
ARFLAGS = rcs
OBJS += gpio_common_all.o gpio_common_3a3u3x.o
OBJS += pmc.o
OBJS += usart_common_all.o usart_common_3.o
VPATH += ../../usb:../../cm3:../common
include ../../Makefile.include

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##
## This file is part of the libopencm3 project.
##
## Copyright (C) 2009 Uwe Hermann <uwe@hermann-uwe.de>
##
## This library is free software: you can redistribute it and/or modify
## it under the terms of the GNU Lesser General Public License as published by
## the Free Software Foundation, either version 3 of the License, or
## (at your option) any later version.
##
## This library is distributed in the hope that it will be useful,
## but WITHOUT ANY WARRANTY; without even the implied warranty of
## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
## GNU Lesser General Public License for more details.
##
## You should have received a copy of the GNU Lesser General Public License
## along with this library. If not, see <http://www.gnu.org/licenses/>.
##
LIBNAME = libopencm3_sam3n
SRCLIBDIR ?= ../..
CC = $(PREFIX)gcc
AR = $(PREFIX)ar
TGT_CFLAGS = -Os -Wall -Wextra -I../../../include -fno-common \
-mcpu=cortex-m3 -mthumb $(FP_FLAGS) -Wstrict-prototypes \
-ffunction-sections -fdata-sections -MD -DSAM3N
TGT_CFLAGS += $(DEBUG_FLAGS)
TGT_CFLAGS += $(STANDARD_FLAGS)
# ARFLAGS = rcsv
ARFLAGS = rcs
OBJS += gpio_common_all.o gpio_common_3n3s.o
OBJS += pmc.o
OBJS += usart_common_all.o usart_common_3.o
VPATH += ../../cm3:../common
include ../../Makefile.include

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##
## This file is part of the libopencm3 project.
##
## Copyright (C) 2009 Uwe Hermann <uwe@hermann-uwe.de>
## Copyright (C) 2014 Felix Held <felix-libopencm3@felixheld.de>
##
## This library is free software: you can redistribute it and/or modify
## it under the terms of the GNU Lesser General Public License as published by
## the Free Software Foundation, either version 3 of the License, or
## (at your option) any later version.
##
## This library is distributed in the hope that it will be useful,
## but WITHOUT ANY WARRANTY; without even the implied warranty of
## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
## GNU Lesser General Public License for more details.
##
## You should have received a copy of the GNU Lesser General Public License
## along with this library. If not, see <http://www.gnu.org/licenses/>.
##
LIBNAME = libopencm3_sam3s
SRCLIBDIR ?= ../..
CC = $(PREFIX)gcc
AR = $(PREFIX)ar
TGT_CFLAGS = -Os -Wall -Wextra -I../../../include -fno-common \
-mcpu=cortex-m3 -mthumb $(FP_FLAGS) -Wstrict-prototypes \
-ffunction-sections -fdata-sections -MD -DSAM3S
TGT_CFLAGS += $(DEBUG_FLAGS)
TGT_CFLAGS += $(STANDARD_FLAGS)
# ARFLAGS = rcsv
ARFLAGS = rcs
OBJS += gpio_common_all.o gpio_common_3n3s.o
OBJS += pmc.o
OBJS += usart_common_all.o usart_common_3.o
VPATH += ../../usb:../../cm3:../common
include ../../Makefile.include

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##
## This file is part of the libopencm3 project.
##
## Copyright (C) 2009 Uwe Hermann <uwe@hermann-uwe.de>
## Copyright (C) 2014 Felix Held <felix-libopencm3@felixheld.de>
##
## This library is free software: you can redistribute it and/or modify
## it under the terms of the GNU Lesser General Public License as published by
## the Free Software Foundation, either version 3 of the License, or
## (at your option) any later version.
##
## This library is distributed in the hope that it will be useful,
## but WITHOUT ANY WARRANTY; without even the implied warranty of
## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
## GNU Lesser General Public License for more details.
##
## You should have received a copy of the GNU Lesser General Public License
## along with this library. If not, see <http://www.gnu.org/licenses/>.
##
LIBNAME = libopencm3_sam3u
SRCLIBDIR ?= ../..
CC = $(PREFIX)gcc
AR = $(PREFIX)ar
TGT_CFLAGS = -Os -Wall -Wextra -I../../../include -fno-common \
-mcpu=cortex-m3 -mthumb $(FP_FLAGS) -Wstrict-prototypes \
-ffunction-sections -fdata-sections -MD -DSAM3U
TGT_CFLAGS += $(DEBUG_FLAGS)
TGT_CFLAGS += $(STANDARD_FLAGS)
# ARFLAGS = rcsv
ARFLAGS = rcs
OBJS += gpio_common_all.o gpio_common_3a3u3x.o
OBJS += pmc.o
OBJS += usart_common_all.o usart_common_3.o
VPATH += ../../usb:../../cm3:../common
include ../../Makefile.include

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##
## This file is part of the libopencm3 project.
##
## Copyright (C) 2009 Uwe Hermann <uwe@hermann-uwe.de>
##
## This library is free software: you can redistribute it and/or modify
## it under the terms of the GNU Lesser General Public License as published by
## the Free Software Foundation, either version 3 of the License, or
## (at your option) any later version.
##
## This library is distributed in the hope that it will be useful,
## but WITHOUT ANY WARRANTY; without even the implied warranty of
## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
## GNU Lesser General Public License for more details.
##
## You should have received a copy of the GNU Lesser General Public License
## along with this library. If not, see <http://www.gnu.org/licenses/>.
##
LIBNAME = libopencm3_sam3x
SRCLIBDIR ?= ../..
CC = $(PREFIX)gcc
AR = $(PREFIX)ar
TGT_CFLAGS = -Os -Wall -Wextra -I../../../include -fno-common \
-mcpu=cortex-m3 -mthumb $(FP_FLAGS) -Wstrict-prototypes \
-ffunction-sections -fdata-sections -MD -DSAM3X
TGT_CFLAGS += $(DEBUG_FLAGS)
TGT_CFLAGS += $(STANDARD_FLAGS)
# ARFLAGS = rcsv
ARFLAGS = rcs
OBJS += gpio_common_all.o gpio_common_3a3u3x.o
OBJS += pmc.o
OBJS += usart_common_all.o usart_common_3.o
VPATH += ../../usb:../../cm3:../common
include ../../Makefile.include

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##
## This file is part of the libopencm3 project.
##
## This library is free software: you can redistribute it and/or modify
## it under the terms of the GNU Lesser General Public License as published by
## the Free Software Foundation, either version 3 of the License, or
## (at your option) any later version.
##
## This library is distributed in the hope that it will be useful,
## but WITHOUT ANY WARRANTY; without even the implied warranty of
## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
## GNU Lesser General Public License for more details.
##
## You should have received a copy of the GNU Lesser General Public License
## along with this library. If not, see <http://www.gnu.org/licenses/>.
##
LIBNAME = libopencm3_sam4l
SRCLIBDIR ?= ../..
FP_FLAGS ?= -msoft-float
CC = $(PREFIX)gcc
AR = $(PREFIX)ar
TGT_CFLAGS = -Os -Wall -Wextra -I../../../include -fno-common \
-mcpu=cortex-m4 -mthumb $(FP_FLAGS) -Wstrict-prototypes \
-ffunction-sections -fdata-sections -MD -DSAM4L
TGT_CFLAGS += $(DEBUG_FLAGS)
# ARFLAGS = rcsv
ARFLAGS = rcs
OBJS += adcife.o
OBJS += gpio.o
OBJS += pm.o
OBJS += scif.o
OBJS += usart_common_all.o usart.o
VPATH += ../../usb:../../cm3:../common
include ../../Makefile.include

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/** @addtogroup scif
*
* @brief <b>Access functions for the SAM4 Analog to Digital Converter Interface (ADCIFE)</b>
* @ingroup SAM4
* LGPL License Terms @ref lgpl_license
* @author @htmlonly &copy; @endhtmlonly 2016
* Maxim Sloyko <maxims@google.com>
*
*/
#include <libopencm3/sam/adcife.h>
/** @brief Enable ADC interface. Must be done before any other configuration.
*
* This function does it synchronously and returns only when the interface is
* actually enabled.
*/
void adcife_enable_sync(void)
{
ADCIFE_CR = ADCIFE_CR_EN;
while (!(ADCIFE_SR & ADCIFE_SR_EN));
}
void adcife_configure(
enum adcife_refsel ref,
enum adcife_speed speed,
enum adcife_clk clk,
enum adcife_prescal prescal)
{
ADCIFE_CFG = ADCIFE_CFG_REFSEL_MASKED(ref)
| ADCIFE_CFG_SPEED_MASKED(speed)
| ADCIFE_CFG_PRESCAL_MASKED(prescal)
| clk;
}
void adcife_select_channel(enum adcife_channel ad)
{
ADCIFE_SEQCFG |= ADCIFE_SEQCFG_MUXPOS_MASKED(ad);
}
void adcife_set_resolution(enum adcife_resolution res)
{
if (ADCIFE_RESOLUTION_12BITS == res) {
ADCIFE_SEQCFG &= ~ADCIFE_SEQCFG_RES;
} else {
ADCIFE_SEQCFG |= ADCIFE_SEQCFG_RES;
}
}
void adcife_select_trigger(enum adcife_trigger trig)
{
ADCIFE_SEQCFG &= ~ADCIFE_SEQCFG_TRGSEL_MASK;
ADCIFE_SEQCFG |= ADCIFE_SEQCFG_TRGSEL_MASKED(trig);
}
void adcife_set_gain(enum adcife_gain gain)
{
ADCIFE_SEQCFG &= ~ADCIFE_SEQCFG_GAIN_MASK;
ADCIFE_SEQCFG |= ADCIFE_SEQCFG_GAIN_MASKED(gain);
}
void adcife_set_bipolar(bool enable)
{
if (enable) {
ADCIFE_SEQCFG |= ADCIFE_SEQCFG_BIPOLAR;
} else {
ADCIFE_SEQCFG &= ~ADCIFE_SEQCFG_BIPOLAR;
}
}
void adcife_set_left_adjust(bool enable)
{
if (enable) {
ADCIFE_SEQCFG |= ADCIFE_SEQCFG_HWLA;
} else {
ADCIFE_SEQCFG &= ~ADCIFE_SEQCFG_HWLA;
}
}
void adcife_start_conversion(void)
{
ADCIFE_CR = ADCIFE_CR_STRIG;
}
void adcife_wait_conversion(void)
{
while (!(ADCIFE_SR & ADCIFE_SR_SEOC));
ADCIFE_SCR = ADCIFE_SR_SEOC;
}
struct adcife_lcv adcife_get_lcv(void)
{
struct adcife_lcv res;
res._lc_u.lcv = ADCIFE_LCV;
return res;
}
void adcife_enable_interrupts(uint32_t imask)
{
ADCIFE_IER = imask;
}
void adcife_disable_interrupts(uint32_t imask)
{
ADCIFE_IDR = imask;
}
void adcife_timer_start(void)
{
ADCIFE_CR = ADCIFE_CR_TSTART;
}
void adcife_timer_stop(void)
{
ADCIFE_CR = ADCIFE_CR_TSTOP;
}
void adcife_timer_set_timeout(uint16_t timeout)
{
ADCIFE_TIM = timeout;
}

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/** @addtogroup gpio_defines
*
* @brief <b>Access functions for the SAM4 I/O Controller</b>
* @ingroup SAM4_defines
* LGPL License Terms @ref lgpl_license
* @author @htmlonly &copy; @endhtmlonly 2016
* Maxim Sloyko <maxims@google.com>
*
*/
/*
* This file is part of the libopencm3 project.
*
* Copyright (C) 2012 Gareth McMullin <gareth@blacksphere.co.nz>
* Copyright (C) 2014 Felix Held <felix-libopencm3@felixheld.de>
*
* This library is free software: you can redistribute it and/or modify
* it under the terms of the GNU Lesser General Public License as published by
* the Free Software Foundation, either version 3 of the License, or
* (at your option) any later version.
*
* This library is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU Lesser General Public License for more details.
*
* You should have received a copy of the GNU Lesser General Public License
* along with this library. If not, see <http://www.gnu.org/licenses/>.
*/
#include <libopencm3/sam/gpio.h>
/** @brief Atomic set output
*
* @param[in] gpioport uint32_t: GPIO Port base address
* @param[in] gpios uint32_t
*/
void gpio_set(uint32_t gpioport, uint32_t gpios)
{
GPIO_OVRS(gpioport) = gpios;
}
/** @brief Atomic clear output
*
* @param[in] gpioport uint32_t: GPIO Port base address
* @param[in] gpios uint32_t
*/
void gpio_clear(uint32_t gpioport, uint32_t gpios)
{
GPIO_OVRC(gpioport) = gpios;
}
/** @brief Atomic toggle output
*
* @param[in] gpioport uint32_t: GPIO Port base address
* @param[in] gpios uint32_t
*/
void gpio_toggle(uint32_t gpioport, uint32_t gpios)
{
GPIO_OVRT(gpioport) = gpios;
}
/** @brief Enable output pins.
*
* Onlyc the ones where bits are set to "1" are touched, everything else
* remains in the old state.
*
* @param[in] gpioport uint32_t: GPIO Port base address
* @param[in] gpios uint32_t
* @param[in] mode enum gpio_mode GPIO mode. IN, OUT or peripheral function.
*/
void gpio_enable(uint32_t gpioport, uint32_t gpios, enum gpio_mode mode)
{
if (mode < GPIO_MODE_IN) {
GPIO_GPERC(gpioport) = gpios;
uint8_t i = 0;
for (; i < 3; ++i, mode >>= 1) {
GPIO_PMR_SETVAL(gpioport, i, mode & 1) = gpios;
}
} else if (mode == GPIO_MODE_OUT) {
GPIO_GPERS(gpioport) = gpios;
GPIO_ODERS(gpioport) = gpios;
} else if (mode == GPIO_MODE_IN) {
GPIO_GPERS(gpioport) = gpios;
GPIO_ODERC(gpioport) = gpios;
}
}
/** @brief Disable output pins.
*
* Onlyc the ones where bits are set to "1" are touched, everything else
* remains in the old state.
*
* @param[in] gpioport uint32_t: GPIO Port base address
* @param[in] gpios uint32_t
*/
void gpio_disable(uint32_t gpioport, uint32_t gpios)
{
GPIO_GPERC(gpioport) = gpios;
}

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/** @addtogroup scif
*
* @brief <b>Access functions for the SAM4 Power Manager (PM)</b>
* @ingroup SAM4
* LGPL License Terms @ref lgpl_license
* @author @htmlonly &copy; @endhtmlonly 2016
* Maxim Sloyko <maxims@google.com>
*
*/
/*
* This file is part of the libopencm3 project.
*
* This library is free software: you can redistribute it and/or modify
* it under the terms of the GNU Lesser General Public License as published by
* the Free Software Foundation, either version 3 of the License, or
* (at your option) any later version.
*
* This library is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU Lesser General Public License for more details.
*
* You should have received a copy of the GNU Lesser General Public License
* along with this library. If not, see <http://www.gnu.org/licenses/>.
*/
#include <libopencm3/sam/pm.h>
void pm_select_main_clock(enum mck_src source_clock)
{
PM_UNLOCK = PM_MCCTRL_KEY;
PM_MCCTRL = ((source_clock & PM_MCCTRL_MCSEL_MASK) << PM_MCCTRL_MCSEL_SHIFT);
while (!(PM_SR & PM_SR_CKRDY));
}
void pm_enable_clock_div(enum pm_cksel sel_target, uint8_t div)
{
while (!(PM_SR & PM_SR_CKRDY));
uint32_t reg = (PM_CKSEL_DIV | (div & PM_CKSEL_MASK));
PM_UNLOCK = PM_CKSEL_KEY(sel_target);
PM_CKSEL(sel_target) = reg;
while (!(PM_SR & PM_SR_CKRDY));
}
void pm_set_divmask_clock(uint8_t mask)
{
PM_UNLOCK = PM_PBADIVMASK_KEY;
PM_PBADIVMASK = mask;
}
static void set_peripheral_clock_status(enum pm_peripheral periph, bool on)
{
uint8_t reg_id = periph/32;
uint8_t bit_offset = periph % 32;
uint32_t reg_mask = PM_MASK(reg_id);
if (on) {
reg_mask |= (1 << bit_offset);
} else {
reg_mask &= ~(1 << bit_offset);
}
PM_UNLOCK = PM_MASK_KEY(reg_id);
PM_MASK(reg_id) = reg_mask;
}
void pm_enable_peripheral_clock(enum pm_peripheral periph)
{
set_peripheral_clock_status(periph, true);
}
void pm_disable_peripheral_clock(enum pm_peripheral periph)
{
set_peripheral_clock_status(periph, false);
}

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/** @addtogroup scif
*
* @brief <b>Access functions for the SAM4 System Controf Interface (SCIF)</b>
* @ingroup SAM4
* LGPL License Terms @ref lgpl_license
* @author @htmlonly &copy; @endhtmlonly 2016
* Maxim Sloyko <maxims@google.com>
*
*/
/*
* This file is part of the libopencm3 project.
*
* This library is free software: you can redistribute it and/or modify
* it under the terms of the GNU Lesser General Public License as published by
* the Free Software Foundation, either version 3 of the License, or
* (at your option) any later version.
*
* This library is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU Lesser General Public License for more details.
*
* You should have received a copy of the GNU Lesser General Public License
* along with this library. If not, see <http://www.gnu.org/licenses/>.
*/
#include <libopencm3/sam/scif.h>
/** @brief Enable external oscillator.
*
* @param[in] mode enum osc_mode: Oscillator mode (which pins oscillator connected to).
* @param[in] freq uint32_t: External Oscillator frequency, in Hertz. Must be 0.6MHz - 30MHz
* @param[in] startup enum osc_startup: Oscillator start time in RCSYS clock cycles.
*
* @returns zero upon success.
*/
int scif_osc_enable(enum osc_mode mode, uint32_t freq, enum osc_startup startup)
{
uint8_t gain;
const uint32_t kHz = 1000;
const uint32_t MHz = 1000 * kHz;
if (freq > 600 * kHz && freq <= 2 * MHz) {
gain = 0;
} else if (freq > 2 * MHz && freq <= 4 * MHz) {
gain = 1;
} else if (freq > 4 * MHz && freq <= 8 * MHz) {
gain = 2;
} else if (freq > 8 * MHz && freq <= 16 * MHz) {
gain = 3;
} else if (freq > 16 * MHz && freq <= 30 * MHz) {
gain = 4;
} else {
return -1;
}
SCIF_UNLOCK = SCIF_OSCCTRL0_KEY;
SCIF_OSCCTRL0 = mode | SCIF_OSCCTRL_OSCEN |
(gain << SCIF_OSCCTRL_GAIN_SHIFT) | (startup << SCIF_OSCCTRL_STARTUP_SHIFT);
while (!(SCIF_PCLKSR & SCIF_OSC0RDY));
return 0;
}
/** @brief Configure and enable PLL clock.
*
* @param[in] delay uint8_t: Specifies the number of RCSYS clock cycles before
* ISR.PLLLOCKn will be set after PLL has been written, or after PLL has
* been automatically re-enabled after exiting a sleep mode.
* @param[in] mul uint8_t: Multiply factor.
* @param[in] div uint8_t: Division factor.These fields determine the ratio of
* the PLL output frequency to the source oscillator frequency:
* f_vco = (PLLMUL+1)/PLLDIV * f_ref if PLLDIV >0
* f_vco = 2*(PLLMUL+1) * f_ref if PLLDIV = 0
* Note that the PLLMUL field should always be greater than 1 or the
* behavior of the PLL will be undefined.
* @param[in] pll_opt uint8_t: PLL Options.
*
* @returns zero upon success.
*/
int scif_enable_pll(uint8_t delay, uint8_t mul, uint8_t div, uint8_t pll_opt, enum pll_clk_src source_clock)
{
// First, PLL needs to be disabled, otherwise the configuration register
// is unaccessible.
uint32_t pll_val = SCIF_PLL0;
if (pll_val & SCIF_PLL0_PLLEN) {
SCIF_UNLOCK = SCIF_PLL0_KEY;
SCIF_PLL0 = pll_val & (~SCIF_PLL0_PLLEN);
}
if (mul == 0)
mul = 1;
pll_val = SCIF_PLL0_PLLOSC_MASKED(source_clock)
| SCIF_PLL0_PLLOPT_MASKED(pll_opt)
| SCIF_PLL0_PLLDIV_MASKED(div)
| SCIF_PLL0_PLLMUL_MASKED(mul)
| SCIF_PLL0_PLLCOUNT_MASKED(delay);
SCIF_UNLOCK = SCIF_PLL0_KEY;
SCIF_PLL0 = pll_val;
// Now enable TODO: does this really need to be separate operation?
SCIF_UNLOCK = SCIF_PLL0_KEY;
SCIF_PLL0 = pll_val | SCIF_PLL0_PLLEN;
while(!(SCIF_PCLKSR & SCIF_PLL0LOCK));
return 0;
}
/** @brief Configure and enable Generic Clock
*
* @param[in] gclk enum generic_clock: Generic Clock to configure and enable.
* @param[in] source_clock enum gclk_src: Source Clock for this Generic Clock.
* @param[in] div uint16_t: Division Factor. Upper 8 bits only used for Generic Clock 11,
* If 0, clock is undivided.
*/
void scif_enable_gclk(enum generic_clock gclk, enum gclk_src source_clock, uint16_t div)
{
uint32_t reg_val = SCIF_GCCTRL_CEN | SCIF_GCCTRL_OSCSEL_MASKED(source_clock);
if (div) {
if (gclk < GENERIC_CLOCK11) {
div &= 0xf;
}
reg_val |= SCIF_GCCTRL_DIV_MASKED(div) | SCIF_GCCTRL_DIVEN;
}
SCIF_GCTRL(gclk) = reg_val;
}

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/*
* This file is part of the libopencm3 project.
*
* Copyright (C) 2013 Gareth McMullin <gareth@blacksphere.co.nz>
*
* This library is free software: you can redistribute it and/or modify
* it under the terms of the GNU Lesser General Public License as published by
* the Free Software Foundation, either version 3 of the License, or
* (at your option) any later version.
*
* This library is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU Lesser General Public License for more details.
*
* You should have received a copy of the GNU Lesser General Public License
* along with this library. If not, see <http://www.gnu.org/licenses/>.
*/
#include <libopencm3/sam/usart.h>
void usart_set_baudrate(uint32_t usart, uint32_t baud)
{
USART_BRGR(usart) = baud;
}

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/** @addtogroup gpio_defines
*
* @brief <b>Access functions for the SAM3A/U/X I/O Controller</b>
* @ingroup SAM3_defines
* LGPL License Terms @ref lgpl_license
* @author @htmlonly &copy; @endhtmlonly 2012
* Gareth McMullin <gareth@blacksphere.co.nz>
* @author @htmlonly &copy; @endhtmlonly 2014
* Felix Held <felix-libopencm3@felixheld.de>
*
*/
/*
* This file is part of the libopencm3 project.
*
* Copyright (C) 2012 Gareth McMullin <gareth@blacksphere.co.nz>
* Copyright (C) 2014 Felix Held <felix-libopencm3@felixheld.de>
*
* This library is free software: you can redistribute it and/or modify
* it under the terms of the GNU Lesser General Public License as published by
* the Free Software Foundation, either version 3 of the License, or
* (at your option) any later version.
*
* This library is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU Lesser General Public License for more details.
*
* You should have received a copy of the GNU Lesser General Public License
* along with this library. If not, see <http://www.gnu.org/licenses/>.
*/
#include <libopencm3/sam/gpio.h>
/** @brief Initialize GPIO pins
*
* @param[in] port uint32_t: GPIO Port base address
* @param[in] pins uint32_t bitfield of pins to initialize
* @param[in] flags enum gpio_flags
*/
void gpio_init(uint32_t port, uint32_t pins, enum gpio_flags flags)
{
switch (flags & 0x7) {
case GPIO_FLAG_GPINPUT:
PIO_ODR(port) = pins;
PIO_PER(port) = pins;
break;
case GPIO_FLAG_GPOUTPUT:
PIO_OER(port) = pins;
PIO_PER(port) = pins;
break;
case GPIO_FLAG_PERIPHA:
PIO_ABSR(port) &= ~pins;
PIO_PDR(port) = pins;
break;
case GPIO_FLAG_PERIPHB:
PIO_ABSR(port) |= pins;
PIO_PDR(port) = pins;
}
if (flags & GPIO_FLAG_OPEN_DRAIN) {
PIO_MDER(port) = pins;
} else {
PIO_MDDR(port) = pins;
}
if (flags & GPIO_FLAG_PULL_UP) {
PIO_PUER(port) = pins;
} else {
PIO_PUDR(port) = pins;
}
}

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/** @addtogroup gpio_defines
*
* @brief <b>Access functions for the SAM3N/S I/O Controller</b>
* @ingroup SAM3_defines
* LGPL License Terms @ref lgpl_license
* @author @htmlonly &copy; @endhtmlonly 2012
* Gareth McMullin <gareth@blacksphere.co.nz>
* @author @htmlonly &copy; @endhtmlonly 2014
* Felix Held <felix-libopencm3@felixheld.de>
*
*/
/*
* This file is part of the libopencm3 project.
*
* Copyright (C) 2012 Gareth McMullin <gareth@blacksphere.co.nz>
* Copyright (C) 2014 Felix Held <felix-libopencm3@felixheld.de>
*
* This library is free software: you can redistribute it and/or modify
* it under the terms of the GNU Lesser General Public License as published by
* the Free Software Foundation, either version 3 of the License, or
* (at your option) any later version.
*
* This library is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU Lesser General Public License for more details.
*
* You should have received a copy of the GNU Lesser General Public License
* along with this library. If not, see <http://www.gnu.org/licenses/>.
*/
#include <libopencm3/sam/gpio.h>
/** @brief Initialize GPIO pins
*
* @param[in] port uint32_t: GPIO Port base address
* @param[in] pins uint32_t bitfield of pins to initialize
* @param[in] flags enum gpio_flags
*/
void gpio_init(uint32_t port, uint32_t pins, enum gpio_flags flags)
{
switch (flags & 0x7) {
case GPIO_FLAG_GPINPUT:
PIO_ODR(port) = pins;
PIO_PER(port) = pins;
break;
case GPIO_FLAG_GPOUTPUT:
PIO_OER(port) = pins;
PIO_PER(port) = pins;
break;
case GPIO_FLAG_PERIPHA:
PIO_ABCDSR1(port) &= ~pins;
PIO_ABCDSR2(port) &= ~pins;
PIO_PDR(port) = pins;
break;
case GPIO_FLAG_PERIPHB:
PIO_ABCDSR1(port) |= pins;
PIO_ABCDSR2(port) &= ~pins;
PIO_PDR(port) = pins;
break;
case GPIO_FLAG_PERIPHC:
PIO_ABCDSR1(port) &= ~pins;
PIO_ABCDSR2(port) |= pins;
PIO_PDR(port) = pins;
break;
case GPIO_FLAG_PERIPHD:
PIO_ABCDSR1(port) |= pins;
PIO_ABCDSR2(port) |= pins;
PIO_PDR(port) = pins;
break;
}
if (flags & GPIO_FLAG_OPEN_DRAIN) {
PIO_MDER(port) = pins;
} else {
PIO_MDDR(port) = pins;
}
if (flags & GPIO_FLAG_PULL_UP) {
PIO_PUER(port) = pins;
} else {
PIO_PUDR(port) = pins;
}
}

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/** @addtogroup gpio_defines
*
* @brief <b>Access functions for the SAM3 I/O Controller</b>
* @ingroup SAM3_defines
* LGPL License Terms @ref lgpl_license
* @author @htmlonly &copy; @endhtmlonly 2012
* Gareth McMullin <gareth@blacksphere.co.nz>
* @author @htmlonly &copy; @endhtmlonly 2014
* Felix Held <felix-libopencm3@felixheld.de>
*
*/
/*
* This file is part of the libopencm3 project.
*
* Copyright (C) 2012 Gareth McMullin <gareth@blacksphere.co.nz>
* Copyright (C) 2014 Felix Held <felix-libopencm3@felixheld.de>
*
* This library is free software: you can redistribute it and/or modify
* it under the terms of the GNU Lesser General Public License as published by
* the Free Software Foundation, either version 3 of the License, or
* (at your option) any later version.
*
* This library is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU Lesser General Public License for more details.
*
* You should have received a copy of the GNU Lesser General Public License
* along with this library. If not, see <http://www.gnu.org/licenses/>.
*/
#include <libopencm3/sam/gpio.h>
/** @brief Atomic set output
*
* @param[in] gpioport uint32_t: GPIO Port base address
* @param[in] gpios uint32_t
*/
void gpio_set(uint32_t gpioport, uint32_t gpios)
{
PIO_SODR(gpioport) = gpios;
}
/** @brief Atomic clear output
*
* @param[in] gpioport uint32_t: GPIO Port base address
* @param[in] gpios uint32_t
*/
void gpio_clear(uint32_t gpioport, uint32_t gpios)
{
PIO_CODR(gpioport) = gpios;
}
/** @brief Toggle output
*
* @param[in] gpioport uint32_t: GPIO Port base address
* @param[in] gpios uint32_t
*/
void gpio_toggle(uint32_t gpioport, uint32_t gpios)
{
uint32_t odsr = PIO_ODSR(gpioport);
PIO_CODR(gpioport) = odsr & gpios;
PIO_SODR(gpioport) = ~odsr & gpios;
}

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/*
* This file is part of the libopencm3 project.
*
* Copyright (C) 2013 Gareth McMullin <gareth@blacksphere.co.nz>
*
* This library is free software: you can redistribute it and/or modify
* it under the terms of the GNU Lesser General Public License as published by
* the Free Software Foundation, either version 3 of the License, or
* (at your option) any later version.
*
* This library is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU Lesser General Public License for more details.
*
* You should have received a copy of the GNU Lesser General Public License
* along with this library. If not, see <http://www.gnu.org/licenses/>.
*/
#include <libopencm3/sam/pmc.h>
#include <libopencm3/sam/eefc.h>
/** Default peripheral clock frequency after reset. */
uint32_t pmc_mck_frequency = 4000000;
void pmc_xtal_enable(bool en, uint8_t startup_time)
{
if (en) {
CKGR_MOR = (CKGR_MOR & ~CKGR_MOR_MOSCXTST_MASK) |
CKGR_MOR_KEY | CKGR_MOR_MOSCXTEN |
(startup_time << 8);
while (!(PMC_SR & PMC_SR_MOSCXTS));
} else {
CKGR_MOR = CKGR_MOR_KEY | (CKGR_MOR & ~CKGR_MOR_MOSCXTEN);
}
}
void pmc_plla_config(uint8_t mul, uint8_t div)
{
CKGR_PLLAR = CKGR_PLLAR_ONE | ((mul - 1) << 16) |
CKGR_PLLAR_PLLACOUNT_MASK | div;
while (!(PMC_SR & PMC_SR_LOCKA));
}
void pmc_peripheral_clock_enable(uint8_t pid)
{
#if defined(PMC_PCER1)
if (pid < 32) {
PMC_PCER0 = 1 << pid;
} else {
PMC_PCER1 = 1 << (pid & 31);
}
#else
/* SAM3N and SAM3U only have one Peripheral Clock Enable Register */
PMC_PCER = 1 << pid;
#endif
}
void pmc_peripheral_clock_disable(uint8_t pid)
{
#if defined(PMC_PCER1)
if (pid < 32) {
PMC_PCDR0 = 1 << pid;
} else {
PMC_PCDR1 = 1 << (pid & 31);
}
#else
PMC_PCDR = 1 << pid;
#endif
}
void pmc_mck_set_source(enum mck_src src)
{
PMC_MCKR = (PMC_MCKR & ~PMC_MCKR_CSS_MASK) | src;
while (!(PMC_SR & PMC_SR_MCKRDY));
}
void pmc_clock_setup_in_xtal_12mhz_out_84mhz(void)
{
eefc_set_latency(4);
/* 12MHz external xtal, maximum possible startup time */
pmc_xtal_enable(true, 0xff);
/* Select as main oscillator */
CKGR_MOR |= CKGR_MOR_KEY | CKGR_MOR_MOSCSEL;
/* Multiply by 7 for 84MHz */
pmc_plla_config(7, 1);
pmc_mck_set_source(MCK_SRC_PLLA);
pmc_mck_frequency = 84000000;
}
void pmc_clock_setup_in_rc_4mhz_out_84mhz(void)
{
eefc_set_latency(4);
/* Select as main oscillator */
CKGR_MOR = CKGR_MOR_KEY |
(CKGR_MOR & ~(CKGR_MOR_MOSCSEL | CKGR_MOR_MOSCRCF_MASK));
/* Multiply by 21 for 84MHz */
pmc_plla_config(21, 1);
pmc_mck_set_source(MCK_SRC_PLLA);
pmc_mck_frequency = 84000000;
}

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/*
* This file is part of the libopencm3 project.
*
* Copyright (C) 2013 Gareth McMullin <gareth@blacksphere.co.nz>
*
* This library is free software: you can redistribute it and/or modify
* it under the terms of the GNU Lesser General Public License as published by
* the Free Software Foundation, either version 3 of the License, or
* (at your option) any later version.
*
* This library is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU Lesser General Public License for more details.
*
* You should have received a copy of the GNU Lesser General Public License
* along with this library. If not, see <http://www.gnu.org/licenses/>.
*/
#include <libopencm3/sam/usart.h>
extern uint32_t pmc_mck_frequency;
void usart_set_baudrate(uint32_t usart, uint32_t baud)
{
USART_BRGR(usart) = pmc_mck_frequency / (16 * baud);
}

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/*
* This file is part of the libopencm3 project.
*
* Copyright (C) 2013 Gareth McMullin <gareth@blacksphere.co.nz>
*
* This library is free software: you can redistribute it and/or modify
* it under the terms of the GNU Lesser General Public License as published by
* the Free Software Foundation, either version 3 of the License, or
* (at your option) any later version.
*
* This library is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU Lesser General Public License for more details.
*
* You should have received a copy of the GNU Lesser General Public License
* along with this library. If not, see <http://www.gnu.org/licenses/>.
*/
#include <libopencm3/sam/usart.h>
void usart_set_databits(uint32_t usart, int bits)
{
USART_MR(usart) = (USART_MR(usart) & ~USART_MR_CHRL_MASK) |
((bits - 5) << 6);
}
void usart_set_stopbits(uint32_t usart, enum usart_stopbits sb)
{
USART_MR(usart) = (USART_MR(usart) & ~USART_MR_NBSTOP_MASK) |
(sb << 12);
}
void usart_set_parity(uint32_t usart, enum usart_parity par)
{
USART_MR(usart) = (USART_MR(usart) & ~USART_MR_PAR_MASK) | (par << 9);
}
void usart_set_mode(uint32_t usart, enum usart_mode mode)
{
USART_CR(usart) =
(mode & USART_MODE_RX) ? USART_CR_RXEN : USART_CR_RXDIS;
USART_CR(usart) = (mode & USART_MODE_TX) ? USART_CR_TXEN
: USART_CR_TXDIS;
}
void usart_set_flow_control(uint32_t usart, enum usart_flowcontrol fc)
{
USART_MR(usart) = (USART_MR(usart) & ~USART_MR_MODE_MASK) |
(fc ? USART_MR_MODE_HW_HANDSHAKING : 0);
}
void usart_enable(uint32_t usart)
{
USART_CR(usart) = USART_CR_TXEN | USART_CR_RXEN;
}
void usart_disable(uint32_t usart)
{
USART_CR(usart) = USART_CR_TXDIS | USART_CR_RXDIS;
}
void usart_send(uint32_t usart, uint16_t data)
{
USART_THR(usart) = data;
}
uint16_t usart_recv(uint32_t usart)
{
return USART_RHR(usart) & 0x1f;
}
void usart_wait_send_ready(uint32_t usart)
{
while ((USART_CSR(usart) & USART_CSR_TXRDY) == 0);
}
void usart_wait_recv_ready(uint32_t usart)
{
while ((USART_CSR(usart) & USART_CSR_RXRDY) == 0);
}
void usart_send_blocking(uint32_t usart, uint16_t data)
{
usart_wait_send_ready(usart);
usart_send(usart, data);
}
uint16_t usart_recv_blocking(uint32_t usart)
{
usart_wait_recv_ready(usart);
return usart_recv(usart);
}
void usart_enable_rx_interrupt(uint32_t usart)
{
USART_IER(usart) = USART_CSR_RXRDY;
}
void usart_disable_rx_interrupt(uint32_t usart)
{
USART_IDR(usart) = USART_CSR_RXRDY;
}
void usart_wp_enable(uint32_t usart)
{
USART_WPMR(usart) = USART_WPMR_KEY | USART_WPMR_WPEN;
}
void usart_wp_disable(uint32_t usart)
{
USART_WPMR(usart) = USART_WPMR_KEY & (~USART_WPMR_WPEN);
}
void usart_select_clock(uint32_t usart, enum usart_clock clk)
{
uint32_t reg_mr = USART_MR(usart) & (~USART_MR_USCLKS_MASK);
USART_MR(usart) = ((clk << USART_MR_USCLKS_SHIFT) & USART_MR_USCLKS_MASK) | reg_mr;
}
void usart_set_character_length(uint32_t usart, enum usart_chrl chrl)
{
uint32_t reg_mr = USART_MR(usart) & (~USART_MR_CHRL_MASK);
USART_MR(usart) = reg_mr | (chrl << USART_MR_CHRL_SHIFT);
}

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##
## This file is part of the libopencm3 project.
##
## Copyright (C) 2016 Karl Palsson <karlp@tweak.net.au>
##
## This library is free software: you can redistribute it and/or modify
## it under the terms of the GNU Lesser General Public License as published by
## the Free Software Foundation, either version 3 of the License, or
## (at your option) any later version.
##
## This library is distributed in the hope that it will be useful,
## but WITHOUT ANY WARRANTY; without even the implied warranty of
## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
## GNU Lesser General Public License for more details.
##
## You should have received a copy of the GNU Lesser General Public License
## along with this library. If not, see <http://www.gnu.org/licenses/>.
##
LIBNAME = libopencm3_samd
SRCLIBDIR ?= ../..
CC = $(PREFIX)gcc
AR = $(PREFIX)ar
TGT_CFLAGS = -Os -Wall -Wextra -I../../../include -fno-common \
-mcpu=cortex-m0plus -mthumb $(FP_FLAGS) -Wstrict-prototypes \
-ffunction-sections -fdata-sections -MD -DSAMD
TGT_CFLAGS += $(DEBUG_FLAGS)
TGT_CFLAGS += $(STANDARD_FLAGS)
# ARFLAGS = rcsv
ARFLAGS = rcs
OBJS =
OBJS += port.o
VPATH += ../../cm3:../common
include ../../Makefile.include

165
libopencm3/lib/sam/d/port.c Normal file
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/** @addtogroup port_file IO Port API
* @ingroup peripheral_apis
* @brief <b>Access functions for the SAMD I/O Controller</b>
* @date 10 April 2020
* @copyright SPDX: LGPL-3.0-or-later
* @author 2020 Gwenhael Goavec-Merou <gwenhael.goavec-merou@trabucayre.com>
*/
/**@{*/
#include <libopencm3/sam/d/port.h>
/** @brief Initialize GPIO pins
*
* Configure a group of Pins for the given port.
*
* @param[in] gpioport port register address base @ref port_reg_base
* @param[in] mode direction @ref gpio_direction
* @param[in] cnf configuration mode @ref gpio_cnf
* @param[in] gpios @ref gpio_pin_id. Any combination of pins
* may be specified by OR'ing then together.
*/
void gpio_mode_setup(uint32_t gpioport, uint8_t mode, uint8_t cnf, uint32_t gpios)
{
uint32_t reg = PORT_WRCONFIG_WRPINCFG;
/* enable pull */
if (cnf == GPIO_CNF_PULLDOWN || cnf == GPIO_CNF_PULLUP) {
reg |= PORT_WRCONFIG_PULLEN;
}
/* enable input buffer */
if (mode != GPIO_MODE_OUTPUT) {
reg |= PORT_WRCONFIG_INEN;
}
/* set pmuxen */
if (cnf == GPIO_CNF_AF) {
reg |= PORT_WRCONFIG_PMUXEN;
}
/* PORTx_WRCONFIG allows to configure pins [31:16] or [15:0] */
/* write low pins */
PORT_WRCONFIG(gpioport) = reg | PORT_WRCONFIG_PINMASK(gpios);
/* write high pins */
PORT_WRCONFIG(gpioport) = reg | PORT_WRCONFIG_HWSEL |
PORT_WRCONFIG_PINMASK(gpios >> 16);
/* configure port direction for selected gpios */
/* DIR is always 0 when PULL */
if (cnf == GPIO_CNF_PULLDOWN || cnf == GPIO_CNF_PULLUP) {
PORT_DIRCLR(gpioport) = gpios;
} else if (mode == GPIO_MODE_INPUT) {
PORT_DIRCLR(gpioport) = gpios;
} else {
PORT_DIRSET(gpioport) = gpios;
}
/* PULL UP/DOWN is configured through OUT */
if (cnf == GPIO_CNF_PULLDOWN) {
PORT_OUTCLR(gpioport) = gpios;
} else if (cnf == GPIO_CNF_PULLUP) {
PORT_OUTSET(gpioport) = gpios;
}
}
/** @brief Alternate function GPIO pins
*
* Configure a group of Pins in alternate function.
*
* @param[in] gpioport port register address base @ref port_reg_base
* @param[in] af pmux configuration @ref gpio_mux
* @param[in] gpios @ref gpio_pin_id. Any combination of pins
* may be specified by OR'ing then together.
*/
void gpio_set_af(uint32_t gpioport, uint8_t af, uint32_t gpios)
{
uint32_t reg = PORT_WRCONFIG_WRPINCFG |
PORT_WRCONFIG_WRPMUX | PORT_WRCONFIG_PMUX(af) |
PORT_WRCONFIG_PMUXEN;
/* write gpios[15:0] */
PORT_WRCONFIG(gpioport) = reg | PORT_WRCONFIG_PINMASK(gpios);
/* write gpios[31:16] */
PORT_WRCONFIG(gpioport) = reg | PORT_WRCONFIG_HWSEL |
PORT_WRCONFIG_PINMASK(gpios >> 16);
}
/** @brief Set a group of Pins
*
* Set a group of Pins for the given port.
*
* @param[in] gpioport port register address base @ref port_reg_base
* @param[in] gpios @ref gpio_pin_id. Any combination of pins may be
* specified by OR'ing then together.
*/
void gpio_set(uint32_t gpioport, uint32_t gpios)
{
PORT_OUTSET(gpioport) = gpios;
}
/** @brief Clear a group of Pins
*
* Clear a group of Pins for the given port.
*
* @param[in] gpioport port register address base @ref port_reg_base
* @param[in] gpios @ref gpio_pin_id. Any combination of pins may be
* specified by OR'ing then together.
*/
void gpio_clear(uint32_t gpioport, uint32_t gpios)
{
PORT_OUTCLR(gpioport) = gpios;
}
/** @brief Read level of a group of Pins
*
* Read the level of a group of Pins for the given port.
*
* @param[in] gpioport port register address base @ref port_reg_base
* @param[in] gpios @ref gpio_pin_id. Any combination of pins may be
* specified by OR'ing then together.
*/
uint32_t gpio_get(uint32_t gpioport, uint32_t gpios)
{
return PORT_IN(gpioport) & gpios;
}
/** @brief Toggle level of a group of Pins
*
* Toggle one or more pins of the givent port.
*
* @param[in] gpioport port register address base @ref port_reg_base
* @param[in] gpios @ref gpio_pin_id. Any combination of pins may be
* specified by OR'ing then together.
*/
void gpio_toggle(uint32_t gpioport, uint32_t gpios)
{
PORT_OUTTGL(gpioport) = gpios;
}
/** @brief Read level for all pins from a port
*
* Read the level of all pins of the given port.
*
* @param[in] port register address base @ref port_reg_base
*
* @return The level of all pins on the port.
*/
uint32_t port_read(uint32_t port)
{
return PORT_IN(port);
}
/** @brief Set level for all pins from a port
*
* Set the level of all pins of the given port.
*
* @param[in] port register address base @ref port_reg_base
* @param[in] data @ref gpio_pin_id. Any combination of pins
* may be specified by OR'ing then together.
*/
void port_write(uint32_t port, uint32_t data)
{
PORT_OUT(port) = data;
}
/**@}*/