git subrepo clone https://github.com/libopencm3/libopencm3
subrepo: subdir: "libopencm3" merged: "f5813a54" upstream: origin: "https://github.com/libopencm3/libopencm3" branch: "master" commit: "f5813a54" git-subrepo: version: "0.4.3" origin: "???" commit: "???"
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libopencm3/lib/stm32/f1/gpio.c
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libopencm3/lib/stm32/f1/gpio.c
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/** @addtogroup gpio_file
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@brief <b>libopencm3 STM32F1xx General Purpose I/O</b>
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@version 1.0.0
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@author @htmlonly © @endhtmlonly 2009
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Uwe Hermann <uwe@hermann-uwe.de>
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@author @htmlonly © @endhtmlonly 2012
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Ken Sarkies <ksarkies@internode.on.net>
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@date 18 August 2012
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Each I/O port has 16 individually configurable bits. Many I/O pins share GPIO
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functionality with a number of alternate functions and must be configured to
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the alternate function mode if these are to be accessed. A feature is available
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to remap alternative functions to a limited set of alternative pins in the
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event of a clash of requirements.
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The data registers associated with each port for input and output are 32 bit
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with the upper 16 bits unused. The output buffer must be written as a 32 bit
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word, but individual bits may be set or reset separately in atomic operations
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to avoid race conditions during interrupts. Bits may also be individually
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locked to prevent accidental configuration changes. Once locked the
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configuration cannot be changed until after the next reset.
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Each port bit can be configured as analog or digital input, the latter can be
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floating or pulled up or down. As outputs they can be configured as either
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push-pull or open drain, digital I/O or alternate function, and with maximum
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output speeds of 2MHz, 10MHz, or 50MHz.
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On reset all ports are configured as digital floating input.
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@section gpio_api_ex Basic GPIO Handling API.
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Example 1: Push-pull digital output actions on ports C2 and C9
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@code
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gpio_set_mode(GPIOC, GPIO_MODE_OUTPUT_2_MHZ,
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GPIO_CNF_OUTPUT_PUSHPULL, GPIO2 | GPIO9);
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gpio_set(GPIOC, GPIO2 | GPIO9);
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gpio_clear(GPIOC, GPIO2);
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gpio_toggle(GPIOC, GPIO2 | GPIO9);
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gpio_port_write(GPIOC, 0x204);
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@endcode
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Example 1: Digital input on port C12
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@code
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gpio_set_mode(GPIOC, GPIO_MODE_INPUT, GPIO_CNF_INPUT_FLOAT, GPIO12);
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reg16 = gpio_port_read(GPIOC);
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@endcode
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LGPL License Terms @ref lgpl_license
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*/
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/*
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* This file is part of the libopencm3 project.
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*
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* Copyright (C) 2009 Uwe Hermann <uwe@hermann-uwe.de>
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*
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* This library is free software: you can redistribute it and/or modify
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* it under the terms of the GNU Lesser General Public License as published by
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* the Free Software Foundation, either version 3 of the License, or
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* (at your option) any later version.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public License
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* along with this library. If not, see <http://www.gnu.org/licenses/>.
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*/
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#include <libopencm3/stm32/gpio.h>
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/**@{*/
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/*---------------------------------------------------------------------------*/
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/** @brief Set GPIO Pin Mode
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Sets the mode (input/output) and configuration (analog/digitial and
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open drain/push pull), for a set of GPIO pins on a given GPIO port.
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@param[in] gpioport Unsigned int32. Port identifier @ref gpio_port_id
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@param[in] mode Unsigned int8. Pin mode @ref gpio_mode
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@param[in] cnf Unsigned int8. Pin configuration @ref gpio_cnf
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@param[in] gpios Unsigned int16. Pin identifiers @ref gpio_pin_id
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If multiple pins are to be set, use bitwise OR '|' to separate
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them.
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*/
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void gpio_set_mode(uint32_t gpioport, uint8_t mode, uint8_t cnf, uint16_t gpios)
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{
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uint16_t i, offset = 0;
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uint32_t crl = 0, crh = 0, tmp32 = 0;
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/*
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* We want to set the config only for the pins mentioned in gpios,
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* but keeping the others, so read out the actual config first.
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*/
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crl = GPIO_CRL(gpioport);
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crh = GPIO_CRH(gpioport);
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/* Iterate over all bits, use i as the bitnumber. */
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for (i = 0; i < 16; i++) {
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/* Only set the config if the bit is set in gpios. */
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if (!((1 << i) & gpios)) {
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continue;
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}
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/* Calculate bit offset. */
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offset = (i < 8) ? (i * 4) : ((i - 8) * 4);
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/* Use tmp32 to either modify crl or crh. */
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tmp32 = (i < 8) ? crl : crh;
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/* Modify bits are needed. */
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tmp32 &= ~(0xf << offset); /* Clear the bits first. */
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tmp32 |= (mode << offset) | (cnf << (offset + 2));
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/* Write tmp32 into crl or crh, leave the other unchanged. */
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crl = (i < 8) ? tmp32 : crl;
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crh = (i >= 8) ? tmp32 : crh;
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}
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GPIO_CRL(gpioport) = crl;
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GPIO_CRH(gpioport) = crh;
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}
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/*---------------------------------------------------------------------------*/
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/** @brief Map the EVENTOUT signal
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Enable the EVENTOUT signal and select the port and pin to be used.
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@param[in] evoutport Unsigned int8. Port for EVENTOUT signal @ref afio_evcr_port
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@param[in] evoutpin Unsigned int8. Pin for EVENTOUT signal @ref afio_evcr_pin
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*/
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void gpio_set_eventout(uint8_t evoutport, uint8_t evoutpin)
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{
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AFIO_EVCR = AFIO_EVCR_EVOE | evoutport | evoutpin;
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}
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/*---------------------------------------------------------------------------*/
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/** @brief Map Alternate Function Port Bits (Main Set)
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A number of alternate function ports can be remapped to defined alternative
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port bits to avoid clashes in cases where multiple alternate functions are
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present. Refer to the datasheets for the particular mapping desired. This
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provides the main set of remap functionality. See @ref gpio_secondary_remap for
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a number of lesser used remaps.
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The AFIO remapping feature is used only with the STM32F10x series.
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@note The Serial Wire JTAG disable controls allow certain GPIO ports to become
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available in place of some of the SWJ signals. Full SWJ capability is obtained
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by setting this to zero. The value of this must be specified for every call to
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this function as its current value cannot be ascertained from the hardware.
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@param[in] swjdisable Disable parts of the SWJ capability @ref
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afio_swj_disable.
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@param[in] maps Bitwise OR of map enable controls you wish to
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enable from @ref afio_remap, @ref afio_remap_can1, @ref afio_remap_tim3,
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@ref afio_remap_tim2, @ref afio_remap_tim1, @ref afio_remap_usart3. For
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connectivity line devices only @ref afio_remap_cld are also available.
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*/
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void gpio_primary_remap(uint32_t swjdisable, uint32_t maps)
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{
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/*
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* the SWJ_CFG bits are write only. (read is explicitly undefined)
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* To be sure we set only the bits we want we must clear them first.
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* However, we are still trying to only enable the map bits desired.
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*/
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uint32_t reg = AFIO_MAPR & ~AFIO_MAPR_SWJ_MASK;
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AFIO_MAPR = reg | swjdisable | maps;
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}
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/*---------------------------------------------------------------------------*/
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/** @brief Map Alternate Function Port Bits (Secondary Set)
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A number of alternate function ports can be remapped to defined alternative
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port bits to avoid clashes in cases where multiple alternate functions are
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present. Refer to the datasheets for the particular mapping desired. This
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provides the second smaller and less used set of remap functionality. See @ref
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gpio_primary_remap for the main set of remaps.
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The AFIO remapping feature is used only with the STM32F10x series.
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@param[in] maps Unsigned int32. Bitwise OR of map enable controls from @ref
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afio_remap2
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*/
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void gpio_secondary_remap(uint32_t maps)
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{
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AFIO_MAPR2 |= maps;
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}
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/**@}*/
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