461 lines
18 KiB
C
461 lines
18 KiB
C
/**
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* @addtogroup can_api CAN Peripheral API
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* @ingroup peripheral_apis
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* @brief <b>PAC55xxxx CAN Driver</b>
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* @author @htmlonly © @endhtmlonly 2020 Kevin Stefanik <kevin@allocor.tech>
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* @date February 13, 2020
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*
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* This library supports the CAN module in the PAC55xx SoC from Qorvo.
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*
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* Note: Acceptance Code Mask Register values of 1 indicate the filter is to
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* ignore the bit. However, standard CAN driver APIs use a positive logic for the
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* mask. The implementations in this file inverts masks as appropriate to
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* the mask to make this more portable/intuitive.
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*
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* LGPL License Terms @ref lgpl_license
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*/
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/*
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* This file is part of the libopencm3 project.
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*
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* This library is free software: you can redistribute it and/or modify
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* it under the terms of the GNU Lesser General Public License as published by
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* the Free Software Foundation, either version 3 of the License, or
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* (at your option) any later version.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public License
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* along with this library. If not, see <http://www.gnu.org/licenses/>.
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*/
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#include <libopencm3/pac55xx/can.h>
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#include <libopencm3/cm3/common.h>
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/*---------------------------------------------------------------------------*/
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/** @brief CAN Enable
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Enable the CAN peripheral and its associated FIFOs/counters/interrupts.
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@param[in] canport Unsigned int32. CAN block register base address.
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*/
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void can_enable(uint32_t canport) {
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CAN_ISR_SR_CMR_MR_CLEAR(canport, CAN_MR_RM);
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}
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/*---------------------------------------------------------------------------*/
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/** @brief CAN Disable
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Disable the CAN peripheral and all associated FIFOs/counters/interrupts.
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@param[in] canport Unsigned int32. CAN block register base address.
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*/
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void can_disable(uint32_t canport) {
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CAN_ISR_SR_CMR_MR_SET(canport, CAN_MR_RM);
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}
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/*---------------------------------------------------------------------------*/
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/** @brief CAN Init
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Initialize the selected CAN peripheral block.
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@param[in] canport Unsigned int32. CAN block register base address.
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@param[in] listen_only bool. Enable listen only mode.
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@param[in] sjw Unsigned int32. Resynchronization time quanta jump width.
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@param[in] tseg1 Unsigned int32. Time segment 1 time quanta width.
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@param[in] tseg2 Unsigned int32. Time segment 2 time quanta width.
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@param[in] sam3 bool. Use best 2 out of 3 samples.
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@param[in] brp Unsigned int32. Baud rate prescaler.
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*/
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void can_init(uint32_t canport, bool listen_only, uint32_t sjw,
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uint32_t tseg1, uint32_t tseg2,
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bool sam3, uint32_t brp) {
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/* Put CAN module in reset and clear out ISR/SR/CMR/MR */
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CAN_ISR_SR_CMR_MR(canport) = CAN_MR_RM;
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/* Setup single filter scheme */
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CAN_ISR_SR_CMR_MR_SET(canport, CAN_MR_AFM);
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/* enable listen-only mode */
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if (listen_only) {
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CAN_ISR_SR_CMR_MR_SET(canport, CAN_MR_LOM);
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}
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/* Set Baud Rate Prescaler, sync jump width, tseg1/2 */
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CAN_BTR1_BTR0_RMC_IMR(canport) = CAN_BTR0_BRP(brp) | CAN_BTR0_SJW(sjw)
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| CAN_BTR1_TSEG1(tseg1) | CAN_BTR1_TSEG2(tseg2);
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if (sam3) {
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/* enable sample bus 3 times */
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CAN_BTR1_BTR0_RMC_IMR(canport) |= CAN_BTR1_SAM;
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}
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/* Filter: Accept incoming messages with any identifier */
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CAN_ACR(canport) = 0;
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/* Note: when mask bits are 1, the bits are ignored */
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CAN_AMR(canport) = 0xFFFFFFFFu;
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}
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/*---------------------------------------------------------------------------*/
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/** @brief CAN Filter Clear
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Clear the message filters to receive all messages.
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@param[in] canport Unsigned int32. CAN block register base address.
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*/
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void can_filter_clear(uint32_t canport) {
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/* Filter: Accept incoming messages with any identifier */
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CAN_ACR(canport) = 0;
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/* Note: when mask bits are 1, the bits are ignored */
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CAN_AMR(canport) = 0xFFFFFFFFu;
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/* Setup single filter scheme */
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CAN_ISR_SR_CMR_MR_SET(canport, CAN_MR_AFM);
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}
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/*---------------------------------------------------------------------------*/
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/** @brief CAN Dual Filter Standard Frame
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Notes:
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- Acceptance Code Mask Register values of 1 indicate the filter is to ignore
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the bit. However standard CAN driver APIs use a positive logic for the mask.
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So this function inverts the mask to make this more portable/intuitive.
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- Register definition byte order is opposite what is shown in Rev 1.23 of
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the PAC55XX Family User Guide. Since both data and ID values cross byte
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boundaries, the bswap32 function is used to correct for the discrepancy.
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@param[in] canport Unsigned int32. CAN block register base address.
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@param[in] id1 Unsigned int32. CAN ID 1. Only bits 10:0 are used.
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@param[in] id1_mask Unsigned int32. CAN ID 1 mask. Only bits 10:0 are used.
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@param[in] id2 Unsigned int32. CAN ID 2. Only bits 10:0 are used.
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@param[in] id2_mask Unsigned int32. CAN ID 2 mask. Only bits 10:0 are used.
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@param[in] db bool. CAN first data byte value.
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@param[in] db_mask bool. CAN first data byte mask.
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*/
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void can_filter_dual(uint32_t canport, uint32_t id1, uint32_t id1_mask,
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uint32_t id2, uint32_t id2_mask,
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uint8_t db, uint8_t db_mask) {
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/* set value */
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uint32_t word = ((id1 << 21) & CAN_ACR_DUAL_ID1)
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| ((id2 << 5) & CAN_ACR_DUAL_ID2)
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| ((db << 12) & CAN_ACR_DUAL_DB_UPPER) | (db & CAN_ACR_DUAL_DB_LOWER);
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CAN_ACR(canport) = __builtin_bswap32(word);
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/* set mask */
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word = ((~id1_mask << 21) & CAN_ACR_DUAL_ID1)
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| ((~id2_mask << 5) & CAN_ACR_DUAL_ID2)
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| ((~db_mask << 12) & CAN_ACR_DUAL_DB_UPPER)
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| ((~db_mask) & CAN_ACR_DUAL_DB_LOWER)
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| CAN_ACR_DUAL_RTR1 | CAN_ACR_DUAL_RTR2;
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CAN_AMR(canport) = __builtin_bswap32(word);
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/* 0: dual filter */
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CAN_ISR_SR_CMR_MR_CLEAR(canport, CAN_MR_AFM);
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}
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/*---------------------------------------------------------------------------*/
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/** @brief CAN Filter Single Standard Frame
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Notes:
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- Acceptance Code Mask Register values of 1 indicate the filter is to ignore
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the bit. However standard CAN driver APIs use a positive logic for the mask.
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So this function inverts the mask to make this more portable/intuitive.
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- Register definition byte order is opposite what is shown in Rev 1.23 of
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the PAC55XX Family User Guide. Since both data and ID values cross byte
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boundaries, the bswap32 function is used to correct for the discrepancy.
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@param[in] canport Unsigned int32. CAN block register base address.
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@param[in] id Unsigned int32. CAN ID. Only bits 10:0 are used.
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@param[in] id_mask Unsigned int32. CAN ID mask. Only bits 10:0 are used.
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@param[in] db1 bool. CAN first data byte value.
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@param[in] db1_mask bool. CAN first data byte mask.
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@param[in] db2 bool. CAN second data byte value.
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@param[in] db2_mask bool. CAN second data byte mask.
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*/
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void can_filter_single_std(uint32_t canport, uint32_t id, uint32_t id_mask,
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uint8_t db1, uint8_t db1_mask,
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uint8_t db2, uint8_t db2_mask) {
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/* set value */
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uint32_t word = ((id << 21) & CAN_ACR_SINGLE_STD_ID)
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| ((db1 << 8) & CAN_ACR_SINGLE_STD_DB1)
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| ((db2 << 0) & CAN_ACR_SINGLE_STD_DB2);
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CAN_ACR(canport) = __builtin_bswap32(word);
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/* set mask */
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word = ((~id_mask << 21) & CAN_ACR_SINGLE_STD_ID)
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| CAN_ACR_SINGLE_STD_RTR | CAN_ACR_DUAL_DB_UPPER
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| ((~db1_mask << 8) & CAN_ACR_SINGLE_STD_DB1)
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| ((~db2_mask << 0) & CAN_ACR_SINGLE_STD_DB2);
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CAN_AMR(canport) = __builtin_bswap32(word);
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/* 1: single filter */
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CAN_ISR_SR_CMR_MR_SET(canport, CAN_MR_AFM);
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}
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/*---------------------------------------------------------------------------*/
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/** @brief CAN Filter Single Standard Frame w/RTR set
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Notes:
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- Acceptance Code Mask Register values of 1 indicate the filter is to ignore
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the bit. However standard CAN driver APIs use a positive logic for the mask.
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So this function inverts the mask to make this more portable/intuitive.
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- Register definition byte order is opposite what is shown in Rev 1.23 of
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the PAC55XX Family User Guide. Since both data and ID values cross byte
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boundaries, the bswap32 function is used to correct for the discrepancy.
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@param[in] canport Unsigned int32. CAN block register base address.
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@param[in] id Unsigned int32. CAN ID. Only bits 10:0 are used.
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@param[in] id_mask Unsigned int32. CAN ID mask. Only bits 10:0 are used.
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@param[in] db1 bool. CAN first data byte value.
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@param[in] db1_mask bool. CAN first data byte mask.
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@param[in] db2 bool. CAN second data byte value.
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@param[in] db2_mask bool. CAN second data byte mask.
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*/
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void can_filter_single_std_rtr(uint32_t canport, uint32_t id, uint32_t id_mask,
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uint8_t db1, uint8_t db1_mask,
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uint8_t db2, uint8_t db2_mask) {
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/* set value */
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uint32_t word = ((id << 21) & CAN_ACR_SINGLE_STD_ID)
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| CAN_ACR_SINGLE_STD_RTR | ((db1 << 8) & CAN_ACR_SINGLE_STD_DB1)
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| ((db2 << 0) & CAN_ACR_SINGLE_STD_DB2);
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CAN_ACR(canport) = __builtin_bswap32(word);
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/* set mask */
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word = ((~id_mask << 21) & CAN_ACR_SINGLE_STD_ID)
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| ((~db1_mask << 8) & CAN_ACR_SINGLE_STD_DB1)
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| ((~db2_mask << 0) & CAN_ACR_SINGLE_STD_DB2);
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CAN_AMR(canport) = __builtin_bswap32(word);
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/* 1: single filter */
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CAN_ISR_SR_CMR_MR_SET(canport, CAN_MR_AFM);
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}
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/*---------------------------------------------------------------------------*/
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/** @brief CAN Filter Single Extended Frame
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Notes:
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- Acceptance Code Mask Register values of 1 indicate the filter is to ignore
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the bit. However standard CAN driver APIs use a positive logic for the mask.
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So this function inverts the mask to make this more portable/intuitive.
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- Register definition byte order is opposite what is shown in Rev 1.23 of
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the PAC55XX Family User Guide. Since both data and ID values cross byte
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boundaries, the bswap32 function is used to correct for the discrepancy.
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@param[in] canport Unsigned int32. CAN block register base address.
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@param[in] id Unsigned int32. CAN ID. Only bits 28:0 are used.
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@param[in] id_mask Unsigned int32. CAN ID mask. Only bits 28:0 are used.
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*/
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void can_filter_single_ext(uint32_t canport, uint32_t id, uint32_t id_mask) {
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/* set value */
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uint32_t word = ((id << 3) & CAN_ACR_SINGLE_EXT_ID);
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CAN_ACR(canport) = __builtin_bswap32(word);
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/* set mask */
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word = ((~id_mask << 3) & CAN_ACR_SINGLE_EXT_ID) | CAN_ACR_SINGLE_EXT_RTR;
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CAN_AMR(canport) = __builtin_bswap32(word);
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/* 1: single filter */
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CAN_ISR_SR_CMR_MR_SET(canport, CAN_MR_AFM);
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}
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/*---------------------------------------------------------------------------*/
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/** @brief CAN Filter Single Extended Frame w/RTR set
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Notes:
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- Acceptance Code Mask Register values of 1 indicate the filter is to ignore
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the bit. However standard CAN driver APIs use a positive logic for the mask.
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So this function inverts the mask to make this more portable/intuitive.
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- Register definition byte order is opposite what is shown in Rev 1.23 of
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the PAC55XX Family User Guide. Since both data and ID values cross byte
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boundaries, the bswap32 function is used to correct for the discrepancy.
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@param[in] canport Unsigned int32. CAN block register base address.
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@param[in] id Unsigned int32. CAN ID. Only bits 28:0 are used.
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@param[in] id_mask Unsigned int32. CAN ID mask. Only bits 28:0 are used.
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*/
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void can_filter_single_ext_rtr(uint32_t canport, uint32_t id, uint32_t id_mask) {
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/* set value */
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uint32_t word = ((id << 3) & CAN_ACR_SINGLE_EXT_ID) | CAN_ACR_SINGLE_EXT_RTR;
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CAN_ACR(canport) = __builtin_bswap32(word);
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/* set mask */
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word = ((~id_mask << 3) & CAN_ACR_SINGLE_EXT_ID);
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CAN_AMR(canport) = __builtin_bswap32(word);
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/* 1: single filter */
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CAN_ISR_SR_CMR_MR_SET(canport, CAN_MR_AFM);
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}
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/*---------------------------------------------------------------------------*/
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/** @brief CAN Enable IRQ
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@param[in] canport Unsigned int32. CAN block register base address.
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@param[in] irq Unsigned int8. IRQ bit(s).
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*/
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void can_enable_irq(uint32_t canport, uint8_t irq) {
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/* set to 1 (not masked) to enable */
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CAN_BTR1_BTR0_RMC_IMR(canport) |= (uint32_t)irq;
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}
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/*---------------------------------------------------------------------------*/
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/** @brief CAN Disable IRQ
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@param[in] canport Unsigned int32. CAN block register base address.
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@param[in] irq Unsigned int8. IRQ bit(s).
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*/
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void can_disable_irq(uint32_t canport, uint8_t irq) {
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/* set to 0 (masked) to disable */
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CAN_BTR1_BTR0_RMC_IMR(canport) &= ~(uint32_t)irq;
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}
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/*---------------------------------------------------------------------------*/
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/** @brief CAN Transmit Standard Frame
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@param[in] canport Unsigned int32. CAN block register base address.
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@param[in] id Unsigned int32. Message ID bits 10:0 used.
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@param[in] rtr bool. Remote Request bit value.
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@param[in] length Unsigned int8. Message payload length.
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@param[in] data Unsigned int8[]. Message payload data.
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@returns true if able to transmit, false otherwise.
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*/
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bool can_transmit_std(uint32_t canport, uint32_t id, bool rtr, uint8_t length,
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const uint8_t *data) {
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/* if TBS is 0, then not ready to transmit */
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if ((CAN_ISR_SR_CMR_MR(canport) & CAN_SR_TBS) == 0) {
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return false;
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}
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uint32_t word = (length & CAN_BITS_3_0)
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| (rtr ? BIT6 : 0) /* DLC/RTR/FF ==> 7:0 */
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| ((id & CAN_BITS_10_3) << 5) /* ID 10:3 ==> 15:8 */
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| ((id & CAN_BITS_2_0) << 21) /* ID 2:0 ==> 23:21 */
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| (((length > 0) ? data[0] : 0) << 24);
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CAN_TXBUF(canport) = word;
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if (length > 1) {
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word = (data[1] << 0) | (data[2] << 8)
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| (data[3] << 16) | (data[4] << 24);
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CAN_TXBUF(canport) = word;
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}
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if (length > 5) {
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word = (data[5] << 0) | (data[6] << 8) | (data[7] << 16);
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CAN_TXBUF(canport) = word;
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}
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/* Request transmit */
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CAN_ISR_SR_CMR_MR_SET(canport, CAN_CMR_TR);
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return true;
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}
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/*---------------------------------------------------------------------------*/
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/** @brief CAN Transmit Extended Frame
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@param[in] canport Unsigned int32. CAN block register base address.
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@param[in] id Unsigned int32. Message ID bits 28:0 used.
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@param[in] rtr bool. Remote Request bit value.
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@param[in] length Unsigned int8. Message payload length, 0-8.
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@param[in] data Unsigned int8[]. Message payload data.
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@returns true if able to transmit, false otherwise.
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*/
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bool can_transmit_ext(uint32_t canport, uint32_t id, bool rtr, uint8_t length,
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const uint8_t *data) {
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/* if TBS is 0, then not ready to transmit */
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if ((CAN_ISR_SR_CMR_MR(canport) & CAN_SR_TBS) == 0) {
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return false;
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}
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uint32_t word = (length & CAN_BITS_3_0)
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| (rtr ? BIT6 : 0) | BIT7 /* DLC/RTR/FF ==> 7:0 */
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| ((id & CAN_BITS_28_21) >> 13) /* ID 28:21 ==> 15:8 */
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| ((id & CAN_BITS_20_13) << 3) /* ID 20:13 ==> 23:16 */
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| ((id & CAN_BITS_12_5) << 19); /* ID 12:5 ==> 31:24 */
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CAN_TXBUF(canport) = word; /* write first 32-bit word to FIFO */
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word = ((id & CAN_BITS_4_0) << 3); /* ID 4:0 ==> 7:3 */
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if (length > 0) {
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word |= (data[0] << 8) | (data[1] << 16) | (data[2] << 24);
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}
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/* for extended frame, always write second 32-bit word to FIFO */
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CAN_TXBUF(canport) = word;
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if (length > 3) {
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word = (data[3] << 0) | (data[4] << 8)
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| (data[5] << 16) | (data[6] << 24);
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CAN_TXBUF(canport) = word;
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}
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if (length > 7) {
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word = data[7];
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CAN_TXBUF(canport) = word;
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}
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/* Request transmit */
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CAN_ISR_SR_CMR_MR_SET(canport, CAN_CMR_TR);
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return true;
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}
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/*---------------------------------------------------------------------------*/
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/** @brief CAN Abort Transmit
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Aborts the current transmission.
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@param[in] canport Unsigned int32. CAN block register base address.
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*/
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void can_abort_transmit(uint32_t canport) {
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CAN_ISR_SR_CMR_MR_SET(canport, CAN_CMR_AT);
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}
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/*---------------------------------------------------------------------------*/
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/** @brief CAN Receive Message
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If no data is in the RX buffer, id and length are set to 0.
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@param[in] canport Unsigned int32. CAN block register base address.
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@param[out] id Unsigned int32 pointer. Message ID.
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@param[out] ext bool pointer. The message ID is extended.
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@param[out] rtr bool pointer. Remote Request bit value.
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@param[out] length Unsigned int8 pointer. Length of message payload.
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@param[out] data Unsigned int8[]. Message payload data, min length 8.
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*/
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void can_receive(uint32_t canport, uint32_t *id, bool *ext, bool *rtr, uint8_t *length,
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uint8_t *data) {
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if ((CAN_ISR_SR_CMR_MR(canport) & CAN_ISR_RI) == 0 || CAN_RMC(canport) == 0) {
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*id = 0;
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*length = 0;
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return; /* empty RX FIFO */
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}
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uint32_t can_buffer = CAN_RXBUF(canport); /* read 32-bit word */
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uint8_t rx_length = can_buffer & CAN_BITS_3_0;
|
|
bool is_extended = can_buffer & BIT7;
|
|
if (ext) {
|
|
*ext = is_extended;
|
|
}
|
|
if (rtr) {
|
|
*rtr = can_buffer & BIT6;
|
|
}
|
|
if (length) {
|
|
*length = rx_length;
|
|
}
|
|
uint32_t _id;
|
|
if (is_extended) {
|
|
/* Parse extended message ID from RXBUF */
|
|
_id = ((can_buffer & CAN_BITS_15_8) << 13) /* ID 28:21 <== 15:8 */
|
|
| ((can_buffer & CAN_BITS_23_16) >> 3) /* ID 20:13 <== 23:16 */
|
|
| ((can_buffer & CAN_BITS_31_24) >> 19); /* ID 12:5 <== 31:24 */
|
|
can_buffer = CAN_RXBUF(canport);
|
|
_id |= ((can_buffer & CAN_BITS_7_3) >> 3); /* ID 4:0 <== 7:3 */
|
|
|
|
/* Parse extended message data from RXBUF */
|
|
data[0] = can_buffer >> 8;
|
|
data[1] = can_buffer >> 16;
|
|
data[2] = can_buffer >> 24;
|
|
if (rx_length > 3) {
|
|
can_buffer = CAN_RXBUF(canport);
|
|
data[3] = can_buffer;
|
|
data[4] = can_buffer >> 8;
|
|
data[5] = can_buffer >> 16;
|
|
data[6] = can_buffer >> 24;
|
|
}
|
|
if (rx_length > 7) {
|
|
can_buffer = CAN_RXBUF(canport);
|
|
data[7] = can_buffer;
|
|
}
|
|
} else {
|
|
/* Parse standard message ID from RXBUF */
|
|
_id = ((can_buffer & CAN_BITS_15_8) >> 5) /* ID 10:3 <== 15:8 */
|
|
| ((can_buffer & CAN_BITS_23_21) >> 21); /* ID 2:0 <== 23:21 */
|
|
/* Parse standard message data from RXBUF */
|
|
data[0] = can_buffer >> 24;
|
|
if (rx_length > 1) {
|
|
can_buffer = CAN_RXBUF(canport);
|
|
data[1] = can_buffer;
|
|
data[2] = can_buffer >> 8;
|
|
data[3] = can_buffer >> 16;
|
|
data[4] = can_buffer >> 24;
|
|
if (rx_length > 5) {
|
|
/* buffer contains data5,data6,data7 */
|
|
can_buffer = CAN_RXBUF(canport);
|
|
data[5] = can_buffer;
|
|
data[6] = can_buffer >> 8;
|
|
data[7] = can_buffer >> 16;
|
|
}
|
|
}
|
|
}
|
|
if (id) {
|
|
*id = _id;
|
|
}
|
|
|
|
/*
|
|
* Write 1 to acknowledge/clear the interrupt
|
|
* Note: ensure not to let the other interrupt masks be written as 1, so as
|
|
* to avoid acknowledging them.
|
|
* Note: CAN_ISR_RI is already high, but we still write '1' to it to clear it.
|
|
*/
|
|
CAN_ISR_ACKNOWLEDGE(canport, CAN_ISR_RI);
|
|
return;
|
|
}
|