226 lines
6.0 KiB
C
226 lines
6.0 KiB
C
/** @defgroup VF6xx_uart UART
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*
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* @ingroup VF6xx
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*
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* @section vf6xx_uart_api_ex UART API.
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*
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* @brief <b>VF6xx Universal Asynchronous Receiver/Transmitter (UART)</b>
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*
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* @author @htmlonly © @endhtmlonly 2014 Stefan Agner <stefan@agner.ch>
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*
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* @date 03 July 2014
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*
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* This library supports the UART in the VF6xx SoC of Freescale.
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* Devices can have up to 6 UARTs.
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*
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* LGPL License Terms @ref lgpl_license
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*/
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/*
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* This file is part of the libopencm3 project.
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*
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* Copyright (C) 2014 Stefan Agner <stefan@agner.ch>
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*
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* This library is free software: you can redistribute it and/or modify
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* it under the terms of the GNU Lesser General Public License as published by
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* the Free Software Foundation, either version 3 of the License, or
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* (at your option) any later version.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public License
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* along with this library. If not, see <http://www.gnu.org/licenses/>.
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*/
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/**@{*/
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#include <libopencm3/vf6xx/uart.h>
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#include <libopencm3/vf6xx/ccm.h>
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/*---------------------------------------------------------------------------*/
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/** @brief UART Set Baudrate.
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The baud rate is computed from the IPG bus clock. The bus clock must be
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calculated by using @ref ccm_calculate_clocks before calling this function.
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@param[in] uart unsigned 32 bit. UART block register address base @ref
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uart_reg_base
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@param[in] baud unsigned 32 bit. Baud rate specified in Hz.
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*/
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void uart_set_baudrate(uint32_t uart, uint32_t baud)
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{
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uint32_t bd_clk = ccm_ipg_bus_clk / baud;
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uint32_t sbr;
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/* Round up if LSB is one... */
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bd_clk /= 8;
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sbr = bd_clk / 2 + (bd_clk & 0x1);
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UART_BDL(uart) = sbr & UART_BDL_SBR_MASK;
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UART_BDH(uart) = (sbr >> 8) & UART_BDH_SBR_MASK;
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}
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/*---------------------------------------------------------------------------*/
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/** @brief UART Set Parity.
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The parity bit can be selected as none, even or odd.
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@param[in] uart unsigned 32 bit. UART block register address base @ref
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uart_reg_base
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@param[in] parity unsigned 8 bit. Parity @ref uart_parity.
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*/
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void uart_set_parity(uint32_t uart, uint8_t parity)
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{
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uint8_t reg8;
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reg8 = UART_C1(uart);
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reg8 = (reg8 & ~UART_PARITY_MASK) | parity;
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UART_C1(uart) = reg8;
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}
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/*---------------------------------------------------------------------------*/
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/** @brief UART Set Hardware Flow Control.
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The flow control bit can be selected as none, RTS, CTS or RTS+CTS.
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@param[in] uart unsigned 32 bit. UART block register address base @ref
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uart_reg_base
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@param[in] flowcontrol unsigned 8 bit. Flowcontrol @ref uart_cr3_flowcontrol.
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*/
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void uart_set_flow_control(uint32_t uart, uint8_t flowcontrol)
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{
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uint8_t reg8;
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reg8 = UART_MODEM(uart);
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reg8 = (reg8 & ~UART_FLOWCONTROL_MASK) | flowcontrol;
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UART_MODEM(uart) = reg8;
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}
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/*---------------------------------------------------------------------------*/
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/** @brief UART Enable.
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Enable Tramitter and Receiver
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@param[in] uart unsigned 32 bit. UART block register address base @ref
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uart_reg_base
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*/
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void uart_enable(uint32_t uart)
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{
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UART_C2(uart) |= (UART_C2_TE | UART_C2_RE);
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}
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/*---------------------------------------------------------------------------*/
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/** @brief UART Disable.
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At the end of the current frame, the UART is disabled to reduce power.
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@param[in] uart unsigned 32 bit. UART block register address base @ref
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uart_reg_base
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*/
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void uart_disable(uint32_t uart)
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{
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UART_C2(uart) &= ~(UART_C2_TE | UART_C2_RE);
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}
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/*---------------------------------------------------------------------------*/
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/** @brief UART Send a Data Word.
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*
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* @param[in] uart unsigned 32 bit. UART block register address base @ref
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* uart_reg_base
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* @param[in] data unsigned 8 bit.
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*/
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void uart_send(uint32_t uart, uint8_t data)
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{
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UART_D(uart) = data;
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}
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/*---------------------------------------------------------------------------*/
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/** @brief UART Wait for Transmit Data Buffer Empty
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*
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* Blocks until the transmit data buffer becomes empty and is ready to accept
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* the next data word.
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*
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* @param[in] uart unsigned 32 bit. UART block register address base @ref
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* uart_reg_base
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*/
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void uart_wait_send_ready(uint32_t uart)
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{
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/* Wait until the data has been transferred into the shift register. */
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while ((UART_S1(uart) & UART_S1_TC) == 0);
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}
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/*---------------------------------------------------------------------------*/
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/** @brief UART Send Data byte blocking
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*
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* Blocks until the transmit data buffer becomes empty before sending the
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* next (given) byte.
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* @param[in] uart unsigned 32 bit. UART block register address base @ref
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* uart_reg_base
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* @param[in] data unsigned 8 bit.
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*/
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void uart_send_blocking(uint32_t uart, uint8_t data)
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{
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uart_wait_send_ready(uart);
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uart_send(uart, data);
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}
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/*---------------------------------------------------------------------------*/
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/** @brief UART Read a Received Data Word.
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*
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* @param[in] uart unsigned 32 bit. UART block register address base @ref
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* uart_reg_base
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* @returns unsigned 8 bit data word.
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*/
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uint8_t uart_recv(uint32_t uart)
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{
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/* Receive data. */
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return UART_D(uart);
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}
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/*---------------------------------------------------------------------------*/
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/** @brief UART Wait for Received Data Available
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*
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* Blocks until the receive data buffer holds a valid received data word.
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*
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* @param[in] uart unsigned 32 bit. UART block register address base @ref
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* uart_reg_base
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*/
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void uart_wait_recv_ready(uint32_t uart)
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{
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/* Wait until the data is ready to be received. */
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while ((UART_S1(uart) & UART_S1_RDRF) == 0);
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}
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/*---------------------------------------------------------------------------*/
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/** @brief UART Read a Received Data Word with Blocking.
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Wait until a data word has been received then return the word.
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@param[in] uart unsigned 32 bit. UART block register address base @ref
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uart_reg_base
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@returns unsigned 16 bit data word.
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*/
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uint8_t uart_recv_blocking(uint32_t uart)
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{
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uart_wait_recv_ready(uart);
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return uart_recv(uart);
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}
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/**@}*/
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