156 lines
5.1 KiB
C
156 lines
5.1 KiB
C
/** @addtogroup msc_defines
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*/
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/*
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* This file is part of the libopencm3 project.
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*
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* Copyright (C) 2015 Kuldeep Singh Dhaka <kuldeepdhaka9@gmail.com>
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*
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* This library is free software: you can redistribute it and/or modify
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* it under the terms of the GNU Lesser General Public License as published by
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* the Free Software Foundation, either version 3 of the License, or
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* (at your option) any later version.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public License
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* along with this library. If not, see <http://www.gnu.org/licenses/>.
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*/
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#pragma once
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#include <libopencm3/efm32/memorymap.h>
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#include <libopencm3/cm3/common.h>
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/**@{*/
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#define MSC_CTRL MMIO32(MSC_BASE + 0x000)
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#define MSC_READCTRL MMIO32(MSC_BASE + 0x004)
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#define MSC_WRITECTRL MMIO32(MSC_BASE + 0x008)
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#define MSC_WRITECMD MMIO32(MSC_BASE + 0x00C)
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#define MSC_ADDRB MMIO32(MSC_BASE + 0x010)
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#define MSC_WDATA MMIO32(MSC_BASE + 0x018)
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#define MSC_STATUS MMIO32(MSC_BASE + 0x01C)
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#define MSC_IF MMIO32(MSC_BASE + 0x02C)
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#define MSC_IFS MMIO32(MSC_BASE + 0x030)
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#define MSC_IFC MMIO32(MSC_BASE + 0x034)
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#define MSC_IEN MMIO32(MSC_BASE + 0x038)
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#define MSC_LOCK MMIO32(MSC_BASE + 0x03C)
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#define MSC_CMD MMIO32(MSC_BASE + 0x040)
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#define MSC_CACHEHITS MMIO32(MSC_BASE + 0x044)
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#define MSC_CACHEMISSES MMIO32(MSC_BASE + 0x048)
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#define MSC_TIMEBASE MMIO32(MSC_BASE + 0x050)
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#define MSC_MASSLOCK MMIO32(MSC_BASE + 0x054)
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/* MSC_CTRL */
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#define MSC_CTRL_BUSFAULT (1 << 0)
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/* MSC_READCTRL */
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#define MSC_READCTRL_BUSSTRATEGY_SHIFT (16)
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#define MSC_READCTRL_BUSSTRATEGY_MASK \
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(0x3 << MSC_READCTRL_BUSSTRATEGY_SHIFT)
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#define MSC_READCTRL_BUSSTRATEGY(v) \
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(((v) << MSC_READCTRL_BUSSTRATEGY_SHIFT) & \
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MSC_READCTRL_BUSSTRATEGY_MASK)
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#define MSC_READCTRL_BUSSTRATEGY_CPU MSC_READCTRL_BUSSTRATEGY(0)
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#define MSC_READCTRL_BUSSTRATEGY_DMA MSC_READCTRL_BUSSTRATEGY(1)
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#define MSC_READCTRL_BUSSTRATEGY_DMAEM1 MSC_READCTRL_BUSSTRATEGY(2)
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#define MSC_READCTRL_BUSSTRATEGY_NONE MSC_READCTRL_BUSSTRATEGY(3)
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#define MSC_READCTRL_RAMCEN (1 << 7)
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#define MSC_READCTRL_EBICDIS (1 << 6)
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#define MSC_READCTRL_ICCDIS (1 << 5)
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#define MSC_READCTRL_AIDIS (1 << 4)
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#define MSC_READCTRL_IFCDIS (1 << 3)
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#define MSC_READCTRL_MODE_SHIFT (0)
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#define MSC_READCTRL_MODE_MASK (0x7 << MSC_READCTRL_MODE_SHIFT)
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#define MSC_READCTRL_MODE(v) \
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(((v) << MSC_READCTRL_MODE_SHIFT) & MSC_READCTRL_MODE_MASK)
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#define MSC_READCTRL_MODE_WS0 0
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#define MSC_READCTRL_MODE_WS1 1
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#define MSC_READCTRL_MODE_WS0SCBTP 2
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#define MSC_READCTRL_MODE_WS1SCBTP 3
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#define MSC_READCTRL_MODE_WS2 4
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#define MSC_READCTRL_MODE_WS2SCBTP 5
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/* MSC_WRITECTRL */
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#define MSC_WRITECTRL_IRQERASEABORT (1 << 1)
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#define MSC_WRITECTRL_WREN (1 << 0)
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/* MSC_WRITECMD */
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#define MSC_WRITECMD_CLEARWDATA (1 << 12)
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#define MSC_WRITECMD_ERASEMAIN0 (1 << 8)
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#define MSC_WRITECMD_ERASEABORT (1 << 5)
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#define MSC_WRITECMD_WRITETRIG (1 << 4)
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#define MSC_WRITECMD_WRITEONCE (1 << 3)
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#define MSC_WRITECMD_WRITEEND (1 << 2)
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#define MSC_WRITECMD_ERASEPAGE (1 << 1)
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#define MSC_WRITECMD_LADDRIM (1 << 0)
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/* MSC_STATUS */
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#define MSC_STATUS_PCRUNNING (1 << 6)
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#define MSC_STATUS_ERASEABORTED (1 << 5)
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#define MSC_STATUS_WORDTIMEOUT (1 << 4)
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#define MSC_STATUS_WDATAREADY (1 << 3)
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#define MSC_STATUS_INVADDR (1 << 2)
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#define MSC_STATUS_LOCKED (1 << 1)
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#define MSC_STATUS_BUSY (1 << 0)
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/* MSC_IF */
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#define MSC_IF_CMOF (1 << 3)
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#define MSC_IF_CHOF (1 << 2)
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#define MSC_IF_WRITE (1 << 1)
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#define MSC_IF_ERASE (1 << 0)
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/* MSC_IFS */
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#define MSC_IFS_CMOF (1 << 3)
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#define MSC_IFS_CHOF (1 << 2)
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#define MSC_IFS_WRITE (1 << 1)
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#define MSC_IFS_ERASE (1 << 0)
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/* MSC_IFC */
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#define MSC_IFC_CMOF (1 << 3)
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#define MSC_IFC_CHOF (1 << 2)
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#define MSC_IFC_WRITE (1 << 1)
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#define MSC_IFC_ERASE (1 << 0)
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/* MSC_*IEN */
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#define MSC_IEN_CMOF (1 << 3)
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#define MSC_IEN_CHOF (1 << 2)
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#define MSC_IEN_WRITE (1 << 1)
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#define MSC_IEN_ERASE (1 << 0)
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/* MSC_LOCK */
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#define MSC_LOCK_LOCKKEY_SHIFT (0)
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#define MSC_LOCK_LOCKKEY(v) ((v) << MSC_LOCK_LOCKKEY_SHIFT)
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#define MSC_LOCK_LOCKKEY_UNLOCKED MSC_LOCK_LOCKKEY(0)
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#define MSC_LOCK_LOCKKEY_LOCKED MSC_LOCK_LOCKKEY(1)
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#define MSC_LOCK_LOCKKEY_LOCK MSC_LOCK_LOCKKEY(0)
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#define MSC_LOCK_LOCKKEY_UNLOCK MSC_LOCK_LOCKKEY(0x1B71)
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/* MSC_CMD */
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#define MSC_CMD_STOPPC (1 << 2)
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#define MSC_CMD_STARTPC (1 << 1)
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#define MSC_CMD_INVCACHE (1 << 0)
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/* MSC_TIMEBASE */
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#define MSC_TIMEBASE_PERIOD (1 << 16)
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#define MSC_TIMEBASE_BASE_SHIFT (0)
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#define MSC_TIMEBASE_BASE_MASK (0x3F << MSC_TIMEBASE_BASE_SHIFT)
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#define MSC_TIMEBASE_BASE(v) \
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(((v) << MSC_TIMEBASE_BASE_SHIFT) & MSC_TIMEBASE_BASE_MASK)
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/* MSC_MASSLOCK */
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#define MSC_MASSLOCK_LOCKKEY_SHIFT (0)
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#define MSC_MASSLOCK_LOCKKEY(v) ((v) << MSC_MASSLOCK_LOCKKEY_SHIFT)
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#define MSC_MASSLOCK_LOCKKEY_UNLOCKED MSC_MASSLOCK_LOCKKEY(0)
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#define MSC_MASSLOCK_LOCKKEY_LOCKED MSC_MASSLOCK_LOCKKEY(1)
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#define MSC_MASSLOCK_LOCKKEY_LOCK MSC_MASSLOCK_LOCKKEY(0)
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#define MSC_MASSLOCK_LOCKKEY_UNLOCK MSC_MASSLOCK_LOCKKEY(0x631A)
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/**@}*/ |