Arti Zirk
244fdbc35c
subrepo: subdir: "libopencm3" merged: "f5813a54" upstream: origin: "https://github.com/libopencm3/libopencm3" branch: "master" commit: "f5813a54" git-subrepo: version: "0.4.3" origin: "???" commit: "???"
307 lines
9.5 KiB
C
307 lines
9.5 KiB
C
/** @addtogroup usart_file
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@ingroup peripheral_apis
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@author @htmlonly © @endhtmlonly 2016 Cem Basoglu <cem.basoglu@web.de>
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*/
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/*
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* This file is part of the libopencm3 project.
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*
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* Copyright (C) 2016 Cem Basoglu <cem.basoglu@web.de>
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*
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* This library is free software: you can redistribute it and/or modify
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* it under the terms of the GNU Lesser General Public License as published by
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* the Free Software Foundation, either version 3 of the License, or
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* (at your option) any later version.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public License
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* along with this library. If not, see <http://www.gnu.org/licenses/>.
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*/
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/**@{*/
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#include <libopencm3/stm32/usart.h>
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/*---------------------------------------------------------------------------*/
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/** @brief USART enable data inversion
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Logical data from the data register are send/received in negative/inverse
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logic. (1=L, 0=H). The parity bit is also inverted.
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@note This bit field can only be written when the USART is disabled.
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@param[in] usart USART block register address base @ref usart_reg_base
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*/
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void usart_enable_data_inversion(uint32_t usart)
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{
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USART_CR2(usart) |= USART_CR2_DATAINV;
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}
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/*---------------------------------------------------------------------------*/
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/** @brief USART disable data inversion
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Logical data from the data register are send/received in positive/direct logic.
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(1=H, 0=L)
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@note This bit field can only be written when the USART is disabled.
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@param[in] usart USART block register address base @ref usart_reg_base
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*/
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void usart_disable_data_inversion(uint32_t usart)
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{
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USART_CR2(usart) &= ~USART_CR2_DATAINV;
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}
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/*---------------------------------------------------------------------------*/
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/** @brief USART Enable TX pin active level inversion
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TX pin signal values are inverted. (VDD =0/mark, Gnd=1/idle).
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@note This bit field can only be written when the USART is disabled.
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@param[in] usart USART block register address base @ref usart_reg_base
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*/
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void usart_enable_tx_inversion(uint32_t usart)
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{
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USART_CR2(usart) |= USART_CR2_TXINV;
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}
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/*---------------------------------------------------------------------------*/
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/** @brief USART Disable TX pin active level inversion
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TX pin signal works using the standard logic levels (VDD =1/idle, Gnd=0/mark)
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@note This bit field can only be written when the USART is disabled.
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@param[in] usart USART block register address base @ref usart_reg_base
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*/
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void usart_disable_tx_inversion(uint32_t usart)
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{
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USART_CR2(usart) &= ~USART_CR2_TXINV;
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}
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/*---------------------------------------------------------------------------*/
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/** @brief USART Enable RX pin active level inversion
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RX pin signal values are inverted. (VDD =0/mark, Gnd=1/idle).
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This bit field can only be written when the USART is disabled.
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@param[in] usart USART block register address base @ref usart_reg_base
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*/
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void usart_enable_rx_inversion(uint32_t usart)
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{
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USART_CR2(usart) |= USART_CR2_RXINV;
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}
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/*---------------------------------------------------------------------------*/
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/** @brief USART Disable RX pin active level inversion
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RX pin signal works using the standard logic levels (VDD =1/idle, Gnd=0/mark)
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This bit field can only be written when the USART is disabled.
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@param[in] usart USART block register address base @ref usart_reg_base
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*/
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void usart_disable_rx_inversion(uint32_t usart)
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{
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USART_CR2(usart) &= ~USART_CR2_RXINV;
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}
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/*---------------------------------------------------------------------------*/
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/** @brief USART Enable Half-duplex
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- The TX and RX lines are internally connected.
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- The RX pin is no longer used
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- The TX pin is always released when no data is transmitted. Thus,
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it acts as a standard I/O in idle or in reception. It means
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that the I/O must be configured so that TX is configured as
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alternate function open-drain with an external pull-up.
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Apart from this, the communication protocol is similar to normal USART mode.
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Any conflicts on the line must be managed by software
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This bit field can only be written when the USART is disabled.
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@param[in] usart USART block register address base @ref usart_reg_base
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*/
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void usart_enable_halfduplex(uint32_t usart)
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{
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USART_CR3(usart) |= USART_CR3_HDSEL;
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}
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/*---------------------------------------------------------------------------*/
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/** @brief USART Disable Half-duplex
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This bit field can only be written when the USART is disabled.
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@param[in] usart USART block register address base @ref usart_reg_base
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*/
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void usart_disable_halfduplex(uint32_t usart)
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{
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USART_CR3(usart) &= ~USART_CR3_HDSEL;
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}
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/*---------------------------------------------------------------------------*/
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/** @brief USART Set receiver timeout value
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Sets the receive timeout value in terms of number of bit duration.
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The @ref USART_ISR_RTOF is set if, after the last received character,
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no new start bit is detected for more than the receive timeout value.
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@note The timeout value can also be written when USART is enabled.
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If the new value is lower/equals the internal hardware counter,
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the RTOF flag will be set.
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@param[in] usart USART block register address base @ref usart_reg_base
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@param[in] value The receive timeout value in terms of number of bit duration.
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*/
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void usart_set_rx_timeout_value(uint32_t usart, uint32_t value)
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{
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uint32_t reg;
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reg = USART_RTOR(usart) & ~USART_RTOR_RTO_MASK;
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reg |= (USART_RTOR_RTO_VAL(value) & USART_RTOR_RTO_MASK);
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USART_RTOR(usart) = reg;
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}
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/*---------------------------------------------------------------------------*/
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/** @brief USART enable receive timeout function
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@note If the USART does not support the Receiver timeout feature,
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this bit is reserved and forced by hardware to ‘0’.
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@param[in] usart USART block register address base @ref usart_reg_base
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*/
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void usart_enable_rx_timeout(uint32_t usart)
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{
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USART_CR2(usart) |= USART_CR2_RTOEN;
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}
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/*---------------------------------------------------------------------------*/
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/** @brief USART disable receive timeout function
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@note If the USART does not support the Receiver timeout feature,
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this bit is reserved and forced by hardware to ‘0’.
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@param[in] usart USART block register address base @ref usart_reg_base
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*/
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void usart_disable_rx_timeout(uint32_t usart)
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{
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USART_CR2(usart) &= ~USART_CR2_RTOEN;
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}
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/*---------------------------------------------------------------------------*/
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/** @brief USART enable receive timeout interrupt
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An interrupt is generated when the RTOF Flag is set
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in the @ref USART_ISR register.
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@note If the USART does not support the Receiver timeout feature,
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this bit is reserved and forced by hardware to ‘0’.
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@param[in] usart USART block register address base @ref usart_reg_base
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*/
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void usart_enable_rx_timeout_interrupt(uint32_t usart)
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{
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USART_CR1(usart) |= USART_CR1_RTOIE;
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}
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/*---------------------------------------------------------------------------*/
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/** @brief USART disable receive timeout interrupt
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@note If the USART does not support the Receiver timeout feature,
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this bit is reserved and forced by hardware to ‘0’.
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@param[in] usart USART block register address base @ref usart_reg_base
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*/
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void usart_disable_rx_timeout_interrupt(uint32_t usart)
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{
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USART_CR1(usart) &= ~USART_CR1_RTOIE;
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}
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/*---------------------------------------------------------------------------*/
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/** @brief USART Send a Data Word.
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*
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* @param[in] usart unsigned 32 bit. USART block register address base @ref
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* usart_reg_base
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* @param[in] data unsigned 16 bit.
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*/
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void usart_send(uint32_t usart, uint16_t data)
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{
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/* Send data. */
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USART_TDR(usart) = (data & USART_TDR_MASK);
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}
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/*---------------------------------------------------------------------------*/
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/** @brief USART Read a Received Data Word.
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*
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* If parity is enabled the MSB (bit 7 or 8 depending on the word length) is
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* the parity bit.
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*
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* @param[in] usart unsigned 32 bit. USART block register address base @ref
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* usart_reg_base
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* @returns unsigned 16 bit data word.
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*/
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uint16_t usart_recv(uint32_t usart)
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{
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/* Receive data. */
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return USART_RDR(usart) & USART_RDR_MASK;
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}
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/*---------------------------------------------------------------------------*/
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/** @brief USART Wait for Transmit Data Buffer Empty
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*
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* Blocks until the transmit data buffer becomes empty and is ready to accept
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* the next data word.
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*
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* @param[in] usart unsigned 32 bit. USART block register address base @ref
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* usart_reg_base
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*/
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void usart_wait_send_ready(uint32_t usart)
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{
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/* Wait until the data has been transferred into the shift register. */
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while ((USART_ISR(usart) & USART_ISR_TXE) == 0);
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}
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/*---------------------------------------------------------------------------*/
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/** @brief USART Wait for Received Data Available
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*
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* Blocks until the receive data buffer holds a valid received data word.
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*
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* @param[in] usart unsigned 32 bit. USART block register address base @ref
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* usart_reg_base
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*/
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void usart_wait_recv_ready(uint32_t usart)
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{
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/* Wait until the data is ready to be received. */
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while ((USART_ISR(usart) & USART_ISR_RXNE) == 0);
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}
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/*---------------------------------------------------------------------------*/
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/** @brief USART Read a Status Flag.
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*
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* @param[in] usart unsigned 32 bit. USART block register address base @ref
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* usart_reg_base
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* @param[in] flag Unsigned int32. Status register flag @ref usart_isr_values.
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* @returns boolean: flag set.
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*/
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bool usart_get_flag(uint32_t usart, uint32_t flag)
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{
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return ((USART_ISR(usart) & flag) != 0);
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}
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/**@}*/
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