Arti Zirk
244fdbc35c
subrepo: subdir: "libopencm3" merged: "f5813a54" upstream: origin: "https://github.com/libopencm3/libopencm3" branch: "master" commit: "f5813a54" git-subrepo: version: "0.4.3" origin: "???" commit: "???"
416 lines
8.9 KiB
YAML
416 lines
8.9 KiB
YAML
!!omap
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- I2C0_CONSET:
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fields: !!omap
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- AA:
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access: rw
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description: Assert acknowledge flag
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lsb: 2
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reset_value: '0'
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width: 1
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- SI:
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access: rw
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description: I2C interrupt flag
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lsb: 3
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reset_value: '0'
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width: 1
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- STO:
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access: rw
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description: STOP flag
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lsb: 4
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reset_value: '0'
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width: 1
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- STA:
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access: rw
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description: START flag
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lsb: 5
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reset_value: '0'
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width: 1
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- I2EN:
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access: rw
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description: I2C interface enable
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lsb: 6
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reset_value: '0'
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width: 1
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- I2C1_CONSET:
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fields: !!omap
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- AA:
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access: rw
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description: Assert acknowledge flag
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lsb: 2
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reset_value: '0'
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width: 1
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- SI:
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access: rw
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description: I2C interrupt flag
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lsb: 3
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reset_value: '0'
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width: 1
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- STO:
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access: rw
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description: STOP flag
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lsb: 4
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reset_value: '0'
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width: 1
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- STA:
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access: rw
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description: START flag
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lsb: 5
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reset_value: '0'
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width: 1
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- I2EN:
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access: rw
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description: I2C interface enable
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lsb: 6
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reset_value: '0'
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width: 1
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- I2C0_STAT:
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fields: !!omap
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- STATUS:
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access: r
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description: These bits give the actual status information about the I2C interface
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lsb: 3
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reset_value: '0x1f'
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width: 5
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- I2C1_STAT:
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fields: !!omap
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- STATUS:
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access: r
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description: These bits give the actual status information about the I2C interface
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lsb: 3
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reset_value: '0x1f'
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width: 5
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- I2C0_DAT:
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fields: !!omap
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- DATA:
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access: rw
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description: This register holds data values that have been received or are
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to be transmitted
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lsb: 0
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reset_value: '0'
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width: 8
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- I2C1_DAT:
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fields: !!omap
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- DATA:
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access: rw
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description: This register holds data values that have been received or are
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to be transmitted
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lsb: 0
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reset_value: '0'
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width: 8
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- I2C0_ADR0:
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fields: !!omap
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- GC:
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access: rw
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description: General Call enable bit
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lsb: 0
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reset_value: '0'
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width: 1
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- ADDRESS:
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access: rw
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description: The I2C device address for slave mode
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lsb: 1
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reset_value: '0'
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width: 7
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- I2C1_ADR0:
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fields: !!omap
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- GC:
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access: rw
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description: General Call enable bit
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lsb: 0
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reset_value: '0'
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width: 1
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- ADDRESS:
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access: rw
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description: The I2C device address for slave mode
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lsb: 1
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reset_value: '0'
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width: 7
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- I2C0_SCLH:
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fields: !!omap
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- SCLH:
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access: rw
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description: Count for SCL HIGH time period selection
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lsb: 0
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reset_value: '0x0004'
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width: 16
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- I2C1_SCLH:
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fields: !!omap
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- SCLH:
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access: rw
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description: Count for SCL HIGH time period selection
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lsb: 0
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reset_value: '0x0004'
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width: 16
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- I2C0_SCLL:
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fields: !!omap
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- SCLL:
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access: rw
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description: Count for SCL LOW time period selection
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lsb: 0
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reset_value: '0x0004'
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width: 16
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- I2C1_SCLL:
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fields: !!omap
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- SCLL:
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access: rw
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description: Count for SCL LOW time period selection
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lsb: 0
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reset_value: '0x0004'
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width: 16
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- I2C0_CONCLR:
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fields: !!omap
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- AAC:
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access: w
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description: Assert acknowledge Clear bit
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lsb: 2
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reset_value: '0'
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width: 1
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- SIC:
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access: w
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description: I2C interrupt Clear bit
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lsb: 3
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reset_value: '0'
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width: 1
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- STAC:
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access: w
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description: START flag Clear bit
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lsb: 5
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reset_value: '0'
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width: 1
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- I2ENC:
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access: w
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description: I2C interface Disable bit
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lsb: 6
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reset_value: '0'
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width: 1
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- I2C1_CONCLR:
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fields: !!omap
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- AAC:
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access: w
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description: Assert acknowledge Clear bit
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lsb: 2
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reset_value: '0'
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width: 1
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- SIC:
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access: w
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description: I2C interrupt Clear bit
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lsb: 3
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reset_value: '0'
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width: 1
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- STAC:
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access: w
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description: START flag Clear bit
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lsb: 5
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reset_value: '0'
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width: 1
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- I2ENC:
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access: w
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description: I2C interface Disable bit
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lsb: 6
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reset_value: '0'
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width: 1
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- I2C0_MMCTRL:
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fields: !!omap
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- MM_ENA:
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access: rw
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description: Monitor mode enable
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lsb: 0
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reset_value: '0'
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width: 1
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- ENA_SCL:
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access: rw
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description: SCL output enable
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lsb: 1
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reset_value: '0'
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width: 1
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- MATCH_ALL:
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access: rw
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description: Select interrupt register match
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lsb: 2
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reset_value: '0'
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width: 1
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- I2C1_MMCTRL:
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fields: !!omap
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- MM_ENA:
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access: rw
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description: Monitor mode enable
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lsb: 0
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reset_value: '0'
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width: 1
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- ENA_SCL:
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access: rw
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description: SCL output enable
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lsb: 1
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reset_value: '0'
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width: 1
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- MATCH_ALL:
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access: rw
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description: Select interrupt register match
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lsb: 2
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reset_value: '0'
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width: 1
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- I2C0_ADR1:
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fields: !!omap
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- GC:
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access: rw
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description: General Call enable bit
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lsb: 0
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reset_value: '0'
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width: 1
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- ADDRESS:
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access: rw
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description: The I2C device address for slave mode
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lsb: 1
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reset_value: '0'
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width: 7
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- I2C1_ADR1:
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fields: !!omap
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- GC:
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access: rw
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description: General Call enable bit
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lsb: 0
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reset_value: '0'
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width: 1
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- ADDRESS:
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access: rw
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description: The I2C device address for slave mode
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lsb: 1
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reset_value: '0'
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width: 7
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- I2C0_ADR2:
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fields: !!omap
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- GC:
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access: rw
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description: General Call enable bit
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lsb: 0
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reset_value: '0'
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width: 1
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- ADDRESS:
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access: rw
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description: The I2C device address for slave mode
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lsb: 1
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reset_value: '0'
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width: 7
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- I2C1_ADR2:
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fields: !!omap
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- GC:
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access: rw
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description: General Call enable bit
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lsb: 0
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reset_value: '0'
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width: 1
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- ADDRESS:
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access: rw
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description: The I2C device address for slave mode
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lsb: 1
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reset_value: '0'
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width: 7
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- I2C0_ADR3:
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fields: !!omap
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- GC:
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access: rw
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description: General Call enable bit
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lsb: 0
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reset_value: '0'
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width: 1
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- ADDRESS:
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access: rw
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description: The I2C device address for slave mode
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lsb: 1
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reset_value: '0'
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width: 7
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- I2C1_ADR3:
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fields: !!omap
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- GC:
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access: rw
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description: General Call enable bit
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lsb: 0
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reset_value: '0'
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width: 1
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- ADDRESS:
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access: rw
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description: The I2C device address for slave mode
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lsb: 1
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reset_value: '0'
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width: 7
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- I2C0_DATA_BUFFER:
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fields: !!omap
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- DATA:
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access: r
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description: This register holds contents of the 8 MSBs of the DAT shift register
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lsb: 0
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reset_value: '0'
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width: 8
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- I2C1_DATA_BUFFER:
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fields: !!omap
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- DATA:
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access: r
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description: This register holds contents of the 8 MSBs of the DAT shift register
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lsb: 0
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reset_value: '0'
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width: 8
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- I2C0_MASK0:
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fields: !!omap
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- MASK:
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access: rw
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description: Mask bits
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lsb: 1
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reset_value: '0'
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width: 7
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- I2C1_MASK0:
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fields: !!omap
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- MASK:
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access: rw
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description: Mask bits
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lsb: 1
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reset_value: '0'
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width: 7
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- I2C0_MASK1:
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fields: !!omap
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- MASK:
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access: rw
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description: Mask bits
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lsb: 1
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reset_value: '0'
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width: 7
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- I2C1_MASK1:
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fields: !!omap
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- MASK:
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access: rw
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description: Mask bits
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lsb: 1
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reset_value: '0'
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width: 7
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- I2C0_MASK2:
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fields: !!omap
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- MASK:
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access: rw
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description: Mask bits
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lsb: 1
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reset_value: '0'
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width: 7
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- I2C1_MASK2:
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fields: !!omap
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- MASK:
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access: rw
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description: Mask bits
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lsb: 1
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reset_value: '0'
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width: 7
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- I2C0_MASK3:
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fields: !!omap
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- MASK:
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access: rw
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description: Mask bits
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lsb: 1
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reset_value: '0'
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width: 7
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- I2C1_MASK3:
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fields: !!omap
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- MASK:
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access: rw
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description: Mask bits
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lsb: 1
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reset_value: '0'
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width: 7
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