Arti Zirk
244fdbc35c
subrepo: subdir: "libopencm3" merged: "f5813a54" upstream: origin: "https://github.com/libopencm3/libopencm3" branch: "master" commit: "f5813a54" git-subrepo: version: "0.4.3" origin: "???" commit: "???"
131 lines
4.2 KiB
C
131 lines
4.2 KiB
C
/** @defgroup systemcontrol_file System Control
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*
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* @ingroup MSP432E4xx
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*
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* @brief libopencm3 MSP432E4xx System Control
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*
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* @version 1.0.0
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*
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* @date 22 July 2018
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*
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* LGPL License Terms @ref lgpl_license
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*/
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/*
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* This file is part of the libopencm3 project.
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*
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* Copyright (C) 2012 Alexandru Gagniuc <mr.nuke.me@gmail.com>
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* Copyright (C) 2018 Dmitry Rezvanov <dmitry.rezvanov@yandex.ru>
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*
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* This library is free software: you can redistribute it and/or modify
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* it under the terms of the GNU Lesser General Public License as published by
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* the Free Software Foundation, either version 3 of the License, or
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* (at your option) any later version.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public License
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* along with this library. If not, see <http://www.gnu.org/licenses/>.
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*/
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#include <libopencm3/msp432/e4/systemcontrol.h>
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#include <stdbool.h>
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#define _SYSCTL_REG(base, i) MMIO32((base) + ((i) >> 5))
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#define _SYSCTL_BIT(i) (1 << ((i) & 0x1f))
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/*----------------------------------------------------------------------------*/
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/** @brief System Control Enable Peripheral Clock
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*
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* @param[in] clock_mode ::msp432_clock_mode Clock mode
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* @param[in] periph ::msp432_periph Peripheral block
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*/
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void sysctl_periph_clock_enable(enum msp432_clock_mode clock_mode,
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enum msp432_periph periph)
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{
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_SYSCTL_REG(SYSCTL_BASE + clock_mode, periph) |= _SYSCTL_BIT(periph);
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}
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/*----------------------------------------------------------------------------*/
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/** @brief System Control Disable Peripheral Clock
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*
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* @param[in] clock_mode ::msp432_clock_mode Clock mode
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* @param[in] periph ::msp432_periph Peripheral block
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*/
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void sysctl_periph_clock_disable(enum msp432_clock_mode clock_mode,
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enum msp432_periph periph)
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{
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_SYSCTL_REG(SYSCTL_BASE + clock_mode, periph) &= ~_SYSCTL_BIT(periph);
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}
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/*----------------------------------------------------------------------------*/
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/** @brief System Control Peripheral Software Reset
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*
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* @param[in] periph ::msp432_periph Peripheral block
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*/
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void sysctl_periph_reset(enum msp432_periph periph)
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{
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_SYSCTL_REG((uint32_t) &SYSCTL_SRWD, periph) |= _SYSCTL_BIT(periph);
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}
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/*----------------------------------------------------------------------------*/
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/** @brief System Control Peripheral Clear Software Reset
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*
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* @param[in] periph ::msp432_periph Peripheral block
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*/
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void sysctl_periph_clear_reset(enum msp432_periph periph)
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{
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_SYSCTL_REG((uint32_t) &SYSCTL_SRWD, periph) &= ~_SYSCTL_BIT(periph);
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}
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/*----------------------------------------------------------------------------*/
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/** @brief System Control Peripheral Is Present
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*
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* @param[in] periph ::msp432_periph Peripheral block
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*/
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bool sysctl_periph_is_present(enum msp432_periph periph)
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{
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uint32_t reg32 = _SYSCTL_REG((uint32_t) &SYSCTL_PPWD, periph);
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uint32_t mask = _SYSCTL_BIT(periph);
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return((reg32 & mask) != 0);
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}
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/*----------------------------------------------------------------------------*/
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/** @brief System Control Peripheral Is Ready
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*
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* @param[in] periph ::msp432_periph Peripheral block
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*/
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bool sysctl_periph_is_ready(enum msp432_periph periph)
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{
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uint32_t reg32 = _SYSCTL_REG((uint32_t) &SYSCTL_PRWD, periph);
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uint32_t mask = _SYSCTL_BIT(periph);
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return((reg32 & mask) != 0);
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}
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/*----------------------------------------------------------------------------*/
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/** @brief System Control Peripheral Set Power State
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*
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* @param[in] power_mode ::msp432_power_mode Power mode
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* @param[in] periph ::msp432_periph Peripheral block
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*
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* @note If the module is in run, sleep or deep-sleep mode - the module
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* is powered and receives a clock regardless of the value of power mode.
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*/
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void sysctl_periph_set_power_state(enum msp432_power_mode power_mode,
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enum msp432_periph periph)
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{
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if (power_mode == POWER_ENABLE) {
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_SYSCTL_REG((uint32_t) &SYSCTL_PCWD, periph) |= _SYSCTL_BIT(periph);
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} else {
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_SYSCTL_REG((uint32_t) &SYSCTL_PCWD, periph) &= ~_SYSCTL_BIT(periph);
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}
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}
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#undef _SYSCTL_REG
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#undef _SYSCTL_BIT
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