Arti Zirk
244fdbc35c
subrepo: subdir: "libopencm3" merged: "f5813a54" upstream: origin: "https://github.com/libopencm3/libopencm3" branch: "master" commit: "f5813a54" git-subrepo: version: "0.4.3" origin: "???" commit: "???"
304 lines
8.4 KiB
C
304 lines
8.4 KiB
C
/** @defgroup flash_file FLASH peripheral API
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*
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* @ingroup peripheral_apis
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*
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* @brief <b>libopencm3 STM32F1xx FLASH Memory</b>
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*
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* @version 1.0.0
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*
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* @author @htmlonly © @endhtmlonly 2010
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* Thomas Otto <tommi@viadmin.org>
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* @author @htmlonly © @endhtmlonly 2010
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* Mark Butler <mbutler@physics.otago.ac.nz>
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*
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* @date 14 January 2014
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*
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* For the STM32F1xx, accessing FLASH memory is described briefly in
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* section 3.3.3 of the STM32F10x Reference Manual.
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* For detailed programming information see:
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* PM0075 programming manual: STM32F10xxx Flash programming
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* August 2010, Doc ID 17863 Rev 1
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* https://github.com/libopencm3/libopencm3-archive/blob/master/st_micro/CD00283419.pdf
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*
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* FLASH memory may be used for data storage as well as code, and may be
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* programmatically modified. Note that for firmware upload the STM32F1xx
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* provides a built-in bootloader in system memory that can be entered from a
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* running program.
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*
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* FLASH must first be unlocked before programming. In this module a write to
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* FLASH is a blocking operation until the end-of-operation flag is asserted.
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*
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* @note: don't forget to lock it again when all operations are complete.
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*
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* For the large memory XL series, with two banks of FLASH, the upper bank is
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* accessed with a second set of registers. In principle both banks can be
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* written simultaneously, or one read while the other is written. This module
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* does not support the simultaneous write feature.
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*
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* LGPL License Terms @ref lgpl_license
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*/
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/*
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* This file is part of the libopencm3 project.
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*
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* Copyright (C) 2010 Thomas Otto <tommi@viadmin.org>
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* Copyright (C) 2010 Mark Butler <mbutler@physics.otago.ac.nz>
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*
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* This library is free software: you can redistribute it and/or modify
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* it under the terms of the GNU Lesser General Public License as published by
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* the Free Software Foundation, either version 3 of the License, or
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* (at your option) any later version.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public License
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* along with this library. If not, see <http://www.gnu.org/licenses/>.
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*/
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/**@{*/
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#include <libopencm3/stm32/desig.h>
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#include <libopencm3/stm32/flash.h>
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/*---------------------------------------------------------------------------*/
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/** @brief Enable the FLASH Half Cycle Mode
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This mode is used for power saving during read access. It is disabled by default
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on reset.
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Note carefully the clock restrictions under which the half cycle mode may be
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enabled or disabled. This mode may only be used while the clock is running at
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8MHz. See the reference manual for details.
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*/
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void flash_halfcycle_enable(void)
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{
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FLASH_ACR |= FLASH_ACR_HLFCYA;
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}
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/*---------------------------------------------------------------------------*/
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/** @brief Disable the FLASH Half Cycle Mode
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*/
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void flash_halfcycle_disable(void)
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{
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FLASH_ACR &= ~FLASH_ACR_HLFCYA;
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}
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/*---------------------------------------------------------------------------*/
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/** @brief Unlock the Flash Program and Erase Controller, upper Bank
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This enables write access to the upper bank of the Flash memory in XL devices.
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It is locked by default on reset.
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*/
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void flash_unlock_upper(void)
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{
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if (desig_get_flash_size() > 512) {
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/* Clear the unlock state. */
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FLASH_CR2 |= FLASH_CR_LOCK;
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/* Authorize the FPEC access. */
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FLASH_KEYR2 = FLASH_KEYR_KEY1;
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FLASH_KEYR2 = FLASH_KEYR_KEY2;
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}
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}
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/*---------------------------------------------------------------------------*/
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/** @brief Lock the Flash Program and Erase Controller, upper Bank
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Used to prevent spurious writes to FLASH.
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*/
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void flash_lock_upper(void)
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{
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FLASH_CR2 |= FLASH_CR_LOCK;
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}
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/*---------------------------------------------------------------------------*/
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/** @brief Clear the Programming Error Status Flag, upper Bank
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*/
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void flash_clear_pgerr_flag_upper(void)
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{
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if (desig_get_flash_size() > 512) {
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FLASH_SR2 |= FLASH_SR_PGERR;
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}
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}
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/*---------------------------------------------------------------------------*/
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/** @brief Clear the End of Operation Status Flag, upper Bank
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*/
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void flash_clear_eop_flag_upper(void)
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{
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if (desig_get_flash_size() > 512) {
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FLASH_SR2 |= FLASH_SR_EOP;
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}
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}
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/*---------------------------------------------------------------------------*/
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/** @brief Clear the Write Protect Error Status Flag, upper Bank
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*/
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void flash_clear_wrprterr_flag_upper(void)
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{
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if (desig_get_flash_size() > 512) {
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FLASH_SR2 |= FLASH_SR_WRPRTERR;
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}
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}
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/*---------------------------------------------------------------------------*/
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/** @brief Clear All Status Flags
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Program error, end of operation, write protect error, busy. Both banks cleared.
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*/
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void flash_clear_status_flags(void)
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{
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flash_clear_pgerr_flag();
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flash_clear_eop_flag();
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flash_clear_wrprterr_flag();
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if (desig_get_flash_size() > 512) {
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flash_clear_pgerr_flag_upper();
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flash_clear_eop_flag_upper();
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flash_clear_wrprterr_flag_upper();
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}
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}
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/*---------------------------------------------------------------------------*/
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/** @brief Read All Status Flags
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The programming error, end of operation, write protect error and busy flags
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are returned in the order of appearance in the status register.
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Flags for the upper bank, where appropriate, are combined with those for
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the lower bank using bitwise OR, without distinction.
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@returns uint32_t. bit 0: busy, bit 2: programming error, bit 4: write protect
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error, bit 5: end of operation.
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*/
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uint32_t flash_get_status_flags(void)
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{
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uint32_t flags = (FLASH_SR & (FLASH_SR_PGERR |
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FLASH_SR_EOP |
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FLASH_SR_WRPRTERR |
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FLASH_SR_BSY));
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if (desig_get_flash_size() > 512) {
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flags |= (FLASH_SR2 & (FLASH_SR_PGERR |
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FLASH_SR_EOP |
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FLASH_SR_WRPRTERR |
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FLASH_SR_BSY));
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}
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return flags;
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}
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/*---------------------------------------------------------------------------*/
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/** @brief Program a Half Word to FLASH
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This performs all operations necessary to program a 16 bit word to FLASH memory.
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The program error flag should be checked separately for the event that memory
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was not properly erased.
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Status bit polling is used to detect end of operation.
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@param[in] address Full address of flash half word to be programmed.
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@param[in] data half word to write
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*/
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void flash_program_half_word(uint32_t address, uint16_t data)
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{
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flash_wait_for_last_operation();
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if ((desig_get_flash_size() > 512) && (address >= FLASH_BASE+0x00080000)) {
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FLASH_CR2 |= FLASH_CR_PG;
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} else {
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FLASH_CR |= FLASH_CR_PG;
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}
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MMIO16(address) = data;
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flash_wait_for_last_operation();
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if ((desig_get_flash_size() > 512) && (address >= FLASH_BASE+0x00080000)) {
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FLASH_CR2 &= ~FLASH_CR_PG;
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} else {
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FLASH_CR &= ~FLASH_CR_PG;
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}
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}
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/*---------------------------------------------------------------------------*/
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/** @brief Erase a Page of FLASH
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This performs all operations necessary to erase a page in FLASH memory.
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The page should be checked to ensure that it was properly erased. A page must
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first be fully erased before attempting to program it.
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Note that the page sizes differ between devices. See the reference manual or
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the FLASH programming manual for details.
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@param[in] page_address Full address of flash page to be erased.
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*/
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void flash_erase_page(uint32_t page_address)
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{
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flash_wait_for_last_operation();
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if ((desig_get_flash_size() > 512)
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&& (page_address >= FLASH_BASE+0x00080000)) {
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FLASH_CR2 |= FLASH_CR_PER;
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FLASH_AR2 = page_address;
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FLASH_CR2 |= FLASH_CR_STRT;
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} else {
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FLASH_CR |= FLASH_CR_PER;
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FLASH_AR = page_address;
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FLASH_CR |= FLASH_CR_STRT;
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}
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flash_wait_for_last_operation();
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if ((desig_get_flash_size() > 512)
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&& (page_address >= FLASH_BASE+0x00080000)) {
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FLASH_CR2 &= ~FLASH_CR_PER;
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} else {
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FLASH_CR &= ~FLASH_CR_PER;
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}
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}
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/*---------------------------------------------------------------------------*/
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/** @brief Erase All FLASH
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This performs all operations necessary to erase all user pages in the FLASH
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memory. The information block is unaffected.
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*/
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void flash_erase_all_pages(void)
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{
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flash_wait_for_last_operation();
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FLASH_CR |= FLASH_CR_MER; /* Enable mass erase. */
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FLASH_CR |= FLASH_CR_STRT; /* Trigger the erase. */
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flash_wait_for_last_operation();
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FLASH_CR &= ~FLASH_CR_MER; /* Disable mass erase. */
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/* Repeat for bank 2 */
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FLASH_CR2 |= FLASH_CR_MER;
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FLASH_CR2 |= FLASH_CR_STRT;
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flash_wait_for_last_operation();
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FLASH_CR2 &= ~FLASH_CR_MER;
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}
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/**@}*/
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