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dis34: print long relative JR as jr and surface B-file SP as b15
The 16-bit-displacement jump (low byte 0x00, two words) is JRcc, not the three-word JAcc (low byte 0x80). Printing it as ja made linear disassembly report the wrong control flow and made every such branch grow by a word when reassembled. Register 15 is the stack pointer in either file: 0x0F is A15 and 0x1F is B15. The disassembler printed both as sp, hiding B-file stack-pointer code. Print b15 when the R bit selects the B file. Validated with the 1987 TI GSPA/GSPLNK/GSPROM round trip: the 32 KB region at bit 3F208000 still reassembles byte-for-byte (md5 43adb6669571041985f3e26fd9ff7cb9), as do the 4 KB and 16 KB spans and the 0x8000/3F240000 region. The converter no longer needs its ja->jr or sp->b15 rewrites (5 fixups -> 3); a whole-ROM diff contains only those two output categories. The ROM is unchanged (b46a3e442ccb86134d2356bd70d22fd2).
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@@ -0,0 +1,18 @@
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# The 1987 DOS toolchain is extracted here on first use, and round-trip
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# products are written here by roundtrip.sh. Neither is source.
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work/
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*.bin
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*.obj
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*.out
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*.map
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*.lst
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*.hex
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*.tag
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*.HI
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*.LO
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*.$$$
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*.asm
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*.dis
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*.c
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__pycache__/
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*.pyc
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@@ -0,0 +1,117 @@
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# Round-trip validation for the two `dis34` fixes
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This directory proves the two corrections in `tools/smart34010/dis34.c`
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against the 1987 TI TMS34010 toolchain (`GSPA`/`GSPLNK`/`GSPROM` under
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DOSBox), using the same method as `reference/tms34010-sdk.md`. The ROM is
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only read; its md5 must stay `b46a3e442ccb86134d2356bd70d22fd2`.
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## The encodings (from `docs/TMS34010-users-guide.txt`)
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**Long relative jump.** The Program Control summary (PDF p. A-16) gives:
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```
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JAcc Address Jump Absolute Conditional 3 3,4 1 100 code 1000 0000
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JRcc Address Jump Relative Conditional 2 3,2 1100 code 0000 0000
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JRcc Address Jump Relative Conditional - Short 2,1 1 100 code xxxx xxxx
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```
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The ±32K-word `JRcc` description (p. 12-96) says:
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> The assembler calculates the offset as (Address - PC')/16 and inserts the
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> resulting offset into the second instruction word of the opcode. The range
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> for this form of the JRcc instruction is -32,768 to +32,767 words.
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So low byte `0x00` + a 16-bit displacement is `JRcc`, not `JAcc`; only low
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byte `0x80` + a 32-bit address is `JAcc`.
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**B-file SP.** Section 5.1.3 (p. 5-8):
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> The TMS34010 contains only a single SP. However, this SP can be addressed as
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> a member of either register file, as register A15 or register B15.
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and the MMFM description (p. 12-109):
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> The R bit (bit 4) in the first word indicates which register file is
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> affected.
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`0x0F` is A15 (`sp`); `0x1F` is B15 (`b15`). GSPA accepts `b15` and rejects
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`a15`.
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## Fixups required by the converter, before and after
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`reference/tms34010-sdk.md` lists five fixups for `dis34` output. The old
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converter (`harness/sdk-scratch/dis2as34.py`) implemented all five:
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| # | fixup | before | after |
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|---|---|---|---|
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| 1 | hex constants (`0x220` → `0220h`) | needed | needed |
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| 2 | `MOVI`/`ADDI`/`CMPI`/`SUBI` short vs long (`,W` / `,L`) | needed | needed |
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| 3 | B-file SP (`rl …, sp` → `b15`) | needed | **gone** — `dis34` prints `b15` |
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| 4 | long relative `ja<cc>` → `jr<cc>` (2 words) | needed | **gone** — `dis34` prints `jr<cc>` |
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| 5 | branch target not an instruction boundary → `.word` | needed | needed |
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The shipped converter here (`dis2as34.py`) drops 3 and 4, so its fixup list is
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**5 → 3**. The `JR` one is the expected disappearance; the SP one disappears
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as a direct consequence of surfacing B15. (`harness/sdk-scratch/` is left
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untouched as the record of the pre-fix method.)
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## Results (new `dis34` + `dis2as34.py` with fixups 3 and 4 removed)
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| region (file offset) | base (bit) | size | differing | md5 |
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|---|---|---:|---:|---|
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| `0x1000` | `3F208000` | 4 KB | 0 | `a4018fed12e062658bc81957f149265b` |
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| `0x1000` | `3F208000` | 16 KB | 0 | `0a2e679bc864d52d32c59740142c5b96` |
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| `0x1000` | `3F208000` | 32 KB | 0 | `43adb6669571041985f3e26fd9ff7cb9` |
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| `0x8000` | `3F240000` | 4 KB | 0 | `438e743431d56e0c12ededce1c36952a` |
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The same 32 KB region disassembled by the **old** `dis34` and fed through the
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converter with the removed rewrites fails (`assembled 32912 bytes, original
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32768`, 27247 differing): the long relative branches grow by a word and the
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`rl … sp` destination is encoded as A15. With the fixed `dis34` the converter
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source is equivalent to the old one: only 3 lines change `sp` to `b15` and
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2 differ in whitespace (`rl 09h,b15` vs `rl 09h, b15`); assembly is
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byte-identical.
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## Proof that the fixes change nothing else
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`verify_dis.py` disassembles the whole ROM in 32 KB chunks with both a control
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binary and the fixed binary and classifies every changed line:
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```
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$ ./verify_dis.py work/dis34.orig work/dis34.sponly ../../vt1200_v22.bin
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long-relative JA->JR changes: 0
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B-file SP sp->b15 changes: 2623
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all differences are the two intended categories
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$ ./verify_dis.py work/dis34.orig ../../tools/smart34010/dis34 ../../vt1200_v22.bin
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long-relative JA->JR changes: 6235
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B-file SP sp->b15 changes: 2623
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all differences are the two intended categories
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```
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The SP-only comparison is the additivity check: **zero** mnemonic changes, and
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every change is exactly an `sp` operand becoming `b15` on an instruction whose
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encoding can name B15 (bit 4 set, or the cross-file `MOVE Rs,Rd` dest). The
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full-fix comparison adds only the `JA`→`JR` mnemonic changes on 2-word
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`0xC?00` instructions. Labels and line counts are unchanged (labels do not
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depend on either fix).
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## Reproducing
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```sh
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cd harness/sdk-roundtrip
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./prepare_work.sh # builds work/dis34.orig and dis34.sponly
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./roundtrip.sh 0x1000 32768 3F208000 # prints BYTE-EXACT + md5
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DIS34=$PWD/work/dis34.orig ./roundtrip.sh 0x1000 32768 3F208000 # expected FAIL
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./verify_dis.py work/dis34.orig work/dis34.sponly ../../vt1200_v22.bin
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./verify_dis.py work/dis34.orig ../../tools/smart34010/dis34 ../../vt1200_v22.bin
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```
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`work/` also holds the pre-fix source/binary (`dis34.orig*`) and an SP-only
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binary (`dis34.sponly*`) used for the isolation checks. The SDK image is
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extracted from `tools/tms34010-sdk/` into `work/` on first use.
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Cached disassemblies elsewhere (`reference/dis34-a-v22.txt.gz`,
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`harness/dis/*.txt`) were produced by the buggy binary and still show
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`ja<cc>` for the 2-word relative jumps; regenerate them with the fixed
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`dis34` before trusting their control flow.
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@@ -0,0 +1,113 @@
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#!/usr/bin/env python3
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"""Convert smart34010 (dis34 -o) output into TI gspa/as34 2.00 syntax.
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Usage: dis2as34.py BASE_HEX SIZE_BYTES INPUT.ASM > OUT.ASM
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The input must be produced with the fixed ``dis34 -o`` (opcode words in a
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trailing comment), which prints both relative-jump forms as ``jr<cc>`` and
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the B-file stack pointer as ``b15``. The 1987 assembler is *not*
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byte-faithful on its own:
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* ``MOVI`` is one mnemonic with a short (16-bit, sign-extended) and a long
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(32-bit) form. gspa auto-selects by "does the value fit in 16 bits", so a
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long MOVI of 0x53E0 (which the ROM encodes as a 3-word instruction) is
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silently shortened -- and sign extension then changes its meaning. The
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explicit ``W`` / ``L`` operand forces the form.
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* the same applies to ADDI/CMPI/SUBI.
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* register-indirect displacements are signed 16-bit fields. dis34 prints the
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raw two's-complement bits (0xFFE0); gspa rejects those as out of bounds, so
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they are rendered as signed decimal (-32).
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* constants: dis34 emits ``0xHHHH``; gspa wants ``0HHHHh`` (must start with a
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decimal digit, so 0xC00000B0 becomes 0C00000B0h).
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* a PC-relative branch whose target is not an instruction boundary in the
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region (outside it, or -- as happens in data tables -- inside a multi-word
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instruction) cannot be expressed as a label. gspa also mishandles a
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negative absolute ``.set`` target in a JR. The exact opcode words are
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therefore emitted as ``.word`` for those branches.
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"""
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import re
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import sys
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DISP = re.compile(r"(\*\s*[ab]\d+|\*\s*sp)\(\s*0x([0-9a-fA-F]+)\s*\)")
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HEX = re.compile(r"0x([0-9a-fA-F]+)")
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FORM_OPS = {"movi", "addi", "cmpi", "subi"}
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RELATIVE = re.compile(r"^(jreq|jrne|jrlt|jrle|jrgt|jrge|jrc|jrnc|jrlo|jrls|jrhi|jrhs|jrnz|jrz|"
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r"jruc|jrxn|jrxnn|jrxz|jrxeq|jrxgt|jrxle|jryn|jrynn|jryz|jryeq|jrygt|jryle|"
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r"call|callr)$")
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DSJ_OPS = {"dsj", "dsjs", "dsjeq", "dsjne"}
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def ti_hex(digits: str) -> str:
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return "0" + digits.upper() + "h"
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def fix_disp(m):
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base, digits = m.group(1), m.group(2)
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v = int(digits, 16)
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if v >= 0x8000:
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return f"{base}({v - 0x10000})"
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return f"{base}(0{digits.upper()}h)"
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def raw_words(words):
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return " .word " + ", ".join(ti_hex(w) for w in words)
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def convert(src: str, base: int, size: int) -> str:
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end = base + size * 8
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lines = src.splitlines()
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defined = set()
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for line in lines:
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code = line.partition(";")[0]
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dm = re.match(r"^(L[0-9A-Fa-f]{8}):", code)
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if dm:
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defined.add(dm.group(1).upper())
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out = []
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referenced = set()
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for line in lines:
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code, sep, comment = line.partition(";")
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for lm in re.findall(r"\b(L[0-9A-Fa-f]{8})\b", code):
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referenced.add(lm.upper())
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words = re.findall(r"\b[0-9a-fA-F]{4}\b", comment)
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stripped = code.rstrip()
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parts = stripped.split()
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op = parts[0].lower() if parts else ""
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# short/long immediate forms (see docstring)
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if op in FORM_OPS and words:
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if len(words) == 2:
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stripped += ", W"
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mm = re.match(r"^(\s*\w+\s+)0x([0-9a-fA-F]+)(,.*)$", stripped)
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if mm and int(mm.group(2), 16) >= 0x8000:
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stripped = (mm.group(1) + str(int(mm.group(2), 16) - 0x10000)
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+ mm.group(3))
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elif len(words) == 3:
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stripped += ", L"
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# relative branch to a label that is not an instruction boundary
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mm = re.match(r"^(\s*)(\w+)(\s+.*?)(L[0-9A-Fa-f]{8})\s*$", stripped)
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if mm and mm.group(4).upper() not in defined:
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op2 = mm.group(2).lower()
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if op2 in DSJ_OPS or RELATIVE.match(op2):
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stripped = raw_words(words)
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# relative branch to an absolute address outside the region
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mm = re.match(r"^(\s*)([a-z]+)(\s+)0x([0-9a-fA-F]+)\s*$", stripped)
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if mm and RELATIVE.match(mm.group(2).lower()):
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target = int(mm.group(4), 16)
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if not (base <= target < end):
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stripped = raw_words(words)
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stripped = DISP.sub(fix_disp, stripped)
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stripped = HEX.sub(lambda mm: ti_hex(mm.group(1)), stripped)
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out.append(stripped)
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missing = sorted(referenced - defined)
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if missing:
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out.append("")
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for name in missing:
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off = int(name[1:], 16) - base
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out.append(f"{name} .set " + ("0%Xh" % off if off >= 0 else str(off)))
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return "\n".join(out) + "\n"
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if __name__ == "__main__":
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base = int(sys.argv[1], 16)
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size = int(sys.argv[2])
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sys.stdout.write(convert(open(sys.argv[3]).read(), base, size))
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Executable
+23
@@ -0,0 +1,23 @@
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#!/bin/sh
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# Build the reference binaries used by verify_dis.py.
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#
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# work/dis34.orig - the pre-fix dis34 (from the checkpoint commit)
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# work/dis34.sponly - the same source with *only* the B-file SP fix applied
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#
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# Usage: prepare_work.sh [GIT_REV]
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set -eu
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ROOT=$(cd "$(dirname "$0")/../.." && pwd)
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DIR=$(cd "$(dirname "$0")" && pwd)
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WORK="$DIR/work"
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REV=${1:-acb92d3e44ec}
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mkdir -p "$WORK"
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git -C "$ROOT" show "$REV:tools/smart34010/dis34.c" > "$WORK/dis34.orig.c"
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cc -Wall -O2 -o "$WORK/dis34.orig" "$WORK/dis34.orig.c"
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sed 's/strcpy (p, "sp");/strcpy (p, file ? "b15" : "sp");/' \
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"$WORK/dis34.orig.c" > "$WORK/dis34.sponly.c"
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cc -Wall -O2 -o "$WORK/dis34.sponly" "$WORK/dis34.sponly.c"
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echo "built $WORK/dis34.orig and $WORK/dis34.sponly"
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Executable
+109
@@ -0,0 +1,109 @@
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#!/bin/sh
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# Assemble a region of the VT1200 ROM with the 1987 TI TMS34010 toolchain
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# (GSPA/GSPLNK/GSPROM, run under DOSBox) and compare the result byte-for-byte
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# with the original.
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#
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# Usage: roundtrip.sh OFFSET SIZE BASE_BIT
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# OFFSET byte offset into vt1200_v22.bin
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# SIZE region size in bytes
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# BASE_BIT bit address the region is linked at (e.g. 3F208000)
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#
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# Example: roundtrip.sh 0x1000 16384 3F208000
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#
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# The ROM is only read. All work happens in this directory.
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#
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# Set DIS34=/path/to/dis34 to test a different build (used for the pre-fix
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# control run: it should FAIL, because the converter no longer rewrites
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# long-relative JA back to JR).
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set -eu
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ROOT=$(cd "$(dirname "$0")/../.." && pwd)
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DIR=$(cd "$(dirname "$0")" && pwd)
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WORK="$DIR/work"
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ROM="$ROOT/vt1200_v22.bin"
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DIS="${DIS34:-$ROOT/tools/smart34010/dis34}"
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DOSBOX_CONF="$ROOT/harness/sdk-scratch/dosbox.conf"
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OFF=${1:?offset}
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SIZE=${2:?size}
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BASE=${3:?base bit address}
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OFF=$((OFF))
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SIZE=$((SIZE))
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mkdir -p "$WORK"
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# tools: extract once from the 1987-11-06 floppy image
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if [ ! -x "$WORK/GSPA.EXE" ]; then
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IMG="$ROOT/tools/tms34010-sdk/1987-05 TMS34010 SDK/1987-11-06 TMS34010 Simulator-C Tools-ASM Tools.img"
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mcopy -s -n -i "$IMG" "::/A2/*" "$WORK/"
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mcopy -s -n -i "$IMG" "::/C2/*" "$WORK/"
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fi
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# TI hex constants must begin with a decimal digit
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TBASE=$BASE
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case "$TBASE" in
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[0-9]*) ;;
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*) TBASE="0$TBASE" ;;
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esac
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dd if="$ROM" of="$WORK/rt.bin" bs=1 skip="$OFF" count="$SIZE" 2>/dev/null
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"$DIS" -b "$BASE" -o "$WORK/rt.bin" > "$WORK/rt.dis"
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python3 "$DIR/dis2as34.py" "$BASE" "$SIZE" "$WORK/rt.dis" > "$WORK/RT.ASM"
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sed -i '1i .text' "$WORK/RT.ASM"
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echo '.end' >> "$WORK/RT.ASM"
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cat > "$WORK/RT.CMD" <<EOF
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-a
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-o rt.out
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-m rt.map
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rt.obj
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SECTIONS
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{
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.text ${TBASE}h: {}
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}
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EOF
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sed -i 's/$/\r/' "$WORK/RT.CMD"
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rm -f "$WORK"/RT.OBJ "$WORK"/RT.OUT "$WORK"/RT.LST "$WORK"/RTHI.HI "$WORK"/RTLO.LO
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SDL_VIDEODRIVER=dummy SDL_AUDIODRIVER=dummy \
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timeout 180 dosbox -conf "$DOSBOX_CONF" -noprimaryconf -nolocalconf \
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-c "mount c $WORK" -c "c:" \
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-c "gspa rt rt.obj rt.lst -l" \
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-c "gsplnk rt.cmd" \
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-c "gsprom -i rt.out rthi rtlo" \
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-c "exit" -exit >/dev/null 2>&1
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python3 - "$WORK" "$SIZE" <<'EOF'
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import sys
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work, size = sys.argv[1], int(sys.argv[2])
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def readhex(p):
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d = {}
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for line in open(p):
|
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line = line.strip()
|
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if not line.startswith(':'):
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continue
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b = bytes.fromhex(line[1:])
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if b[3] != 0:
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continue
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a = (b[1] << 8) | b[2]
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for i, x in enumerate(b[4:4 + b[0]]):
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d[a + i] = x
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return d
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hi = readhex(work + "/RTHI.HI")
|
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lo = readhex(work + "/RTLO.LO")
|
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out = bytearray()
|
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for a in sorted(hi):
|
||||
out.append(lo[a])
|
||||
out.append(hi[a])
|
||||
orig = open(work + "/rt.bin", "rb").read()
|
||||
n = min(len(orig), len(out))
|
||||
bad = [i for i in range(n) if orig[i] != out[i]]
|
||||
print("assembled %d bytes, original %d bytes, %d differing" % (len(out), len(orig), len(bad)))
|
||||
if len(out) != len(orig) or bad:
|
||||
print("FAIL")
|
||||
for i in bad[:5]:
|
||||
print(" %#x: orig %s out %s" % (i, orig[i:i+8].hex(), out[i:i+8].hex()))
|
||||
sys.exit(1)
|
||||
print("md5 " + __import__('hashlib').md5(out).hexdigest() + " BYTE-EXACT")
|
||||
EOF
|
||||
Executable
+107
@@ -0,0 +1,107 @@
|
||||
#!/usr/bin/env python3
|
||||
"""Compare two dis34 builds over the whole ROM and classify every difference.
|
||||
|
||||
Purpose: prove the two `dis34` fixes are the *only* changes to its output.
|
||||
|
||||
* long-relative JR fix: the line must change from ``ja<cc>`` to ``jr<cc>``
|
||||
and carry exactly two opcode words, the first being ``0xC?00``;
|
||||
* B-file SP fix: the mnemonic must be unchanged, every ``sp`` operand must
|
||||
become ``b15``, and the encoding must be able to name B15: bit 4 set, or
|
||||
the cross-file MOVE Rs,Rd whose destination is the other file.
|
||||
|
||||
Usage: verify_dis.py OLD_DIS34 NEW_DIS34 [ROM]
|
||||
|
||||
Chunks are disassembled with 16 zero bytes of padding so a multi-word
|
||||
instruction at the end of a chunk cannot abort the run. The padding is
|
||||
identical for both builds and its decoded lines are still compared.
|
||||
"""
|
||||
import os
|
||||
import re
|
||||
import subprocess
|
||||
import sys
|
||||
|
||||
HEXWORD = re.compile(r"\b[0-9a-fA-F]{4}\b")
|
||||
|
||||
|
||||
def disassemble(exe, chunk, base, work):
|
||||
part = os.path.join(work, "verify_chunk.bin")
|
||||
with open(part, "wb") as f:
|
||||
f.write(chunk + b"\0" * 16)
|
||||
p = subprocess.run([exe, "-b", "%X" % base, "-o", part],
|
||||
stdout=subprocess.PIPE, stderr=subprocess.PIPE,
|
||||
check=True)
|
||||
return p.stdout.decode("latin-1").splitlines()
|
||||
|
||||
|
||||
def words(line):
|
||||
code, _, comment = line.partition(";")
|
||||
return HEXWORD.findall(comment)
|
||||
|
||||
|
||||
def can_name_b15(w0):
|
||||
"""True if the instruction's register field can select B-file reg 15.
|
||||
|
||||
Bit 4 (the R bit) normally selects the file. MOVE Rs,Rd cross-file
|
||||
(op 0x4E00) is the exception: its *destination* is the other file
|
||||
(dis34 prints ``regname(rd, rf ^ 1)``), so bit 4 = 0 still means B15
|
||||
for the destination.
|
||||
"""
|
||||
op = int(w0, 16)
|
||||
return bool(op & 0x10) or (op & 0xfe00) == 0x4e00
|
||||
|
||||
|
||||
def main():
|
||||
old_exe, new_exe = sys.argv[1], sys.argv[2]
|
||||
rom_path = sys.argv[3] if len(sys.argv) > 3 else "vt1200_v22.bin"
|
||||
work = os.path.dirname(os.path.abspath(__file__)) + "/work"
|
||||
os.makedirs(work, exist_ok=True)
|
||||
rom = open(rom_path, "rb").read()
|
||||
|
||||
chunk_size = 32768
|
||||
base0 = 0x3F200000
|
||||
n_jr = n_sp = 0
|
||||
errors = []
|
||||
for start in range(0, len(rom), chunk_size):
|
||||
chunk = rom[start:start + chunk_size]
|
||||
base = base0 + start * 8
|
||||
old = disassemble(old_exe, chunk, base, work)
|
||||
new = disassemble(new_exe, chunk, base, work)
|
||||
if len(old) != len(new):
|
||||
errors.append("chunk %#x: line count %d != %d" %
|
||||
(start, len(old), len(new)))
|
||||
continue
|
||||
for i, (a, b) in enumerate(zip(old, new)):
|
||||
if a == b:
|
||||
continue
|
||||
w = words(a)
|
||||
code_a = a.partition(";")[0].strip()
|
||||
code_b = b.partition(";")[0].strip()
|
||||
tok_a = code_a.split()[0].lower() if code_a.split() else ""
|
||||
tok_b = code_b.split()[0].lower() if code_b.split() else ""
|
||||
ja = re.fullmatch(r"ja([a-z]+)", tok_a)
|
||||
if (ja and tok_b == "jr" + ja.group(1) and len(w) == 2
|
||||
and re.fullmatch(r"c[0-9a-f]00", w[0].lower())):
|
||||
n_jr += 1
|
||||
continue
|
||||
# SP fix: same mnemonic, only sp -> b15, R bit set
|
||||
if (tok_a == tok_b and "sp" in code_a and "b15" in code_b
|
||||
and code_a.replace("sp", "b15") == code_b
|
||||
and w and can_name_b15(w[0])):
|
||||
n_sp += 1
|
||||
continue
|
||||
errors.append("chunk %#x line %d:\n - %s\n + %s" %
|
||||
(start, i + 1, a, b))
|
||||
|
||||
print("long-relative JA->JR changes: %d" % n_jr)
|
||||
print("B-file SP sp->b15 changes: %d" % n_sp)
|
||||
if errors:
|
||||
print("UNEXPECTED changes: %d" % len(errors))
|
||||
for e in errors[:10]:
|
||||
print(e)
|
||||
return 1
|
||||
print("all differences are the two intended categories")
|
||||
return 0
|
||||
|
||||
|
||||
if __name__ == "__main__":
|
||||
sys.exit(main())
|
||||
@@ -42,7 +42,10 @@ Examples:
|
||||
|
||||
- **A-file**: a0-a14, accessed when register bit 4 = 0
|
||||
- **B-file**: b0-b14, accessed when register bit 4 = 1
|
||||
- **sp**: register 15 in either file (stack pointer)
|
||||
- **sp**: register 15 in either file (stack pointer), encoded as `0x0F`
|
||||
(A15, printed `sp`) or `0x1F` (B15, printed `b15`). Both are the same
|
||||
physical stack pointer, but the encoding names a different file; a
|
||||
disassembler must not collapse them.
|
||||
- Register encoding: 5-bit field, bit 4 = file select, bits 3:0 = register number
|
||||
|
||||
### Instruction Word Format
|
||||
@@ -299,9 +302,13 @@ Condition code in bits 11:8 of the instruction word:
|
||||
| 15 | nn | Not negative |
|
||||
|
||||
Jump forms:
|
||||
- **JR cc** (relative): `0xC000 | (cc<<8) | 0x00` + 16-bit displacement
|
||||
- **JR cc** (short): `0xC000 | (cc<<8) | disp8` (8-bit signed displacement)
|
||||
- **JA cc** (absolute): `0xC000 | (cc<<8) | 0x80` + 32-bit address
|
||||
- **JR cc** (relative, 2 words): `0xC000 | (cc<<8) | 0x00` + 16-bit displacement
|
||||
- **JR cc** (short, 2 words): `0xC000 | (cc<<8) | disp8` (8-bit signed displacement)
|
||||
- **JA cc** (absolute, 3 words): `0xC000 | (cc<<8) | 0x80` + 32-bit address
|
||||
|
||||
Only low byte `0x80` is the absolute form. Low byte `0x00` carries a 16-bit
|
||||
*displacement* and is still `JRcc`; the word count must not be used to invent
|
||||
an absolute mnemonic for it.
|
||||
|
||||
Displacement formula:
|
||||
- 16-bit: `target = pc + 32 + (disp << 4)`
|
||||
@@ -337,10 +344,11 @@ Using the wrong decode gives K±1 errors. In `dis34.c`:
|
||||
|
||||
### Round-Trip Design Decisions
|
||||
|
||||
1. **`jacc` for 16-bit displacement JR** -- dis34 outputs `jacc` (not `jrcc`)
|
||||
for the 16-bit displacement form of conditional jumps. This ensures as34
|
||||
emits the same 4-byte encoding. The 8-bit short form uses `jrcc`. The
|
||||
32-bit absolute form uses `jacc`.
|
||||
1. **`jrcc` for both relative forms** -- the 8-bit and 16-bit displacement
|
||||
forms are both `JRcc` (2 words); only the 3-word `0x80` form is `JAcc`.
|
||||
(Until 2026-10-18 the 16-bit form was printed as `jacc`, which made a
|
||||
linear disassembly's control flow wrong and forced the round-trip
|
||||
converter to rewrite it back to `jrcc`.)
|
||||
|
||||
2. **Branch-only labels** -- Only branch/call targets (jr, ja, callr, calla,
|
||||
dsj, dsjeq, dsjne, dsjs) get labels. MOVI and other data-reference
|
||||
|
||||
Binary file not shown.
@@ -70,7 +70,12 @@ regname (int reg, int file)
|
||||
char *p = s[idx++ & 7];
|
||||
if (reg == 15)
|
||||
{
|
||||
strcpy (p, "sp");
|
||||
/* Register 15 is the stack pointer in *either* file: the R bit
|
||||
(bit 4 of the register field) selects A15 or B15. Printing both
|
||||
as "sp" hides which file the instruction actually names. GSPA
|
||||
spells the B-file one "b15"; it rejects "a15", and bare "sp" is
|
||||
the A-file register. */
|
||||
strcpy (p, file ? "b15" : "sp");
|
||||
return p;
|
||||
}
|
||||
snprintf (p, 8, "%c%d", file ? 'b' : 'a', reg);
|
||||
@@ -2163,9 +2168,11 @@ main (int argc, char **argv)
|
||||
}
|
||||
else if (lo8 == 0x00)
|
||||
{
|
||||
/* 16-bit displacement form: still JRcc (2 words), not
|
||||
the 3-word absolute JAcc (lo8 == 0x80). */
|
||||
int16_t disp = (int16_t) r16 ();
|
||||
uint32_t target = pc + 32 + ((int32_t) disp << 4);
|
||||
printf ("ja%s %s", condnames[cc], fmt_target (target));
|
||||
printf ("jr%s %s", condnames[cc], fmt_target (target));
|
||||
}
|
||||
else
|
||||
{
|
||||
|
||||
Reference in new issue
Block a user