diff --git a/harness/mame/BRINGUP_LOG.md b/harness/mame/BRINGUP_LOG.md index dc22ed0..cedf170 100644 --- a/harness/mame/BRINGUP_LOG.md +++ b/harness/mame/BRINGUP_LOG.md @@ -823,10 +823,45 @@ generator, not merely on memory existing. **Next:** find the verification — where the test compares what it drew against what it reads back. That comparison is what fails and reports error 22 at bit `0x040000C0`. +## The video RAM test characterised — and it still fails (2026-10-16, latest) + +A transparent, word-oriented logging proxy over the start of video memory +(`VT1200_VRAMLOG=`) reveals exactly what the test does: + +``` +W 0000 0001 pc=3F201BB0 <- walking-1 pattern: 0x0001 0x0002 0x0004 0x0008 0x0010 ... +R 0000 0001 pc=3F201C20 <- read back, same values +``` + +So the level-1 video RAM test is a **classic data-bus walking-bit test**: 8,208 pattern +writes, 8,208 read-backs, across 4,096 offsets — write the pattern, read it back, compare. + +That also explains the other traffic: `pc=3F204A20` writes 16,384 zeros (the POST clear of +video memory) and `pc=3FDF97A0` writes 8,192 — the character-drawing path. + +**But the test still fails.** With video memory mapped as `.ram()`, and again with the +word-oriented transparent proxy serving it — both of which round-trip the pattern correctly — +the firmware still reports `LEVEL1/2 ERROR -> VIDEO MEMORY - 22` with `a11=0x0040000C`. + +So the memory now **round-trips correctly and the test still fails**, which rules out the +simplest explanations (absent memory, wrong address, wrong size, bit-vs-word storage). The +remaining candidates: + +* the test walks banks up to `a11=0x0200000C` (bit `0x200000C0`), which is **outside** the + mapped range `0x04000000`-`0x1fffffff` — the last bank would be unmapped; +* the reported `0x0040000C` may be a bank base in a unit I have not pinned, rather than the + offset that failed; +* the test may require the *drawn* content (the character path) to verify, not only raw + pattern round-tripping. + +**Honest status: level 1 is NOT passing.** Video memory is located, correctly mapped and now +proven to round-trip a walking-bit pattern; the test's remaining requirement is not yet met. + --- ## Next steps -1. Find the VERIFY step of the video RAM test (what it compares after drawing). -2. That comparison is what fails; it likely needs the character generator / font data. -3. Re-run the console check (cap.lua) after each change. +1. Map video memory across the FULL extent the bank walk reaches (bit 0x200000C0 and + beyond) -- the last bank is currently unmapped. +2. Pin the unit of the reported address (0x0040000C): bank base vs failing offset. +3. Re-run the console check (cap.lua) after each change; it reports the failing address. diff --git a/harness/mame/vram.log b/harness/mame/vram.log new file mode 100644 index 0000000..1cb7c33 --- /dev/null +++ b/harness/mame/vram.log @@ -0,0 +1,41009 @@ +# kind off value pc -- video-memory accesses +W 0000 0000 pc=3F204A20 +W 0001 0000 pc=3F204A20 +W 0002 0000 pc=3F204A20 +W 0003 0000 pc=3F204A20 +W 0004 0000 pc=3F204A20 +W 0005 0000 pc=3F204A20 +W 0006 0000 pc=3F204A20 +W 0007 0000 pc=3F204A20 +W 0008 0000 pc=3F204A20 +W 0009 0000 pc=3F204A20 +W 000A 0000 pc=3F204A20 +W 000B 0000 pc=3F204A20 +W 000C 0000 pc=3F204A20 +W 000D 0000 pc=3F204A20 +W 000E 0000 pc=3F204A20 +W 000F 0000 pc=3F204A20 +W 0010 0000 pc=3F204A20 +W 0011 0000 pc=3F204A20 +W 0012 0000 pc=3F204A20 +W 0013 0000 pc=3F204A20 +W 0014 0000 pc=3F204A20 +W 0015 0000 pc=3F204A20 +W 0016 0000 pc=3F204A20 +W 0017 0000 pc=3F204A20 +W 0018 0000 pc=3F204A20 +W 0019 0000 pc=3F204A20 +W 001A 0000 pc=3F204A20 +W 001B 0000 pc=3F204A20 +W 001C 0000 pc=3F204A20 +W 001D 0000 pc=3F204A20 +W 001E 0000 pc=3F204A20 +W 001F 0000 pc=3F204A20 +W 0020 0000 pc=3F204A20 +W 0021 0000 pc=3F204A20 +W 0022 0000 pc=3F204A20 +W 0023 0000 pc=3F204A20 +W 0024 0000 pc=3F204A20 +W 0025 0000 pc=3F204A20 +W 0026 0000 pc=3F204A20 +W 0027 0000 pc=3F204A20 +W 0028 0000 pc=3F204A20 +W 0029 0000 pc=3F204A20 +W 002A 0000 pc=3F204A20 +W 002B 0000 pc=3F204A20 +W 002C 0000 pc=3F204A20 +W 002D 0000 pc=3F204A20 +W 002E 0000 pc=3F204A20 +W 002F 0000 pc=3F204A20 +W 0030 0000 pc=3F204A20 +W 0031 0000 pc=3F204A20 +W 0032 0000 pc=3F204A20 +W 0033 0000 pc=3F204A20 +W 0034 0000 pc=3F204A20 +W 0035 0000 pc=3F204A20 +W 0036 0000 pc=3F204A20 +W 0037 0000 pc=3F204A20 +W 0038 0000 pc=3F204A20 +W 0039 0000 pc=3F204A20 +W 003A 0000 pc=3F204A20 +W 003B 0000 pc=3F204A20 +W 003C 0000 pc=3F204A20 +W 003D 0000 pc=3F204A20 +W 003E 0000 pc=3F204A20 +W 003F 0000 pc=3F204A20 +W 0040 0000 pc=3F204A20 +W 0041 0000 pc=3F204A20 +W 0042 0000 pc=3F204A20 +W 0043 0000 pc=3F204A20 +W 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0522 5555 pc=3F201DA0 +R 0523 5555 pc=3F201DA0 +W 0522 AAAA pc=3F201DE0 +W 0523 AAAA pc=3F201DE0 +R 0522 AAAA pc=3F201DF0 +R 0523 AAAA pc=3F201DF0 +R 0520 5555 pc=3F201DA0 +R 0521 5555 pc=3F201DA0 +W 0520 AAAA pc=3F201DE0 +W 0521 AAAA pc=3F201DE0 +R 0520 AAAA pc=3F201DF0 +R 0521 AAAA pc=3F201DF0 +R 051E 5555 pc=3F201DA0 +R 051F 5555 pc=3F201DA0 +W 051E AAAA pc=3F201DE0 +W 051F AAAA pc=3F201DE0 +R 051E AAAA pc=3F201DF0 +R 051F AAAA pc=3F201DF0 +R 051C 5555 pc=3F201DA0 +R 051D 5555 pc=3F201DA0 +W 051C AAAA pc=3F201DE0 +W 051D AAAA pc=3F201DE0 +R 051C AAAA pc=3F201DF0 +R 051D AAAA pc=3F201DF0 +R 051A 5555 pc=3F201DA0 +R 051B 5555 pc=3F201DA0 +W 051A AAAA pc=3F201DE0 +W 051B AAAA pc=3F201DE0 +R 051A AAAA pc=3F201DF0 +R 051B AAAA pc=3F201DF0 +R 0518 5555 pc=3F201DA0 +R 0519 5555 pc=3F201DA0 +W 0518 AAAA pc=3F201DE0 +W 0519 AAAA pc=3F201DE0 +R 0518 AAAA pc=3F201DF0 +R 0519 AAAA pc=3F201DF0 +R 0516 5555 pc=3F201DA0 +R 0517 5555 pc=3F201DA0 +W 0516 AAAA pc=3F201DE0 +W 0517 AAAA pc=3F201DE0 +R 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pc=3FDF97A0 +W 0F8C 0000 pc=3FDF97A0 +W 0F8D 0000 pc=3FDF97A0 +W 0F8E 0000 pc=3FDF97A0 +W 0F8F 0000 pc=3FDF97A0 +W 0F90 0000 pc=3FDF97A0 +W 0F91 0000 pc=3FDF97A0 +W 0F92 0000 pc=3FDF97A0 +W 0F93 0000 pc=3FDF97A0 +W 0F94 0000 pc=3FDF97A0 +W 0F95 0000 pc=3FDF97A0 +W 0F96 0000 pc=3FDF97A0 +W 0F97 0000 pc=3FDF97A0 +W 0F98 0000 pc=3FDF97A0 +W 0F99 0000 pc=3FDF97A0 +W 0F9A 0000 pc=3FDF97A0 +W 0F9B 0000 pc=3FDF97A0 +W 0F9C 0000 pc=3FDF97A0 +W 0F9D 0000 pc=3FDF97A0 +W 0F9E 0000 pc=3FDF97A0 +W 0F9F 0000 pc=3FDF97A0 +W 0FA0 0000 pc=3FDF97A0 +W 0FA1 0000 pc=3FDF97A0 +W 0FA2 0000 pc=3FDF97A0 +W 0FA3 0000 pc=3FDF97A0 +W 0FA4 0000 pc=3FDF97A0 +W 0FA5 0000 pc=3FDF97A0 +W 0FA6 0000 pc=3FDF97A0 +W 0FA7 0000 pc=3FDF97A0 +W 0FA8 0000 pc=3FDF97A0 +W 0FA9 0000 pc=3FDF97A0 +W 0FAA 0000 pc=3FDF97A0 +W 0FAB 0000 pc=3FDF97A0 +W 0FAC 0000 pc=3FDF97A0 +W 0FAD 0000 pc=3FDF97A0 +W 0FAE 0000 pc=3FDF97A0 +W 0FAF 0000 pc=3FDF97A0 +W 0FB0 0000 pc=3FDF97A0 +W 0FB1 0000 pc=3FDF97A0 +W 0FB2 0000 pc=3FDF97A0 +W 0FB3 0000 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pc=3FDF97A0 +W 0FDC 0000 pc=3FDF97A0 +W 0FDD 0000 pc=3FDF97A0 +W 0FDE 0000 pc=3FDF97A0 +W 0FDF 0000 pc=3FDF97A0 +W 0FE0 0000 pc=3FDF97A0 +W 0FE1 0000 pc=3FDF97A0 +W 0FE2 0000 pc=3FDF97A0 +W 0FE3 0000 pc=3FDF97A0 +W 0FE4 0000 pc=3FDF97A0 +W 0FE5 0000 pc=3FDF97A0 +W 0FE6 0000 pc=3FDF97A0 +W 0FE7 0000 pc=3FDF97A0 +W 0FE8 0000 pc=3FDF97A0 +W 0FE9 0000 pc=3FDF97A0 +W 0FEA 0000 pc=3FDF97A0 +W 0FEB 0000 pc=3FDF97A0 +W 0FEC 0000 pc=3FDF97A0 +W 0FED 0000 pc=3FDF97A0 +W 0FEE 0000 pc=3FDF97A0 +W 0FEF 0000 pc=3FDF97A0 +W 0FF0 0000 pc=3FDF97A0 +W 0FF1 0000 pc=3FDF97A0 +W 0FF2 0000 pc=3FDF97A0 +W 0FF3 0000 pc=3FDF97A0 +W 0FF4 0000 pc=3FDF97A0 +W 0FF5 0000 pc=3FDF97A0 +W 0FF6 0000 pc=3FDF97A0 +W 0FF7 0000 pc=3FDF97A0 +W 0FF8 0000 pc=3FDF97A0 +W 0FF9 0000 pc=3FDF97A0 +W 0FFA 0000 pc=3FDF97A0 +W 0FFB 0000 pc=3FDF97A0 +W 0FFC 0000 pc=3FDF97A0 +W 0FFD 0000 pc=3FDF97A0 +W 0FFE 0000 pc=3FDF97A0 +W 0FFF 0000 pc=3FDF97A0 diff --git a/harness/mame/vt1200.cpp b/harness/mame/vt1200.cpp index beaed32..471bb08 100644 --- a/harness/mame/vt1200.cpp +++ b/harness/mame/vt1200.cpp @@ -189,6 +189,14 @@ private: // last-wins it fires and CTRL does not. u8 calw8_r(offs_t off); void calw8_w(offs_t off, u8 data); + // VT1200_VRAMLOG= + // Transparent logging proxy over the start of video memory, to compare what + // the level-1 video RAM test writes against what it reads back. + FILE *m_vramlog = nullptr; + std::vector m_vramlog_ram; + u16 vramlog_r(offs_t off); + void vramlog_w(offs_t off, u16 data); + // VT1200_LOG_UNMAPPED= // A catch-all mapping over the whole address space, registered FIRST so every // real region added afterwards takes precedence. Anything the firmware @@ -297,6 +305,14 @@ void vt1200_state::machine_start() fprintf(m_cal_log, "# tag kind addr pc -- address-unit / precedence calibration\n"); } + if (const char *p = getenv("VT1200_VRAMLOG")) + { + m_vramlog = fopen(p, "w"); + m_vramlog_ram.assign(0x10000, 0); + if (m_vramlog) + fprintf(m_vramlog, "# kind off value pc -- video-memory accesses\n"); + } + logerror("vt1200: board model=%s busy_ticks=%s busy_w2=%s busy_w3=%s dma_ticks=%s switch=%s log=%s render=%d dump=%ld\n", getenv("VT1200_BOARD_MODEL") ? getenv("VT1200_BOARD_MODEL") : "off", getenv("VT1200_BOARD_BUSY_TICKS") ? getenv("VT1200_BOARD_BUSY_TICKS") : "0", @@ -351,6 +367,30 @@ void vt1200_state::calram200_w(offs_t off, u16 data) { log_probe("RAM-0x02000000 u8 vt1200_state::calw8_r(offs_t off) { log_probe("W8-MISMATCH", 'R', (u32)off, 0x00000000); return 0; } void vt1200_state::calw8_w(offs_t off, u8 data) { log_probe("W8-MISMATCH", 'W', (u32)off, 0x00000000); } +u16 vt1200_state::vramlog_r(offs_t off) +{ + const u32 o = (u32)off & 0xffff; + const u16 v = (o < m_vramlog_ram.size()) ? m_vramlog_ram[o] : 0; + if (m_vramlog) + { + fprintf(m_vramlog, "R %04X %04X pc=%08X\n", o, v, (unsigned)m_maincpu->state_int(TMS34010_PC)); + fflush(m_vramlog); + } + return v; +} + +void vt1200_state::vramlog_w(offs_t off, u16 data) +{ + const u32 o = (u32)off & 0xffff; + if (o < m_vramlog_ram.size()) + m_vramlog_ram[o] = data; + if (m_vramlog) + { + fprintf(m_vramlog, "W %04X %04X pc=%08X\n", o, data, (unsigned)m_maincpu->state_int(TMS34010_PC)); + fflush(m_vramlog); + } +} + void vt1200_state::machine_reset() { if (m_log) @@ -419,6 +459,13 @@ void vt1200_state::program_map(address_map &map) if (getenv("VT1200_VRAM")) map(0x04000000, 0x1fffffff).ram().share("vram"); + // Transparent logging proxy over the first 64 KiB of video memory, registered + // last so it wins over the .ram() above. off = (bitaddr - base) >> 4, so this + // covers bit 0x04000000..0x040FFFFF, which includes the address the level-1 + // test reports failing at (bit 0x040000C0). + if (getenv("VT1200_VRAMLOG")) + map(0x04000000, 0x0400ffff).rw(FUNC(vt1200_state::vramlog_r), FUNC(vt1200_state::vramlog_w)); + // Main RAM: 4 MiB (1 MiB onboard + 3 x 1 MiB SIMMs on the real machine). // The TMS34010 is bit-addressed, so 4 MiB of bytes == 0x2000000 address