GSP COFF Assembler, Version 2.00, 87.300 Sun Oct 18 15:19:03 2026 (c) Copyright 1985, 1987, Texas Instruments Inc. PAGE 1 0001 ; loader.asm -- COFF loader for the VT1200 / TMS34010. 0002 ; 0003 ; Input: a TI GSP COFF image (GSPLNK `-a` output) alrea 0004 ; 16-byte descriptor (offsets in BITS, since all pointe 0005 ; addresses; the byte offsets are 0, 2, 4, 8 and 12): 0006 ; 0007 ; DESC + 0x00 bits u16 0x4C44 "LD" ) magic; both 0008 ; DESC + 0x10 bits u16 0x5231 "R1" ) 0009 ; DESC + 0x20 bits u32 buf bit address of 0010 ; DESC + 0x40 bits u32 len length in byte 0011 ; DESC + 0x60 bits u32 mode 1 = return to 0012 ; 0 = debug resu 0013 ; 0014 ; The descriptor pointer is A8. If A8 is zero, or does 0015 ; descriptor, the fixed descriptor at 0x01882C00 is use 0016 ; receives a COFF over the network only has to write {b 0017 ; call the loader entry; it does not choose a load addr 0018 ; the addresses from the COFF section headers. 0019 ; 0020 ; Result block at 0x01882D00 (32-bit cells, bit address 0021 ; 0022 ; +0x000 status 0 ok, nonzero = error (see the l 0023 ; +0x020 entry bit address passed to create_pro 0024 ; +0x040 text addr .text paddr from the COFF (bits) 0025 ; +0x060 text size .text size (bits) 0026 ; +0x080 data addr .data paddr 0027 ; +0x0A0 data size .data size (bits) 0028 ; +0x0C0 bss addr .bss paddr 0029 ; +0x0E0 bss size .bss size (bits) 0030 ; +0x100 relocs relocation entries seen in the o 0031 ; +0x120 pcb create_process() return value (0 0032 ; +0x140 nscns section count from the file head 0033 ; +0x160 coflen length from the descriptor (byte 0034 ; +0x180 version loader base address, 0x01880000 0035 ; 0036 ; The image is POSITION-DEPENDENT: GSPLNK resolves ever 0037 ; nreloc = 0, so each section is copied to the bit addr 0038 ; no relocation is applied. A COFF that still carries 0039 ; refused (status 7) rather than guessed at. 0040 ; 0041 ; Safety checks before any copy: 0042 ; * size is a whole number of 16-bit words; 0043 ; * the section bytes lie inside the descriptor's (bu 0044 ; * paddr..paddr+size is inside main RAM (bits 0x100. 0045 ; * it does not overlap the loader page [01880000,018 0046 ; buffer; 0047 ; * it lies inside one block of the firmware's global 0048 ; (head at bit 0x1E8AC0, block header {u32 size_bit 0049 ; user data at block+0x40). This is a check, not a 0050 ; loader cannot make malloc hand out a chosen addre 0051 ; 0052 ; Delivered debugger-assisted for now: poke the raw .bi 0053 ; the COFF at buf, write the descriptor, then set PC = 0054 ; fine). mode = 0 resumes at LD_ORIG_PC (the harness s 0055 ; PC); mode = 1 returns to the caller and passes the st 0056 ; GSP COFF Assembler, Version 2.00, 87.300 Sun Oct 18 15:19:03 2026 (c) Copyright 1985, 1987, Texas Instruments Inc. PAGE 2 0057 ; Linked at bit 0x01880000; position-dependent itself. 0058 0059 .def _start 0060 0061 01880000 LOADER_BASE equ 01880000h 0062 01882800 LD_SCRATCH equ 01882800h 0063 01882C00 DESC_ADDR equ 01882C00h 0064 01882D00 RESULT_BASE equ 01882D00h 0065 01882B00 ARG_AREA equ 01882B00h 0066 01883100 RETURN_STUB equ 01883100h 0067 0068 01882800 LD_SP_AFTER equ LD_SCRATCH+000h 0069 01882820 LD_A14 equ LD_SCRATCH+020h 0070 01882840 LD_ENTRY equ LD_SCRATCH+040h 0071 01882860 LD_BUF equ LD_SCRATCH+060h 0072 01882880 LD_LEN equ LD_SCRATCH+080h 0073 018828A0 LD_MODE equ LD_SCRATCH+0A0h 0074 018828C0 LD_NSCNS equ LD_SCRATCH+0C0h 0075 018828E0 LD_RELOCS equ LD_SCRATCH+0E0h 0076 01882900 LD_SEC_PADDR equ LD_SCRATCH+100h 0077 01882920 LD_SEC_SIZE equ LD_SCRATCH+120h 0078 01882940 LD_SEC_SCNPTR equ LD_SCRATCH+140h 0079 01882960 LD_TEXT_ADDR equ LD_SCRATCH+160h 0080 01882980 LD_TEXT_SIZE equ LD_SCRATCH+180h 0081 018829A0 LD_DATA_ADDR equ LD_SCRATCH+1A0h 0082 018829C0 LD_DATA_SIZE equ LD_SCRATCH+1C0h 0083 018829E0 LD_BSS_ADDR equ LD_SCRATCH+1E0h 0084 01882A00 LD_BSS_SIZE equ LD_SCRATCH+200h 0085 01882A20 LD_ORIG_PC equ LD_SCRATCH+220h 0086 0087 01882D00 RESULT_STATUS equ RESULT_BASE+000h 0088 01882D20 RESULT_ENTRY equ RESULT_BASE+020h 0089 01882D40 RESULT_TEXT_A equ RESULT_BASE+040h 0090 01882D60 RESULT_TEXT_S equ RESULT_BASE+060h 0091 01882D80 RESULT_DATA_A equ RESULT_BASE+080h 0092 01882DA0 RESULT_DATA_S equ RESULT_BASE+0A0h 0093 01882DC0 RESULT_BSS_A equ RESULT_BASE+0C0h 0094 01882DE0 RESULT_BSS_S equ RESULT_BASE+0E0h 0095 01882E00 RESULT_RELOCS equ RESULT_BASE+100h 0096 01882E20 RESULT_PCB equ RESULT_BASE+120h 0097 01882E40 RESULT_NSCNS equ RESULT_BASE+140h 0098 01882E60 RESULT_LEN equ RESULT_BASE+160h 0099 01882E80 RESULT_VERSION equ RESULT_BASE+180h 0100 0101 00000000 .text 0102 00000000 _start: 0103 00000000 098F mmtm sp, a0,a1,a2,a3,a4,a5,a6,a7,a8,a9,a10,a11,a12,a13 00000010 FFFC 0104 00000020 078F move sp, @LD_SP_AFTER, 1 00000030 01882800 0105 00000050 078E move a14, @LD_A14, 1 00000060 01882820 0106 00000080 0550 setf 16, 0, 0 0107 00000090 0740 setf 32, 0, 1 0108 0109 ; ---- descriptor ------------------------------------ GSP COFF Assembler, Version 2.00, 87.300 Sun Oct 18 15:19:03 2026 (c) Copyright 1985, 1987, Texas Instruments Inc. PAGE 3 0110 ; A8 points at it only if both magic words match; else 0111 000000A0 4D06 move a8, a6 0112 000000B0 4D08 move a8, a8 0113 000000C0 CA09 jreq ld_fixed_desc 0114 000000D0 84C0 move *a6, a0, 0 0115 000000E0 0B40 cmpi 4C44h, a0 000000F0 B3BB 0116 00000100 CB05 jrne ld_fixed_desc 0117 00000110 B4C0 move *a6(10h), a0, 0 00000120 0010 0118 00000130 0B40 cmpi 5231h, a0 00000140 ADCE 0119 00000150 CA0E jreq ld_have_desc 0120 00000160 ld_fixed_desc: 0121 00000160 09E6 movi DESC_ADDR, a6, L 00000170 01882C00 0122 00000190 84C0 move *a6, a0, 0 0123 000001A0 0B40 cmpi 4C44h, a0 000001B0 B3BB 0124 000001C0 CB00 jrne ld_bad_desc 000001D0 01D5 0125 000001E0 B4C0 move *a6(10h), a0, 0 000001F0 0010 0126 00000200 0B40 cmpi 5231h, a0 00000210 ADCE 0127 00000220 CB00 jrne ld_bad_desc 00000230 01CF 0128 00000240 ld_have_desc: 0129 00000240 B6C7 move *a6(20h), a7, 1 ; buf 00000250 0020 0130 00000260 B6C8 move *a6(40h), a8, 1 ; len 00000270 0040 0131 00000280 B6CC move *a6(60h), a12, 1 ; mode 00000290 0060 0132 000002A0 0787 move a7, @LD_BUF, 1 000002B0 01882860 0133 000002D0 0788 move a8, @LD_LEN, 1 000002E0 01882880 0134 00000300 078C move a12, @LD_MODE, 1 00000310 018828A0 0135 00000330 078C move a12, @RESULT_VERSION, 1 ; harmless; overwritten b 00000340 01882E80 0136 00000360 09E0 movi LOADER_BASE, a0, L 00000370 01880000 0137 00000390 0780 move a0, @RESULT_VERSION, 1 000003A0 01882E80 0138 0139 ; clear the counters we report; status stays FF until 0140 000003C0 09E0 movi 0FFFFFFFFh, a0, L 000003D0 FFFFFFFF 0141 000003F0 0780 move a0, @RESULT_STATUS, 1 00000400 01882D00 0142 00000420 4400 sub a0, a0 0143 00000430 0780 move a0, @LD_RELOCS, 1 00000440 018828E0 0144 00000460 0780 move a0, @LD_TEXT_ADDR, 1 GSP COFF Assembler, Version 2.00, 87.300 Sun Oct 18 15:19:03 2026 (c) Copyright 1985, 1987, Texas Instruments Inc. PAGE 4 00000470 01882960 0145 00000490 0780 move a0, @LD_TEXT_SIZE, 1 000004A0 01882980 0146 000004C0 0780 move a0, @LD_DATA_ADDR, 1 000004D0 018829A0 0147 000004F0 0780 move a0, @LD_DATA_SIZE, 1 00000500 018829C0 0148 00000520 0780 move a0, @LD_BSS_ADDR, 1 00000530 018829E0 0149 00000550 0780 move a0, @LD_BSS_SIZE, 1 00000560 01882A00 0150 00000580 0780 move a0, @RESULT_ENTRY, 1 00000590 01882D20 0151 000005B0 0780 move a0, @RESULT_TEXT_A, 1 000005C0 01882D40 0152 000005E0 0780 move a0, @RESULT_TEXT_S, 1 000005F0 01882D60 0153 00000610 0780 move a0, @RESULT_DATA_A, 1 00000620 01882D80 0154 00000640 0780 move a0, @RESULT_DATA_S, 1 00000650 01882DA0 0155 00000670 0780 move a0, @RESULT_BSS_A, 1 00000680 01882DC0 0156 000006A0 0780 move a0, @RESULT_BSS_S, 1 000006B0 01882DE0 0157 000006D0 0780 move a0, @RESULT_RELOCS, 1 000006E0 01882E00 0158 00000700 0780 move a0, @RESULT_PCB, 1 00000710 01882E20 0159 0160 ; ---- file header ----------------------------------- 0161 00000730 09E0 movi 20, a0, L 00000740 00000014 0162 00000760 4808 cmp a0, a8 0163 00000770 C800 jrlo ld_err_short 00000780 017E 0164 00000790 84E0 move *a7, a0, 0 ; magic 0165 000007A0 0B40 cmpi 0090h, a0 000007B0 FF6F 0166 000007C0 CB00 jrne ld_err_magic 000007D0 017D 0167 000007E0 B4E9 move *a7(10h), a9, 0 ; nscns (+2 bytes) 000007F0 0010 0168 00000800 0789 move a9, @LD_NSCNS, 1 00000810 018828C0 0169 00000830 B4E0 move *a7(10h), a0, 0 00000840 0010 0170 00000850 0789 move a9, @RESULT_NSCNS, 1 00000860 01882E40 0171 00000880 0788 move a8, @RESULT_LEN, 1 00000890 01882E60 0172 0173 ; section headers = buf + (20 + opthdr + nscns*40) byt 0174 000008B0 B4E1 move *a7(80h), a1, 0 ; opthdr (+16 bytes) 000008C0 0080 0175 000008D0 4D22 move a9, a2 GSP COFF Assembler, Version 2.00, 87.300 Sun Oct 18 15:19:03 2026 (c) Copyright 1985, 1987, Texas Instruments Inc. PAGE 5 0176 000008E0 24A2 sll 5, a2 ; nscns*32 0177 000008F0 4D23 move a9, a3 0178 00000900 2463 sll 3, a3 ; nscns*8 0179 00000910 4062 add a3, a2 ; nscns*40 0180 00000920 4022 add a1, a2 0181 00000930 0B02 addi 20, a2 ; byte offset of section headers end 00000940 0014 0182 00000950 4848 cmp a2, a8 ; a8 - a2 0183 00000960 C800 jrlo ld_err_short 00000970 015F 0184 0185 ; secbase = buf + (20 + opthdr)*8 bits 0186 00000980 2461 sll 3, a1 ; opthdr in bits 0187 00000990 0B01 addi 160, a1 ; 20 bytes in bits 000009A0 00A0 0188 000009B0 40E1 add a7, a1 0189 000009C0 4C2A move a1, a10 0190 0191 ; ---- entry point ----------------------------------- 0192 ; optional header at buf+20 bytes (0x0A0 bits): magic 0193 ; +16 bytes (0x080 bits further); textstart at +20 byt 0194 000009D0 B4E0 move *a7(0A0h), a0, 0 000009E0 00A0 0195 000009F0 0B40 cmpi 0108h, a0 00000A00 FEF7 0196 00000A10 CB07 jrne ld_no_opt 0197 00000A20 B6E5 move *a7(120h), a5, 1 ; entry (bits) 00000A30 0120 0198 00000A40 4CA5 move a5, a5 0199 00000A50 CB04 jrne ld_entry_set 0200 00000A60 B6E5 move *a7(140h), a5, 1 ; textstart (bits) 00000A70 0140 0201 00000A80 C001 jruc ld_entry_set 0202 00000A90 ld_no_opt: 0203 00000A90 44A5 sub a5, a5 0204 0205 00000AA0 ld_entry_set: 0206 00000AA0 0785 move a5, @LD_ENTRY, 1 00000AB0 01882840 0207 00000AD0 0785 move a5, @RESULT_ENTRY, 1 00000AE0 01882D20 0208 0209 ; ---- section loop ---------------------------------- 0210 00000B00 456B sub a11, a11 ; section index 0211 00000B10 ld_sec_loop: 0212 00000B10 492B cmp a9, a11 ; a11 - a9 0213 00000B20 C900 jrhs ld_sec_done 00000B30 00DC 0214 00000B40 B740 move *a10(40h), a0, 1 ; paddr (bits) +8 bytes 00000B50 0040 0215 00000B60 B741 move *a10(80h), a1, 1 ; size (bits) +16 00000B70 0080 0216 00000B80 B742 move *a10(0A0h), a2, 1 ; scnptr (bytes) +20 00000B90 00A0 0217 00000BA0 B543 move *a10(100h), a3, 0 ; nreloc +32 00000BB0 0100 GSP COFF Assembler, Version 2.00, 87.300 Sun Oct 18 15:19:03 2026 (c) Copyright 1985, 1987, Texas Instruments Inc. PAGE 6 0218 00000BC0 B744 move *a10(120h), a4, 1 ; flags +36 00000BD0 0120 0219 00000BE0 0780 move a0, @LD_SEC_PADDR, 1 00000BF0 01882900 0220 00000C10 0781 move a1, @LD_SEC_SIZE, 1 00000C20 01882920 0221 00000C40 0782 move a2, @LD_SEC_SCNPTR, 1 00000C50 01882940 0222 0223 ; record the first text/data/bss section for the resul 0224 00000C70 4C85 move a4, a5 0225 00000C80 0B85 andi 20h, a5 00000C90 FFFFFFDF 0226 00000CB0 4CA5 move a5, a5 0227 00000CC0 CA0B jreq ld_not_text 0228 00000CD0 07A5 move @LD_TEXT_ADDR, a5, 1 00000CE0 01882960 0229 00000D00 4CA5 move a5, a5 0230 00000D10 CB06 jrne ld_not_text 0231 00000D20 0780 move a0, @LD_TEXT_ADDR, 1 00000D30 01882960 0232 00000D50 0781 move a1, @LD_TEXT_SIZE, 1 00000D60 01882980 0233 00000D80 ld_not_text: 0234 00000D80 4C85 move a4, a5 0235 00000D90 0B85 andi 40h, a5 00000DA0 FFFFFFBF 0236 00000DC0 4CA5 move a5, a5 0237 00000DD0 CA0B jreq ld_not_data 0238 00000DE0 07A5 move @LD_DATA_ADDR, a5, 1 00000DF0 018829A0 0239 00000E10 4CA5 move a5, a5 0240 00000E20 CB06 jrne ld_not_data 0241 00000E30 0780 move a0, @LD_DATA_ADDR, 1 00000E40 018829A0 0242 00000E60 0781 move a1, @LD_DATA_SIZE, 1 00000E70 018829C0 0243 00000E90 ld_not_data: 0244 00000E90 4C85 move a4, a5 0245 00000EA0 0B85 andi 80h, a5 00000EB0 FFFFFF7F 0246 00000ED0 4CA5 move a5, a5 0247 00000EE0 CA0B jreq ld_not_bss 0248 00000EF0 07A5 move @LD_BSS_ADDR, a5, 1 00000F00 018829E0 0249 00000F20 4CA5 move a5, a5 0250 00000F30 CB06 jrne ld_not_bss 0251 00000F40 0780 move a0, @LD_BSS_ADDR, 1 00000F50 018829E0 0252 00000F70 0781 move a1, @LD_BSS_SIZE, 1 00000F80 01882A00 0253 00000FA0 ld_not_bss: 0254 0255 ; relocation records: count, then refuse (the linked i 0256 00000FA0 4C63 move a3, a3 0257 00000FB0 CA09 jreq ld_no_reloc GSP COFF Assembler, Version 2.00, 87.300 Sun Oct 18 15:19:03 2026 (c) Copyright 1985, 1987, Texas Instruments Inc. PAGE 7 0258 00000FC0 07A5 move @LD_RELOCS, a5, 1 00000FD0 018828E0 0259 00000FF0 4065 add a3, a5 0260 00001000 0785 move a5, @LD_RELOCS, 1 00001010 018828E0 0261 00001030 C000 jruc ld_err_reloc 00001040 0106 0262 00001050 ld_no_reloc: 0263 0264 ; size 0: nothing to place; size must be whole 16-bit 0265 00001050 4C21 move a1, a1 0266 00001060 CA00 jreq ld_sec_next 00001070 0082 0267 00001080 4C25 move a1, a5 0268 00001090 0B85 andi 0Fh, a5 000010A0 FFFFFFF0 0269 000010C0 4CA5 move a5, a5 0270 000010D0 CB00 jrne ld_err_size 000010E0 00F0 0271 0272 ; source range: scnptr + size/8 <= len (when there are 0273 000010F0 4C42 move a2, a2 0274 00001100 CA06 jreq ld_no_src 0275 00001110 4C25 move a1, a5 0276 00001120 2FA5 srl 3, a5 ; size in bytes 0277 00001130 40A2 add a5, a2 ; scnptr + nbytes 0278 00001140 4902 cmp a8, a2 ; a8 - a2 0279 00001150 C300 jrhi ld_err_short 00001160 00E0 0280 00001170 ld_no_src: 0281 0282 ; target range: 0x100 <= paddr and paddr+size <= 0x200 0283 00001170 07A0 move @LD_SEC_PADDR, a0, 1 00001180 01882900 0284 000011A0 0B40 cmpi 100h, a0 000011B0 FEFF 0285 000011C0 C800 jrlo ld_err_bounds 000011D0 00E5 0286 000011E0 07A1 move @LD_SEC_SIZE, a1, 1 000011F0 01882920 0287 00001210 4C03 move a0, a3 0288 00001220 4023 add a1, a3 ; target end 0289 00001230 09E5 movi 2000000h, a5, L 00001240 02000000 0290 00001260 48A3 cmp a5, a3 0291 00001270 C300 jrhi ld_err_bounds 00001280 00DA 0292 0293 ; overlap with the loader page [01880000,01883200) 0294 00001290 09E5 movi 01883200h, a5, L 000012A0 01883200 0295 000012C0 48A0 cmp a5, a0 0296 000012D0 C907 jrhs ld_ov1_done 0297 000012E0 09E5 movi 01880000h, a5, L 000012F0 01880000 0298 00001310 4865 cmp a3, a5 GSP COFF Assembler, Version 2.00, 87.300 Sun Oct 18 15:19:03 2026 (c) Copyright 1985, 1987, Texas Instruments Inc. PAGE 8 0299 00001320 C902 jrhs ld_ov1_done 0300 00001330 C000 jruc ld_err_overlap 00001340 00D2 0301 00001350 ld_ov1_done: 0302 0303 ; overlap with the COFF buffer [buf, buf+len*8) 0304 00001350 4D05 move a8, a5 0305 00001360 2465 sll 3, a5 0306 00001370 40E5 add a7, a5 ; buffer end in bits 0307 00001380 48A0 cmp a5, a0 0308 00001390 C904 jrhs ld_ov2_done 0309 000013A0 4867 cmp a3, a7 0310 000013B0 C902 jrhs ld_ov2_done 0311 000013C0 C000 jruc ld_err_overlap 000013D0 00C9 0312 000013E0 ld_ov2_done: 0313 0314 ; ---- global free-list check ------------------------ 0315 ; a block is {u32 size_bits; ...; u32 next@+0x20}; dat 0316 000013E0 0780 move a0, @LD_SEC_PADDR, 1 ; (unchanged, kept for clari 000013F0 01882900 0317 00001410 0783 move a3, @LD_SEC_SIZE, 1 ; temporarily hold target end 00001420 01882920 0318 00001440 07A6 move @1E8AC0h, a6, 1 ; global free-list head (block a 00001450 001E8AC0 0319 00001470 09E5 movi 64, a5, L 00001480 00000040 0320 000014A0 ld_free_walk: 0321 000014A0 4CC6 move a6, a6 0322 000014B0 CA00 jreq ld_err_notfree 000014C0 00C2 0323 000014D0 86C1 move *a6, a1, 1 ; block size in bits 0324 000014E0 B6C2 move *a6(20h), a2, 1 ; next block 000014F0 0020 0325 00001500 4CC0 move a6, a0 0326 00001510 0B00 addi 40h, a0 ; user start 00001520 0040 0327 00001530 07A3 move @LD_SEC_PADDR, a3, 1 00001540 01882900 0328 00001560 4803 cmp a0, a3 0329 00001570 C808 jrlo ld_free_next 0330 00001580 4CC4 move a6, a4 0331 00001590 4024 add a1, a4 ; block end 0332 000015A0 07A1 move @LD_SEC_SIZE, a1, 1 ; target end (stashed above) 000015B0 01882920 0333 000015D0 4881 cmp a4, a1 0334 000015E0 C301 jrhi ld_free_next 0335 000015F0 C004 jruc ld_free_ok 0336 00001600 ld_free_next: 0337 00001600 4C46 move a2, a6 0338 00001610 3F05 dsjs a5, ld_free_walk 0339 00001620 C000 jruc ld_err_notfree 00001630 00AB 0340 00001640 ld_free_ok: 0341 0342 ; restore size in LD_SEC_SIZE (the stash overwrote it) GSP COFF Assembler, Version 2.00, 87.300 Sun Oct 18 15:19:03 2026 (c) Copyright 1985, 1987, Texas Instruments Inc. PAGE 9 0343 ; target end - paddr = size 0344 00001640 07A1 move @LD_SEC_SIZE, a1, 1 00001650 01882920 0345 00001670 07A0 move @LD_SEC_PADDR, a0, 1 00001680 01882900 0346 000016A0 4401 sub a0, a1 ; a1 = size again 0347 000016B0 0781 move a1, @LD_SEC_SIZE, 1 000016C0 01882920 0348 0349 ; ---- place the section ----------------------------- 0350 000016E0 07A0 move @LD_SEC_SCNPTR, a0, 1 000016F0 01882940 0351 00001710 4C00 move a0, a0 0352 00001720 CA0D jreq ld_zero_sec 0353 00001730 2460 sll 3, a0 ; file offset -> bit offset 0354 00001740 40E0 add a7, a0 ; source address 0355 00001750 07A2 move @LD_SEC_PADDR, a2, 1 00001760 01882900 0356 00001780 07A1 move @LD_SEC_SIZE, a1, 1 00001790 01882920 0357 000017B0 2F81 srl 4, a1 ; number of 16-bit words 0358 000017C0 ld_copy_words: 0359 000017C0 9404 move *a0+, a4, 0 0360 000017D0 9082 move a4, *a2+, 0 0361 000017E0 3C61 dsjs a1, ld_copy_words 0362 000017F0 C00A jruc ld_sec_next 0363 0364 00001800 ld_zero_sec: 0365 00001800 07A2 move @LD_SEC_PADDR, a2, 1 00001810 01882900 0366 00001830 07A1 move @LD_SEC_SIZE, a1, 1 00001840 01882920 0367 00001860 2F81 srl 4, a1 0368 00001870 4484 sub a4, a4 0369 00001880 ld_zero_words: 0370 00001880 9082 move a4, *a2+, 0 0371 00001890 3C41 dsjs a1, ld_zero_words 0372 0373 000018A0 ld_sec_next: 0374 000018A0 0B0A addi 140h, a10 ; 40-byte section header = 320 bits 000018B0 0140 0375 000018C0 0B0B addi 1, a11 000018D0 0001 0376 000018E0 C000 jruc ld_sec_loop 000018F0 FF21 0377 0378 00001900 ld_sec_done: 0379 00001900 07A0 move @LD_TEXT_ADDR, a0, 1 00001910 01882960 0380 00001930 0780 move a0, @RESULT_TEXT_A, 1 00001940 01882D40 0381 00001960 07A1 move @LD_TEXT_SIZE, a1, 1 00001970 01882980 0382 00001990 0781 move a1, @RESULT_TEXT_S, 1 000019A0 01882D60 0383 000019C0 07A0 move @LD_DATA_ADDR, a0, 1 GSP COFF Assembler, Version 2.00, 87.300 Sun Oct 18 15:19:03 2026 (c) Copyright 1985, 1987, Texas Instruments Inc. PAGE 10 000019D0 018829A0 0384 000019F0 0780 move a0, @RESULT_DATA_A, 1 00001A00 01882D80 0385 00001A20 07A1 move @LD_DATA_SIZE, a1, 1 00001A30 018829C0 0386 00001A50 0781 move a1, @RESULT_DATA_S, 1 00001A60 01882DA0 0387 00001A80 07A0 move @LD_BSS_ADDR, a0, 1 00001A90 018829E0 0388 00001AB0 0780 move a0, @RESULT_BSS_A, 1 00001AC0 01882DC0 0389 00001AE0 07A1 move @LD_BSS_SIZE, a1, 1 00001AF0 01882A00 0390 00001B10 0781 move a1, @RESULT_BSS_S, 1 00001B20 01882DE0 0391 00001B40 07A0 move @LD_RELOCS, a0, 1 00001B50 018828E0 0392 00001B70 0780 move a0, @RESULT_RELOCS, 1 00001B80 01882E00 0393 0394 ; ---- create_process(entry, name, stack, 1, arg) ---- 0395 00001BA0 07A0 move @LD_ENTRY, a0, 1 00001BB0 01882840 0396 00001BD0 4C00 move a0, a0 0397 00001BE0 CB01 jrne ld_have_entry 0398 00001BF0 C053 jruc ld_err_noentry 0399 00001C00 ld_have_entry: 0400 00001C00 07AE move @LD_A14, a14, 1 00001C10 01882820 0401 00001C30 07AF move @LD_SP_AFTER, sp, 1 00001C40 01882800 0402 00001C60 A3CF move a14, -*sp, 1 ; the slot the firmware callee rest 0403 00001C70 09EE movi ARG_AREA, a14, L 00001C80 01882B00 0404 00001CA0 09E0 movi 0, a0, L 00001CB0 00000000 0405 00001CD0 920E move a0, *a14+, 1 ; arg4 = 0 0406 00001CE0 09E0 movi 1, a0, L 00001CF0 00000001 0407 00001D10 920E move a0, *a14+, 1 ; arg3 = 1 0408 00001D20 09E0 movi 6000h, a0, L 00001D30 00006000 0409 00001D50 920E move a0, *a14+, 1 ; arg2 = stack bytes 0410 00001D60 09E0 movi ld_appname, a0, L 00001D70 000025E0' 0411 00001D90 920E move a0, *a14+, 1 ; arg1 = name string 0412 00001DA0 07A0 move @LD_ENTRY, a0, 1 00001DB0 01882840 0413 00001DD0 920E move a0, *a14+, 1 ; arg0 = entry (bit address) 0414 00001DE0 0D5F calla 3F706A40h ; create_process 00001DF0 3F706A40 0415 00001E10 07AF move @LD_SP_AFTER, sp, 1 00001E20 01882800 0416 00001E40 07AE move @LD_A14, a14, 1 00001E50 01882820 0417 00001E70 0550 setf 16, 0, 0 GSP COFF Assembler, Version 2.00, 87.300 Sun Oct 18 15:19:03 2026 (c) Copyright 1985, 1987, Texas Instruments Inc. PAGE 11 0418 00001E80 0740 setf 32, 0, 1 0419 00001E90 0788 move a8, @RESULT_PCB, 1 00001EA0 01882E20 0420 00001EC0 4D08 move a8, a8 0421 00001ED0 CA29 jreq ld_err_create 0422 0423 00001EE0 4400 sub a0, a0 0424 00001EF0 0780 move a0, @RESULT_STATUS, 1 00001F00 01882D00 0425 00001F20 C036 jruc ld_finish 0426 0427 ; ---- errors ---------------------------------------- 0428 00001F30 ld_bad_desc: 0429 00001F30 09E0 movi 1, a0, L 00001F40 00000001 0430 00001F60 C023 jruc ld_error 0431 00001F70 ld_err_short: 0432 00001F70 09E0 movi 2, a0, L 00001F80 00000002 0433 00001FA0 C01F jruc ld_error 0434 00001FB0 ld_err_magic: 0435 00001FB0 09E0 movi 3, a0, L 00001FC0 00000003 0436 00001FE0 C01B jruc ld_error 0437 00001FF0 ld_err_size: 0438 00001FF0 09E0 movi 4, a0, L 00002000 00000004 0439 00002020 C017 jruc ld_error 0440 00002030 ld_err_bounds: 0441 00002030 09E0 movi 5, a0, L 00002040 00000005 0442 00002060 C013 jruc ld_error 0443 00002070 ld_err_overlap: 0444 00002070 09E0 movi 6, a0, L 00002080 00000006 0445 000020A0 C00F jruc ld_error 0446 000020B0 ld_err_reloc: 0447 000020B0 09E0 movi 7, a0, L 000020C0 00000007 0448 000020E0 C00B jruc ld_error 0449 000020F0 ld_err_notfree: 0450 000020F0 09E0 movi 8, a0, L 00002100 00000008 0451 00002120 C007 jruc ld_error 0452 00002130 ld_err_noentry: 0453 00002130 09E0 movi 9, a0, L 00002140 00000009 0454 00002160 C003 jruc ld_error 0455 00002170 ld_err_create: 0456 00002170 09E0 movi 10, a0, L 00002180 0000000A 0457 000021A0 ld_error: 0458 000021A0 0780 move a0, @RESULT_STATUS, 1 000021B0 01882D00 0459 000021D0 07A0 move @LD_NSCNS, a0, 1 000021E0 018828C0 GSP COFF Assembler, Version 2.00, 87.300 Sun Oct 18 15:19:03 2026 (c) Copyright 1985, 1987, Texas Instruments Inc. PAGE 12 0460 00002200 0780 move a0, @RESULT_NSCNS, 1 00002210 01882E40 0461 00002230 07A0 move @LD_RELOCS, a0, 1 00002240 018828E0 0462 00002260 0780 move a0, @RESULT_RELOCS, 1 00002270 01882E00 0463 0464 00002290 ld_finish: 0465 00002290 07A0 move @LD_ENTRY, a0, 1 000022A0 01882840 0466 000022C0 0780 move a0, @RESULT_ENTRY, 1 000022D0 01882D20 0467 000022F0 07A0 move @LD_NSCNS, a0, 1 00002300 018828C0 0468 00002320 0780 move a0, @RESULT_NSCNS, 1 00002330 01882E40 0469 00002350 07A0 move @LD_LEN, a0, 1 00002360 01882880 0470 00002380 0780 move a0, @RESULT_LEN, 1 00002390 01882E60 0471 000023B0 09E0 movi LOADER_BASE, a0, L 000023C0 01880000 0472 000023E0 0780 move a0, @RESULT_VERSION, 1 000023F0 01882E80 0473 0474 ; ---- return or spin -------------------------------- 0475 00002410 07A0 move @LD_MODE, a0, 1 00002420 018828A0 0476 00002440 4C00 move a0, a0 0477 00002450 CB0C jrne ld_return 0478 ; mode 0 (debugger entry): restore the interrupted sta 0479 ; the PC the harness hijacked. Returning to the OS id 0480 ; scheduler run the created child. 0481 00002460 07AF move @LD_SP_AFTER, sp, 1 00002470 01882800 0482 00002490 07AE move @LD_A14, a14, 1 000024A0 01882820 0483 000024C0 09AF mmfm sp, a0,a1,a2,a3,a4,a5,a6,a7,a8,a9,a10,a11,a12,a13 000024D0 3FFF 0484 000024E0 07A0 move @LD_ORIG_PC, a0, 1 000024F0 01882A20 0485 00002510 0160 jump a0 0486 0487 00002520 ld_return: 0488 00002520 07AF move @LD_SP_AFTER, sp, 1 00002530 01882800 0489 00002550 07AE move @LD_A14, a14, 1 00002560 01882820 0490 00002580 09AF mmfm sp, a0,a1,a2,a3,a4,a5,a6,a7,a8,a9,a10,a11,a12,a13 00002590 3FFF 0491 000025A0 07A8 move @RESULT_STATUS, a8, 1 ; 0 = ok, else the error co 000025B0 01882D00 0492 000025D0 0960 rets 0493 0494 000025E0 ld_appname: 0495 000025E0 4C .byte "LOADER", 0 GSP COFF Assembler, Version 2.00, 87.300 Sun Oct 18 15:19:03 2026 (c) Copyright 1985, 1987, Texas Instruments Inc. PAGE 13 000025E8 4F 000025F0 41 000025F8 44 00002600 45 00002608 52 00002610 00 0496 .end No Errors, No Warnings