Am7990 Ethemetl Reference Guide Cheapemet Family • Overview • Software • Design Consideration • Training Order # 08496A TABLE OF CONTENTS I. Overview of Am7990 EtherneVCheapernet Family II. Software Support & Evaluation Boards III. Miscellaneous Components IV. Design Considerations V. Ethernet Training Courses Am7990 ETHERNET /CHEAPERNET FAMILY TECHNICAL LITERATURE The following publications are available from your local AMD sales office or AMD authorized distributors. TITLE DESCRIPTION ORDER # • The Am7990 • General Overview of 03394C Family EtherneV Am7990 Family and Cheapernet EtherneVCheapernet IEEE-802.3 Node LANS. Grid Brochure • Am7990 Local • LANCE Data Sheet- 05698B Area Network Product specifications Controller for and functional Ethernet (LANCE) description of controller chip. • Am7992B Seri!!1 • SIA Data Sheet- 03378A Interface Adaptor Product specifications (SIA) and functional description of encoder/decoder chip. • Am7996 • Transceiver Data 07506A IEEE-802.3/ Sheet-Product EtherneV specifications and Cheapernet functional description Transceiver of transceiver chip. • Local Area • Technical Manual- 06363A Network Controller Considerations of Am7990 (LANCE) LANCE hardware and software interface. • InterfaCing the • Application Note- 07422A Am7990 LANCE Implementation of to 8-Bit Am7990 LANCE with Microprocessors 8-bit microprocessors. • Am7996 • Application Note- 08031 A Application Functional description Note and board layout considerations. 2 OVERVIEW provides the same 10M bits/sec performance. This high- This reference guide provides design consideration notes performance chip family is compatible with IEEE 802.3, the relating to the Am7990 IEEE 802.3 (EthernetiCheapernet) industry standard for EthernetiCheapernel. family of products. Consult you local AMD sales office, The Am7990 Family was produced through joint devel- AMD representative or AMD authorized distributor for any opment work with Digital Equipment Corporation (Am7990 questions concerning device price and/or availability. LANCE and Am7992B SIA) and 3COM (Am7996). Op- timum performance of this family has been assured DEVICE NOMENCLATURE through rigorous testing in various network configurations. The following denotes the current device nomenclature: The Am7990 LANCE features buffer management with descriptor rings to substantially reduced CPU overhead. Its Am7990DCnO (LANCE) - Replaced Am7990DC/60 24-bit-wide linear address provides direct memory address Rev. D product (DMA) into the entire memory space of all major 16-bit Am7992BDC (SIA) - Replaced Am7992ADC and microprocessors. wide package Am7991 ADC Am7996DC (Transceiver) - Replaced Am7995DC The Am7992B SIA is a Manchester encoder-decoder that provides the connection between the LANCE and the Ethernet transceiver. The SIA features include transient I. OVERVIEW OF Am7990 noise suppression and guaranteed signal threshold limits ETHERNET/CHEAPERNET FAMILY in both data and collision paths. The implementation of 10M bits/sec baseband networking The Am7996 Transceiver provides all the transmit, referred to as Ethernet or Cheapernet has been simplified receive and collision detection functions with respect to the by the availability of three devices-the Am7990 Local coax transmiSSion media. The Am7996 features include an Area Network Controller for Ethernet (LANCE), the optional Signal Quality Error (SQE) test function, and noise Am7992B Serial Interface Adapter (SIA) and the Am7996 rejection filters on both transmit and receive data. Transceiver. Together, these three devices provide a complete inte- Devices in the Am7990 Family support both Ethernet grated solution for IEEE 802.3, Ethernet, and Cheapernet and Cheapernet configurations. Cheapernet is Ethernet on networking applications. cheaper cables, has fewer nodes, and shorter distance but Ethernet/IEEE 802.3 Type A Ethernet COAX I 1-;::===:::;" --- ~ ~ ~ ~ ~ ~ Iii ~. ~ Iii I Iii ••-Iii DTE • Data Terminal Equipment ~ AUI - Attachment Unit Interface MAU - Media Attachment Unit • High AC/DC impedance tap • AUI drop cable «50 meters) • Very low loss COAX • Nonintrusive Node attachment 08496A-1 Figure 1A. 3 Cheapernet/lEEE 802.3 Type B DTE IEI RGSS COAX Local Local Am7990 Am7992B CPU Memory LANCE SIA BNC'T' • Standard BNC Tee tap • Inexpensive configuration and cable • Same bandwidth as Type A Figure 1B, II. SOFTWARE SUPPORT board which provides a 15 pin AUI (Attachment Unit Inter- face) female connector, specified by IEEE-802.3. & EVALUATION BOARDS Demo board 1, Multibus Ethernet! AMD IEEE·802,3 (ETHERNET/CHEAPERNET) Cheapernet board DEMO BOARDS AND SOFTWARE This is a stand-alone 80186 based board which requires AMD provides hardware and software support for the an RS-232 terminal and a Multibus chassis to operate. The Am7990 Family (Am7990/92B/96). The evaluation/demo Multibus chassis is used only as a source for power. This boards are available along with the LANCE/network diag- board integrates the Am7990 Family chipset (Am7990/ nostic and network demonstrations software. 92B/96) along with some RAM, EPROM, and 2 communi- cation channels. In summary, the hardware components HARDWARE SUPPORT are as follows: There are three different evaluation boards available as -8018610 MHz CPU follows: -64K byte SRAM (upgradable to 128K bytes) - 32K byte EPROM (upgradable to 64K bytes) Demo board 1. Multibus* Ethernet/Cheapernet board, - Two serial-port communication channels (via Am8530) stand-alone - Am7990n992Bn996 Demo board 2. IBM* PC EthernetlCheapernet board - Supports both Ethernet and Cheapernet connection package - Optimum PC layout for the Am7996 Demo board 3. Am7996 stand-alone evaluation board AMD will provide the hardware manual and schematic as There are software packages available which will run on part of this demo board package. Demo board 1 and 2. Demo board 3 can be used in con- *Multibus is a trademark of Intel Corporation. IBM is a reg- junction with Demo board 1 & 2, or any Ethernet controller istered trademark of International Business Machines. 4 Demo Board 1. Multibus Ethernetl Cheapernet Board Demo board 2. IBM PC EthernetlCheapernet PCturbo-186 board has a 50 pin connector which carries board package all the 80186 signals for external use. A daughter card can use the PCturbo-186 board as a node processor via the This is a two board solution . The first board is a 80186 IBM above mentioned connector. The AMD designed daughter PC plug-in board whose commercial purpose, as stand- card integrates the Am7990/92B/96, along with the glue alone, is to speed-up the application programs running in logic for interfacing to the 80186 connector. an IBM PC and to supp ly 16 bit bus memory for the Am7990 interface. This board has been developed by Or- AMD will provide the hardware schematic of the daughter chid Technology and is known as PCturbo-186. The card only. Any inquiry to the PCturbo-186 board schematic should be directed to Orchid Technology. Demo Board 2. IBM PC Ethernetl Cheapernet Board 5 Demo board 3. Am7996 Stand-Alone 1. Demo board 1 & 2 software Evaluation Board (LANCE Debug Monitor) This is a 3 x 3 inch stand-alone evaluation board which This software package is an educational tool for both integrates the IEEE-802.3 transceiver, Am7996 along with hardware and software engineers to learn about AMD 's external components and a DC-DC converter. The board Ethernet chipset. It also gives an inside look to the opera- interfaces to an Ethernet controller (Demo boards 1,2 or tion of the LANCE (Am7990) and its companion parts, the equivalent) via a 15-pin connector. It also interfaces to the Am7992 and Am7996. This software is useful for creating coax cable, a terminated RG 58 (NU or C/U) cable seg- different boundary conditions and serves as a tool for ments, via a BNC connector for communicating with other observing different signals in a controlled environment with nodes in the network. This board utilizes an optimized PC scope loop capability. layout for the Am7996. This board is recommended as a learning tool in the initial stage of design development. The software will also be SOFTWARE SUPPORT useful for correlation in duplicating the user's system envi- The following outlines the· purpose of each software pack- ronment. One Demo board is sufficient at initial stage age so that the user can get the board and software pack- when using this software for learning about the chipset and age which suits his application. exercising some limited functions (accessing the LANCE Demo Board 3. Am7996 Stand-Alone Evaluation Board 6 IBM PC Ethernet/Cheapernet Board Package • Coax Tee Connector • son Coax Terminator (2 each) up to 185 meters (600 feet) of Cheapernet Cable (RG58 AlU, C/U) PC-turbo '-----186 cards AUI • APP2005Rev.1 Cable ''User Supplied Ethernet Connection" 08496A-2 Figure 2. registers, initialization, transmit, internal/external loopback - LANCE data structure construction test, etc). Having two boards on hand will provide addi- - Routines to show how to implement the LANCE's tional testing of the chipset in a network environment. This initialization block board can also be used for monitoring the network and - Accessing the LANCE registers gathering statistics. - Setup procedures for transmit & receive - Test: internal/external loopback test, CSRO - CSR3 test Some of those statistics are as follows: - Batch executable capability to ease user's interface for - No. of received packets specific sequence of command executions. - No. of transmitted packets - User's specific program execution residing in SRAM - No. of receive errors (e.g., CRC, frame, overflow, etc.) - Fill/Set memory - No. of transmit errors (e.g., Late collision, underflow, - Echo test: Echo packets between two nodes in the etc.) network. - No. of fatal errors (e.g., Missed packets, memory Keeps track of sequence number of trans- timeout error, etc.) mitted and received packets. - Network traffic - Software control switches: (measuring the rate of collision occurrence in network) - Speed up/slow down transmit packets - Speed up/slow down the LANCE polling time This software package has been structured as a command - Enable/disable transmitter or receiver level driver software. The user can get the list of com- - Enable/disable CRC generator mands via the "HELP" command. The following is a brief - Enable/disable output to monitor screen summary of the functions under user control: - Stop/continue on transmit errors - Driver: Implementing the low level data packet on cap- - Stop/continue on receive errors sulation and decapsulation of the data link. - Loop on command (scope loop) 7 - Display commands: CONFIGURE: Set up general parameters (e.g., - Display Transmit ring buffers) in the Data-Link system - Display Receive ring for the purposes of network - Display the LANCE Initialization block management. - Display node status IA SETUP: Establish the node's physical net- - Display the LANCE registers (CSRs) work address. - Display memory MC ADD: Add a multicast address for the There is a user manual which is the specification for this node to the LANCE's Logical Ad- software package and Demo board 1 hardware spec. This dress Filter. software package is included in EPROM in Demo board 1 and is available on diskette for Demo board 2. MC REMOVE: Remove a multicast address. • The protocol defined for communicating these com- 2. Demo board 2 Software mands from Client to Data Link provides for the (Data Link Layer Software) possibilities of: Ethernet Data-Link Software for the Am7990T PCturbo- - Multiple requests (Client processes). 186 Evaluation Board -Individual command status and error reporting. • The combination of an AMD Ethernet Daughter Card - Indirect control management via Request and Base and an Orchid PCturbo-186 expansion board for an COntrol Blocks shared between the client and Data- IBM PC can, with this Data-Link software, create an Link processes. EthernetlCheapernet node in an IBM PC or compatible. - Two mediating routines: the Host Message-Delivery The combination is referred to as the Am7990T Evalua- Mechanism (HMDM); and the Data-Link Message- tion board. Delivery Mechanism (DLMDM)-the HMDM provides • The software is structured to provide Data-Link services control access for the Client, while DLMDM does so to a Client Layer corresponding to ISO Network and for the Data-Link itself. higher layers. It is written in C and its source code is • In normal use, the CONFIGURE command first sets up included with the Am7990T and Am7990 (Multibus) the LANCE and associated Data-Link parameters. Evaluation Boards to serve as an example of Physical Then a Client process establishes its LSAP and form- and Data-Link Layer implementations for LANCE-based ulates a REQUEST BLOCK to perform actual transmis- Ethernet systems. The software offers: sion of a packet. This is all done by calling HMDM from - Message-transfer and delivery for the Client Layer the Client with an associated REQUEST BLOCK via Data Link service calls (CONNECT, DISCON- containing the necessary command code, parameters NECT, TRANSMIT, etc.) for more than one client and addresses. As currently defined, the software is not process at a time. multiprocess, so pOlling for status (e.g., received pack- ets) is used. - Example Physical and Data-Link Layer procedures for LANCE initialization, memory management, error handling and Client servicing. 3. LANCE Diagnostic Software • The 9 Data-Link Services provided are: (not related to any of the DEMO boards) CONNECT: Set up a pairing between a Client The LANCE Diagnostic program has been ported to process and a unique Data-Link an IBM-XT and compiled with the Lattice C Compiler. Service-Access-Point identifier This program is menu driven and is comprised of six (LSAP). major tests with increasing complexity. The code is DISCONNECT: Remove a CONNECTion to an available in C source code on 3 IBM PC diskettes and LSAP. is well documented and very readable. It consists of the following modes. TRANSMIT: Send a designated set of packet buffers to a destination (DLSAP). Note: Only the first four items in the following list have This is implemented as a Datagram been checked out-other items have not been service, not a guaranteed, virtual- checked for errors. circuit service. Such reliable serv- LANCE The user-interface control program. It ices would have to be implemented provides menu-driven options and er- at the Client Layer. ror reporting. POST RPD: Post a Receive Packet Descriptor CSRTST A test program for verifying that and up to 4 packet buffers for the LANCE control and status registers Data Link to use when receiving can be read or write and bits can be packets for the calling process set or reset according to specs. LSAP. INITTST A test program to verify the correct ini- POST RBD: Post an additional packet buffer for tialization and correct status reporting the caller's LSAP.. of the LANCE. 8 INTLOOP Internal loop test to verify packet AVAILABILITY transmission/reception, chaining, and - Board Purchase Contact your local AMD Sales CRCs. It also verifies promiscuous, - Board Artwork/Films office for availability and/or normal and collision-test modes. pricing. - Ethernet Software EXTLOOP - Verifies that packets can go out on the Ethernet cable and be received in both ETHERNET PROTOCOL SUPPORT the promiscuous and normal mode. It (TRANSPORT LAYER) also verifies disabling of the receiver or transmitter. Contact your local AMD Sales Office for current arrangements. ETHERTST - Allows the user to configure the size of ring buffers and transmit packets, it The following software firm has Transport layer soft- then transmits packets and accumu- ware available: lates statistics on number of trans- SYROS missions, receptions, and errors on an 2810 South Evergreen individual basis. Tempe, AZ 85282 ECHO When executed on a second LANCE (602) 897-2399 board it switches source and destina- tion addresses and retransmits any III. MISCELLANEOUS COMPONENTS packets received. It also accumulates SOURCES & CONTACTS statistics. A) DC-DC Power Converters UTILS A set of general purpose utility mod- Partial List-Can use any equivalent IEEE 802.3 ules that build initialization blocks, (10Base5, 10Base2) Compatible build ring buffers, calculate or verify Power Transformer. CRCs, and reads or writes CSR regis- ters (5600 bytes). Manufacturer Ordering Part No, DEF Definitions of structures for initblock, Pulse Engineering PE64430 (Ethernet) ring buffers, etc. P. O. Box 12235 San Diego, CA 92112 PE64381 (Cheapernet) BUFFER Allocate RAM space. Tel. (619) 268-2400 SYSTEM Character read/write routine, interrupt Reliability Inc. 2E12R9 (Ethernet) handler in 8086 assembly language P. O. Box 218370 (only 144 bytes of code). Houston, TX 77218 2VP5U9 (Cheapernet) The last 4 modules described above are modules for Tel. (713) 492-0550 writing code for the LANCE. They can easily be studied TWX 910-881-1739 and understood. The .DOC file on the diskette provides B) Isolation Coupling Transformers additional comments on programming techniques for the LANCE and also for porting this code to another Partial list-Can use any equivalent IEEE 802.3 hardware configuration. (10Base5, 10BASE2) compatible Iso- lation Transformers. The code for the test modules show how to call the various utility functions to incorporate them into another Manufacturer Ordering Part No. program. Studying CSRTST & INITTST in conjuction Pulse Engineering 64102 or 64107 with UTILs, DEF and 10 will give the programmer a P.O. Box 12235 good insight into the entire program. San Diego, CA 92112 Embedded into the code are many compiler conditional Tel. (619) 268-2400 print statements that trace the execution of the pro- C) 20MHz Fundamental Mode Crystal gram. These are very useful for debugging; however, Partial list-Can use any equivalent crystal to the they have a penalty of using more RAM space. The specifications listed in the Am7992B following is a tabulation of memory utilization. Data Sheet (page 4). Code space without ETHERTST & ECHO 21 K bytes Manufacturer Ordering Part No. Entire Code Space 26K bytes Code Space with Debug Trace 40K bytes Reeves-Hoffman 04-20423-312 RAM Space Max 16K bytes 400 W. North Street RAM Space w/o ETHERTST & ECHO 6K bytes Carlisle, PA 17013 (717) 243-5929 This code space will vary depending upon the C com- piler used. AMD does not manufacture or sell any of the above There is a user manual which is the specification for items. Interested customers should call the manufac- this software package which is available in C source turer directly for the location of the nearest representa- code on 3 IBM PC diskett9S. tives. 9 IV. DESIGN CONSIDERATIONS to ICRS go inactive (end of packet receive) for the 82586. Interfacing the Am7992B to Intel's 82586 • AX is resynchronized with RCLK to become Ethernet Controller RXD The AMD and Intel's Ethernet Controllers Serial Link in- • RENA is inverted and delayed for ICRS. A load terfaces are functionally similar. The interfacing glue logic capacitance is added to increase the mini- for the Am7992B and the 82586 shown here accom- mum delay of the SIA's RENA with modates the active voltage levels, set-up and hold timing respect to the last data bit. requirement of the two devices. • CLSN is inverted for ICDT and also enables the - Transmit Circuit: 82586 --> Am7992B ICRS. Intel's 586 requires ICRS active with ICDT. • IRTS is inverted for TENA • Modified RCLK (M-RCLK) is used to reassert RENA asynchronously as required by the • TXD is acceptable for TX 82586 at the end of packet. Start of • /TXC requires continuous clock; therefore, SIA's packet synchronization has no problem. /TEST pin is grounded. • CLSN active or RENA inactive disable Receive path to RXD. - Receive Circuit: Am7992B --> 82586 Note: The inverters must have fast and symmetrical rise • RCLK is inverted twice to reduce skew and to and fall time. The Am2965 meets these require- ensure the required delay of 10 to 40ns ments and outputs MOS compatible logic levels. from the time of IRXC goes inactive (high) 82586 and Am7992B Interface VCC 82586 Am7992B 680pF TXC~6---------------------o~------~1"11 TCLK RTS 28 12 TENA XMT_t-1:.;:3:.-_ _ _ _ __ X1 8 TXD 27 ~o TX 9 Cl20MHz SIA X2:~~---~~~~ RXC:~2~3~----~M=-~R~C~L~K~----~~~~~--~4 RCLK COL 24 40.2 3 RENA COL~2~3~~~~ t-t---t--4 29 C'i'S S74 RX 22 L-+-O<:.l-f-o<:.t-+t Q CLK r----+-~2~RX RXJ--21--~~~ CDT 30 .---+--,-!CLSN VCC S74 '---il---~U-----t Q CLK 6 GND1 F 7 GND2 5.0jlF GND3~-------t Inverters: Am2965 (one package) '--------- or: 74AS04 (two packages) DTE Ground F/F: 74S74 (one package) Figure 3. 08496A-3 10 v. ETHERNET TRAINING COURSES • Standards The ISO 7-Layer Network Model-Physical through Ap- EDUCATIONAL SUPPORT plication Layers. 1. E7900B Understanding and The IEEE 802 Series-CSMA/CD bus (Ethernetl Implementing Local Networks Cheapernet), token ring (IBM), token bus (MAP). The CCITT X.25 Standard, HDLC, LAP and their rela- This 2-day lecture and laboratory course covers the AMD EthernetlCheapernet family as well as devices tionship. (Am7960, Am7968/9, etc.) useful in implementing other Protocols for implementing services, flow control, error forms of computer networks. A companion course, handling and reliability. E7900A, covers AMD devices more oriented toward the • General AMD Network Devices telecommunications market (PABX, ISDN, etc.). Both Am7960, Coded Data Transceiver (CDT) and Am8530 classes are scheduled throughout the year or, on spe- cial request, at customer sites. Serial Communications Controller (SCC)-applications to .5-3Mb/s LANs. E7900B introduces those unfamiliar with networks to Am7968/69, Transparent, Asynchronous Transceivers the basic concepts and historical developments that (TAXI)-high-speed, intrasystem communications and have led to the various types of computer networks now bus-width conversion. available (Ethernet, Starlan, etc.). This allows the stu- dent to understand the reasons why different network • AMD Ethernet Devices forms can exist and where each has merit in particular Ethernet structure and review of IEEE 802 Definitions applications. for the Physical and Data-Link Layers. The class then explains international standards (ISO), The AMD Ethernet Family: completed or now in progress, that are relevant to AMD - Am7996, Transceiver (XCVR) products now available (Ethernet, etc.) or soon to be - Am7992B, Serial Interface Adaptor (SIA) available (Starlan, FDDI, etc.). Generally related - Am7990, Local Area Network Controller (LANCE) devices (encryption, data compression, etc.) are out- lined to provide an overall system-application view. This Connection, timing, memory organization and program- constitutes the class' first day. ming details for Ethernet and Cheapernet applications. The second day covers the AMD Am7900 Family in • AMD Network Hardware/Software Support detail, including work with the Am7990 Ether- Evaluation Boards-the stand-alone Am7990 Multibus net/Cheapernet evaluation board. Programming and Evaluation Board, including laboratory exercise in pro- application details are discussed, from the bit level to gramming the LANCE and monitoring the LAN; the typical Data-Link Layer software, as used in the Am7990 IBM PC Demonstration board and its services Am7990T, PC-Turbo Evaluation Board. (file transfer, etc.). Example Data-Link Layer software used in the PC host Course Outline for the Am7990 IBM PC demo board-defining Service Access points, packet buffers and other memory structures. • Introduction Purposes, economics and history of networks- ARPANET, Ethernet and the development of commer- cial networks, standards and services. • Network Structures Inquiries regarding AMD's Educational Support pro- Topologies and Media-Bus, Star, Ring, Tree; guidedl gram should be directed as follows: unguided radio/light. Advanced Micro Devices, Inc. Services, Access Methods and Performance- Pack- Customer Education Center etization, virtual circuits, datagrams and other services; P.O. Box 3453 MIS 71 slotting, CSMAlCD, token passing; stability and com- Sunnyvale, CA 94088 parative performance under load. (408) 749-3665 Internetwork Connections-gateways, routing, flow or control and error handling. (800)538-8450 x3665 11 ADVANCED MICRO DEVICES DOMESTIC SALES OFFICES ALABAMA .............................. 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