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https://git.k-space.ee/arti/vt1200.git
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160 lines
6.7 KiB
Plaintext
160 lines
6.7 KiB
Plaintext
GSP COFF Assembler, Version 2.00, 87.300 Sun Oct 18 03:19:02 2026
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(c) Copyright 1985, 1987, Texas Instruments Inc.
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PAGE 1
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0001 ; blinkpc.asm -- resident blink that draws AFTER the st
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0002 ;
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0003 ; Hook: the firmware's DI RAM trampoline at bit 00000DB
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0004 ; (RLONG(0xFFFFFEA0) = 00000DB0h, stub `JA 3F7146D0h`).
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0005 ;
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0006 ; entry saves the interrupt's saved PC, replaces i
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0007 ; tail-jumps to the stock handler 3F7146D0h;
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0008 ; ret_hook runs when the stock handler `reti`s, draws
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0009 ; to the original PC with `rets 2` (the 2 sk
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0010 ; slot and keeps the interrupted stack balan
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0011 ;
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0012 ; Drawing after the handler matters: a draw before it i
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0013 ; own screen work (measured: blink.asm counter runs, no
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0014 ;
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0015 ; Box: framebuffer (256,400), 64x64, white Terminal Man
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0016 ; State toggles every 0014h invocations (~20 frames at
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0017 ;
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0018 ; Linked at bit 01840000h by dwt/visual/build.sh.
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0019
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0020 00000000 .text
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0021 00000000 _start: ; install, called by rdebug `jump`
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0022 00000000 01E0 pushst
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0023 00000010 0360 dint
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0024 00000020 0540 setf 32, 0, 0
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0025 00000030 09E0 movi entry, a0, L
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00000040 00000190'
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0026 00000060 0580 move a0, @00000DC0h, 0
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00000070 00000DC0
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0027 00000090 0550 setf 16, 0, 0
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0028 000000A0 09E0 movi 0C080h, a0, L
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000000B0 0000C080
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0029 000000D0 0580 move a0, @00000DB0h, 0
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000000E0 00000DB0
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0030 00000100 4400 sub a0, a0
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0031 00000110 0580 move a0, @01840800h, 0 ; counter
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00000120 01840800
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0032 00000140 0580 move a0, @01840810h, 0 ; state (0 = black)
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00000150 01840810
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0033 00000170 01C0 popst
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0034 00000180 0960 rets
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0035
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0036 ; ---- entry: point the interrupt's return at ret_hook,
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0037 00000190 entry:
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0038 00000190 0780 move a0, @01840860h, 1 ; save interrupted a0
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000001A0 01840860
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0039 000001C0 0740 setf 32, 0, 1
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0040 000001D0 B7E0 move *sp(020h), a0, 1 ; saved PC (SP -> ST, +20h -> PC
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000001E0 0020
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0041 000001F0 0780 move a0, @01840820h, 1 ; orig_pc
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00000200 01840820
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0042 00000220 09E0 movi ret_hook, a0, L
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00000230 000002D0'
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0043 00000250 B20F move a0, *sp(020h), 1
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00000260 0020
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0044 00000270 07A0 move @01840860h, a0, 1
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00000280 01840860
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GSP COFF Assembler, Version 2.00, 87.300 Sun Oct 18 03:19:02 2026
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(c) Copyright 1985, 1987, Texas Instruments Inc.
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PAGE 2
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0045 000002A0 C080 jauc 3F7146D0h ; stock OS display handler
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000002B0 3F7146D0
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0046
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0047 ; ---- ret_hook: after the stock handler, draw, then re
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0048 000002D0 ret_hook:
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0049 000002D0 098F mmtm sp, a0,a1,a2,a3,a4,a5 ; field-independent A-reg s
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000002E0 FC00
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0050 000002F0 0180 getst a0
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0051 00000300 0740 setf 32, 0, 1
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0052 00000310 0780 move a0, @01840840h, 1 ; interrupted ST
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00000320 01840840
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0053 00000340 0360 dint
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0054
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0055 00000350 0550 setf 16, 0, 0
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0056 00000360 0740 setf 32, 0, 1
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0057 00000370 05A0 move @01840800h, a0, 0
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00000380 01840800
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0058 000003A0 1020 inc a0
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0059 000003B0 0580 move a0, @01840800h, 0
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000003C0 01840800
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0060 000003E0 0B40 cmpi 0014h, a0
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000003F0 FFEB
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0061 00000400 CB10 jrne draw
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0062 00000410 4400 sub a0, a0
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0063 00000420 0580 move a0, @01840800h, 0
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00000430 01840800
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0064 00000450 05A1 move @01840810h, a1, 0
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00000460 01840810
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0065 00000480 0B41 cmpi 0, a1
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00000490 FFFF
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0066 000004A0 CB02 jrne was_white
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0067 000004B0 1821 movk 1, a1
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0068 000004C0 C001 jruc set_state
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0069 000004D0 was_white:
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0070 000004D0 4421 sub a1, a1
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0071 000004E0 set_state:
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0072 000004E0 0581 move a1, @01840810h, 0
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000004F0 01840810
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0073
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0074 00000510 draw:
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0075 00000510 05A1 move @01840810h, a1, 0
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00000520 01840810
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0076 00000540 0B41 cmpi 0, a1
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00000550 FFFF
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0077 00000560 CB02 jrne pat_white
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0078 00000570 4442 sub a2, a2
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0079 00000580 C003 jruc pat_ready
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0080 00000590 pat_white:
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0081 00000590 09E2 movi 0FFFFh, a2, L
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000005A0 0000FFFF
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0082 000005C0 pat_ready:
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0083 000005C0 09E3 movi 04064100h, a3, L
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000005D0 04064100
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0084 000005F0 09E4 movi 64, a4, L
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00000600 00000040
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0085 00000620 09E5 movi 4, a5, L
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GSP COFF Assembler, Version 2.00, 87.300 Sun Oct 18 03:19:02 2026
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(c) Copyright 1985, 1987, Texas Instruments Inc.
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PAGE 3
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00000630 00000004
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0086 00000650 drow:
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0087 00000650 4CA1 move a5, a1
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0088 00000660 dword:
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0089 00000660 9043 move a2, *a3+, 0
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0090 00000670 3C41 dsjs a1, dword
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0091 00000680 0B03 addi 03C0h, a3
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00000690 03C0
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0092 000006A0 3CC4 dsjs a4, drow
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0093
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0094 ; restore the A registers (field 1 is still 32)
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0095 000006B0 09AF mmfm sp, a0,a1,a2,a3,a4,a5
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000006C0 003F
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0096 ; leave with [ST][orig_pc] and the temporary a0 slot s
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0097 000006D0 0740 setf 32, 0, 1
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0098 000006E0 098F mmtm sp, a0 ; a0 slot at S-20h
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000006F0 8000
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0099 00000700 07A0 move @01840820h, a0, 1 ; orig_pc
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00000710 01840820
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0100 00000730 A20F move a0, -*sp, 1 ; orig_pc at S-40h
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0101 00000740 B7E0 move *sp(020h), a0, 1 ; restore a0 from S-20h
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00000750 0020
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0102 00000760 07A0 move @01840840h, a0, 1 ; interrupted ST (temporarily i
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00000770 01840840
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0103 00000790 A20F move a0, -*sp, 1 ; ST at S-60h
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0104 000007A0 B7E0 move *sp(040h), a0, 1 ; restore a0 from S-20h
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000007B0 0040
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0105 000007C0 01C0 popst ; restore interrupted ST/IE
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0106 000007D0 0962 rets 2 ; pop orig_pc, skip the a0 slot
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0107 .end
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No Errors, No Warnings
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