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mirror of https://git.k-space.ee/arti/vt1200.git synced 2026-10-30 12:03:54 +02:00
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vt1200/tools/ghidra-tms34010
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SDD 5000b8bc07 harness: level-1 VIDEO MEMORY test passes (video RAM mapped + REFCNT advances); next gate is HOST PORT
2026-10-16 10:57:06 +03:00
..
Scripts
checkpoint: VT1200 reverse-engineering workspace before board-model work
2026-10-16 01:37:50 +03:00
README.md
checkpoint: VT1200 reverse-engineering workspace before board-model work
2026-10-16 01:37:50 +03:00
tms34010.cspec
checkpoint: VT1200 reverse-engineering workspace before board-model work
2026-10-16 01:37:50 +03:00
tms34010.ldefs
checkpoint: VT1200 reverse-engineering workspace before board-model work
2026-10-16 01:37:50 +03:00
tms34010.pspec
checkpoint: VT1200 reverse-engineering workspace before board-model work
2026-10-16 01:37:50 +03:00
tms34010.sinc
harness: level-1 VIDEO MEMORY test passes (video RAM mapped + REFCNT advances); next gate is HOST PORT
2026-10-16 10:57:06 +03:00
tms34010.slaspec
checkpoint: VT1200 reverse-engineering workspace before board-model work
2026-10-16 01:37:50 +03:00

README.md

Ghidra_TMS34010

A processor module of the Texas Instruments TMS34010 processor for Ghidra.

Current status is incomplete, some semantics are still needed to be finished as well as other fixes.

12/27/2022 - Added python script for importing symbols into Ghidra.

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