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Four-config A/B (IRQ wiring kept in all four; both mc68681 edits reverted in cfg 4): the console line and L3FA6E4B0's return are identical (HOST PORT - 15 / 6) in cfg 1-4. Verdict: PRE-EXISTING. Neither timing edit causes or relocates the failure. Methodology correction: hp_ret.lua's labels were on the wrong rets addresses. The real returns are L3FA6E4B0 -> 6, L3FA71BC0 -> 0x00900040, L3FA753D0 -> 0x00000408, L3FA767E0 -> 0. hp_ret2.lua fixes the addresses. What 6 is: not a device code. L3FA6E4B0 reduces five descriptor fields (struct+0x60/ 0x80/0xa0/0xc0/0xe0, written from the four sub-test calls) to a 5-bit value; 6 = 0b00110 = "L3FA71BC0 nonzero, L3FA753D0 nonzero". The caller turns any nonzero into 0x400, which the dispatcher maps to HOST PORT - 15. Flagged: L3FA753D0 returns 0x408 while all its own checks pass, so "nonzero" != "failed its checks"; polarity unresolved. Leads: COUNTER_READY is set by the firmware's own Start-Counter-Command read (reg 0x0E), is not in IMR, and is not handled by the ISR -- not the cause. The DUART clock (3.6864 MHz) could not be confirmed from the service guide. Variant MAME files kept in harness/mame/mame_edits/. Regression holds.
16 lines
552 B
Lua
16 lines
552 B
Lua
local machine = manager.machine
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local cpu = machine.devices[':maincpu']
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local dbg = machine.debugger
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local prog = cpu.spaces['program']
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local rd = function(a) return prog:read_u16(a) end
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local last={}
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local keys={ ISR=0x06400050, IMR=0x06400050, ACR=0x06400040, CUR=0x06400060 }
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local n=0
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emu.register_frame_done(function()
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n=n+1
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local isr=rd(0x06400050) & 0xff
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if last.isr~=isr then print(string.format("f%4d ISR=%02X ACR=%04X", n, isr, rd(0x06400040))); last.isr=isr end
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if n>=520 then machine:exit() end
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end,"ctr")
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dbg.execution_state='run'
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