arti 895e059383 build-lance.sh: fail the build if .text overlaps the marker block ...

The text panel grew .text past MARK and the payload overwrote its own code
with cell() writes (illegal opcode on the unit). The build now parses
build/lance.map and aborts if the end of .text reaches MARK, printing the
remaining gap.

2026-10-30 15:58:16 +02:00

..

c-hello

c-hello: first C program on the VT1200, running on real hardware

2026-10-29 18:25:38 +02:00

dis

checkpoint: VT1200 reverse-engineering workspace before board-model work

2026-10-16 01:37:50 +03:00

hello-world

hello-world: the TMS34010 SDK assembles code that runs on the emulated VT1200

2026-10-18 01:20:38 +03:00

mame

fix crash: marker block overlapped .text after the text panel grew it

2026-10-30 15:57:30 +02:00

sdk-roundtrip

dis34: print long relative JR as jr and surface B-file SP as b15

2026-10-18 00:54:34 +03:00

sdk-scratch

reference: TMS34010 SDK investigation; prove GSPA round trip

2026-10-18 00:39:32 +03:00

udpstream

build-lance.sh: fail the build if .text overlaps the marker block

2026-10-30 15:58:16 +02:00

BOOTP_REPORT.md

harness/serve.py: optional BOOTP responder (--bootp) so the VT1200 gets an IP at boot

2026-10-16 17:27:00 +03:00

cap-abc.log

checkpoint: VT1200 reverse-engineering workspace before board-model work

2026-10-16 01:37:50 +03:00

cap-all.log

checkpoint: VT1200 reverse-engineering workspace before board-model work

2026-10-16 01:37:50 +03:00

cap-boot.log

checkpoint: VT1200 reverse-engineering workspace before board-model work

2026-10-16 01:37:50 +03:00

cap-decsnf.log

checkpoint: VT1200 reverse-engineering workspace before board-model work

2026-10-16 01:37:50 +03:00

cap-evil.log

checkpoint: VT1200 reverse-engineering workspace before board-model work

2026-10-16 01:37:50 +03:00

cap-probe.log

checkpoint: VT1200 reverse-engineering workspace before board-model work

2026-10-16 01:37:50 +03:00

cap-snf.log

checkpoint: VT1200 reverse-engineering workspace before board-model work

2026-10-16 01:37:50 +03:00

cap-term.log

checkpoint: VT1200 reverse-engineering workspace before board-model work

2026-10-16 01:37:50 +03:00

cap-tftp.log

checkpoint: VT1200 reverse-engineering workspace before board-model work

2026-10-16 01:37:50 +03:00

cap-wide.log

checkpoint: VT1200 reverse-engineering workspace before board-model work

2026-10-16 01:37:50 +03:00

cap.log

checkpoint: VT1200 reverse-engineering workspace before board-model work

2026-10-16 01:37:50 +03:00

net-setup.sh

harness: net-setup.sh -- recreate the tap+bridge the harness needs (they do not survive a reboot)

2026-10-17 14:15:17 +03:00

serve.py

harness/serve.py: optional BOOTP responder (--bootp) so the VT1200 gets an IP at boot

2026-10-16 17:27:00 +03:00

tftp.log

checkpoint: VT1200 reverse-engineering workspace before board-model work

2026-10-16 01:37:50 +03:00