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https://git.k-space.ee/arti/vt1200.git
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SDD
d7725faa1e
Enumeration (measurement only): of the 18 flag-set sites in L3FA71BC0 and 4 in L3FA753D0, exactly three fire -- L3FA71BC0 c6 (cmp 3FA73970 btst5 on struct[index].0x60; actual 0x0001/0x0009, bit5 clear) and L3FA753D0 c1/c0 (cmp 3FA760E0 btst1 / 3FA76050 btst4 on the index4/index5 SRA snapshots; actual 0x05/0x07, FFULL and OVR clear). All other checks pass; cE is a summary flag, not a check. Task 2 citation (for independent reading): SCN2681 p.7 "Data is transferred from the holding register to transmit shift register when it is idle..." and p.22 "TxRDY sets at the end of the 'start bit' time. It is during the start bit that the data in the transmit holding register is transferred...". Neither states a bit-count latency; MAME measurably inserts ~1 bit (RX sync = THRA write + 2605 cycles, bit = 2604). Candidate deviation, not written. Full picture (established / ruled out / remaining discrepancy / open deviations) recorded in DUART_REPORT.md. Acceptance still fails; regression holds.
22 lines
858 B
Lua
22 lines
858 B
Lua
-- hp_vals.lua -- actual values at the three failing comparisons.
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local machine = manager.machine
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local cpu = machine.devices[':maincpu']
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local dbg = machine.debugger
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if not dbg then print("ERROR: no debugger"); machine:exit(); return end
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local function bp(addr, msg)
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dbg:command('bpset ' .. addr .. ',,{ printf "' .. msg ..
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' a7=%08X a9=%08X a11=%08X\\n", a7, a9, a11 ; g }')
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end
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-- L3FA71BC0: c6 -> btst 5 on struct[index].0x60 (set site 3FA739B0)
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bp("3fa73970", "BC0/c6-cmp(btst5)")
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-- L3FA753D0: c0 -> btst 4 on *a7(0x3d0); c1 -> btst 1 on *a7(0x3c0)
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bp("3fa76050", "RX/c0-cmp(btst4)")
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bp("3fa760e0", "RX/c1-cmp(btst1)")
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local n = 0
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emu.register_frame_done(function()
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n = n + 1
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if n >= tonumber(os.getenv("HP_FRAMES") or "700") then print("done "..n); machine:exit() end
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end, "vt1200-hp-vals")
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dbg.visible_cpu = cpu
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dbg.execution_state = 'run'
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