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cmd 8 alternates 0xFFFF/0x0000 per frame so the rate is visible: 300 frames in 9.775 s on the unit, 32.6 ms each, 30.69 fps sustained. cmd 9 is the same byte-store loop aimed at a DRAM buffer, to measure the CPU's store rate without the VRAM arbiter and size a frame-expansion stage. vtcmd.py --dram selects it. Report 74.3 records the independent Ghidra pass over the ROM: the firmware sets CONVSP/CONVDP=0x14 (pitch 0x800 bits = 256 B), PSIZE=1, PMASK=0 and OFFSET=0x04000000 for XY addressing -- the same values vram.asm uses -- and fills with FILL_L chunked at 0x7FC0 pixels because DYDX is 15 bits per axis. There is no VBLT and no wait-state/arbitration register in the ROM, so the 12 us/byte CPU store cost is inherent to this board, not a setting.