forked from arti/vt1200
spec: dictionary entry stride is 1024 bits, not 128
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@@ -198,7 +198,7 @@ The host uses it to pace the stream and to force a keyframe when drops are seen.
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### 8.5 Decoder loop and cost control
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Per tile: load index, form source address (`index << 7` **bits**), load `B0/B1/B7`,
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Per tile: load index, form the source address as `index << 10` **bits** (a dictionary entry is 128 B = 1024 bits), load `B0/B1/B7`,
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execute. Kept small so the instruction cache (user's guide §5.4.7: 2.25 states per
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instruction word with cache, 3 extra states per fetch without) holds the loop. The
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blit dominates (23 µs vs ~3–5 µs of CPU), so the CPU still has room to service the
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