arti c0ae3ecd27 fix crash: marker block overlapped .text after the text panel grew it ...

.text went from 0x018C6140 to 0x018CACD0, so the marker cells at 0x018C8000
landed inside the payload's own code; cell() then overwrote instructions and
the CPU faulted with an illegal opcode before drawing anything.

MARK moved to 0x018D0000 (~2.6 KB past the end of .text).

2026-10-30 15:57:30 +02:00

..

c-hello

c-hello: first C program on the VT1200, running on real hardware

2026-10-29 18:25:38 +02:00

dis

checkpoint: VT1200 reverse-engineering workspace before board-model work

2026-10-16 01:37:50 +03:00

hello-world

hello-world: the TMS34010 SDK assembles code that runs on the emulated VT1200

2026-10-18 01:20:38 +03:00

mame

fix crash: marker block overlapped .text after the text panel grew it

2026-10-30 15:57:30 +02:00

sdk-roundtrip

dis34: print long relative JR as jr and surface B-file SP as b15

2026-10-18 00:54:34 +03:00

sdk-scratch

reference: TMS34010 SDK investigation; prove GSPA round trip

2026-10-18 00:39:32 +03:00

udpstream

fix crash: marker block overlapped .text after the text panel grew it

2026-10-30 15:57:30 +02:00

BOOTP_REPORT.md

harness/serve.py: optional BOOTP responder (--bootp) so the VT1200 gets an IP at boot

2026-10-16 17:27:00 +03:00

cap-abc.log

checkpoint: VT1200 reverse-engineering workspace before board-model work

2026-10-16 01:37:50 +03:00

cap-all.log

checkpoint: VT1200 reverse-engineering workspace before board-model work

2026-10-16 01:37:50 +03:00

cap-boot.log

checkpoint: VT1200 reverse-engineering workspace before board-model work

2026-10-16 01:37:50 +03:00

cap-decsnf.log

checkpoint: VT1200 reverse-engineering workspace before board-model work

2026-10-16 01:37:50 +03:00

cap-evil.log

checkpoint: VT1200 reverse-engineering workspace before board-model work

2026-10-16 01:37:50 +03:00

cap-probe.log

checkpoint: VT1200 reverse-engineering workspace before board-model work

2026-10-16 01:37:50 +03:00

cap-snf.log

checkpoint: VT1200 reverse-engineering workspace before board-model work

2026-10-16 01:37:50 +03:00

cap-term.log

checkpoint: VT1200 reverse-engineering workspace before board-model work

2026-10-16 01:37:50 +03:00

cap-tftp.log

checkpoint: VT1200 reverse-engineering workspace before board-model work

2026-10-16 01:37:50 +03:00

cap-wide.log

checkpoint: VT1200 reverse-engineering workspace before board-model work

2026-10-16 01:37:50 +03:00

cap.log

checkpoint: VT1200 reverse-engineering workspace before board-model work

2026-10-16 01:37:50 +03:00

net-setup.sh

harness: net-setup.sh -- recreate the tap+bridge the harness needs (they do not survive a reboot)

2026-10-17 14:15:17 +03:00

serve.py

harness/serve.py: optional BOOTP responder (--bootp) so the VT1200 gets an IP at boot

2026-10-16 17:27:00 +03:00

tftp.log

checkpoint: VT1200 reverse-engineering workspace before board-model work

2026-10-16 01:37:50 +03:00