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Add processor aliases back to -print-supported-cpus and -mcpu=help (#118581)

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They were accidentally dropped in
https://github.com/llvm/llvm-project/pull/96249

rdar://140853882
This commit is contained in:
Jon Roelofs authored and GitHub committed 2024-12-09 09:18:31 -08:00
1 parent 2344cc4983
commit b6c22a4e58
8 files changed
+135 -36
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clang/test/Driver/print-supported-cpus-aarch64.c
+27
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@@ -0,0 +1,27 @@
// Test that --print-supported-cpus lists supported CPU models, including aliases.
// REQUIRES: aarch64-registered-target
// RUN: %clang --target=arm64-apple-macosx --print-supported-cpus 2>&1 | \
// RUN: FileCheck %s --check-prefix=CHECK --implicit-check-not=apple-latest
// CHECK: Target: arm64-apple-macosx
// CHECK: apple-a11
// CHECK: apple-a12
// CHECK: apple-a13
// CHECK: apple-a14
// CHECK: apple-a15
// CHECK: apple-a16
// CHECK: apple-a17
// CHECK: apple-a7
// CHECK: apple-a8
// CHECK: apple-a9
// CHECK: apple-m1
// CHECK: apple-m2
// CHECK: apple-m3
// CHECK: apple-m4
// CHECK: apple-s4
// CHECK: apple-s5
// CHECK: Use -mcpu or -mtune to specify the target's processor.
llvm/include/llvm/CodeGen/TargetSubtargetInfo.h
+2 -1
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@@ -63,7 +63,8 @@ class Triple;
class TargetSubtargetInfo : public MCSubtargetInfo {
protected: // Can only create subclasses...
TargetSubtargetInfo(const Triple &TT, StringRef CPU, StringRef TuneCPU,
StringRef FS, ArrayRef<SubtargetFeatureKV> PF,
StringRef FS, ArrayRef<StringRef> PN,
ArrayRef<SubtargetFeatureKV> PF,
ArrayRef<SubtargetSubTypeKV> PD,
const MCWriteProcResEntry *WPR,
const MCWriteLatencyEntry *WL,
llvm/include/llvm/MC/MCSubtargetInfo.h
+3 -1
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@@ -77,6 +77,7 @@ class MCSubtargetInfo {
Triple TargetTriple;
std::string CPU; // CPU being targeted.
std::string TuneCPU; // CPU being tuned for.
ArrayRef<StringRef> ProcNames; // Processor list, including aliases
ArrayRef<SubtargetFeatureKV> ProcFeatures; // Processor feature list
ArrayRef<SubtargetSubTypeKV> ProcDesc; // Processor descriptions
@@ -95,7 +96,8 @@ class MCSubtargetInfo {
public:
MCSubtargetInfo(const MCSubtargetInfo &) = default;
MCSubtargetInfo(const Triple &TT, StringRef CPU, StringRef TuneCPU,
StringRef FS, ArrayRef<SubtargetFeatureKV> PF,
StringRef FS, ArrayRef<StringRef> PN,
ArrayRef<SubtargetFeatureKV> PF,
ArrayRef<SubtargetSubTypeKV> PD,
const MCWriteProcResEntry *WPR, const MCWriteLatencyEntry *WL,
const MCReadAdvanceEntry *RA, const InstrStage *IS,
llvm/lib/CodeGen/TargetSubtargetInfo.cpp
+6 -5
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@@ -16,11 +16,12 @@ using namespace llvm;
TargetSubtargetInfo::TargetSubtargetInfo(
const Triple &TT, StringRef CPU, StringRef TuneCPU, StringRef FS,
ArrayRef<SubtargetFeatureKV> PF, ArrayRef<SubtargetSubTypeKV> PD,
const MCWriteProcResEntry *WPR, const MCWriteLatencyEntry *WL,
const MCReadAdvanceEntry *RA, const InstrStage *IS, const unsigned *OC,
const unsigned *FP)
: MCSubtargetInfo(TT, CPU, TuneCPU, FS, PF, PD, WPR, WL, RA, IS, OC, FP) {}
ArrayRef<StringRef> PN, ArrayRef<SubtargetFeatureKV> PF,
ArrayRef<SubtargetSubTypeKV> PD, const MCWriteProcResEntry *WPR,
const MCWriteLatencyEntry *WL, const MCReadAdvanceEntry *RA,
const InstrStage *IS, const unsigned *OC, const unsigned *FP)
: MCSubtargetInfo(TT, CPU, TuneCPU, FS, PN, PF, PD, WPR, WL, RA, IS, OC,
FP) {}
TargetSubtargetInfo::~TargetSubtargetInfo() = default;
llvm/lib/MC/MCSubtargetInfo.cpp
+45 -25
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@@ -85,16 +85,22 @@ static void ApplyFeatureFlag(FeatureBitset &Bits, StringRef Feature,
}
/// Return the length of the longest entry in the table.
template <typename T>
static size_t getLongestEntryLength(ArrayRef<T> Table) {
static size_t getLongestEntryLength(ArrayRef<SubtargetFeatureKV> Table) {
size_t MaxLen = 0;
for (auto &I : Table)
MaxLen = std::max(MaxLen, std::strlen(I.Key));
return MaxLen;
}
static size_t getLongestEntryLength(ArrayRef<StringRef> Table) {
size_t MaxLen = 0;
for (StringRef I : Table)
MaxLen = std::max(MaxLen, I.size());
return MaxLen;
}
/// Display help for feature and mcpu choices.
static void Help(ArrayRef<SubtargetSubTypeKV> CPUTable,
static void Help(ArrayRef<StringRef> CPUNames,
ArrayRef<SubtargetFeatureKV> FeatTable) {
// the static variable ensures that the help information only gets
// printed once even though a target machine creates multiple subtargets
@@ -104,14 +110,20 @@ static void Help(ArrayRef<SubtargetSubTypeKV> CPUTable,
}
// Determine the length of the longest CPU and Feature entries.
unsigned MaxCPULen = getLongestEntryLength(CPUTable);
unsigned MaxCPULen = getLongestEntryLength(CPUNames);
unsigned MaxFeatLen = getLongestEntryLength(FeatTable);
// Print the CPU table.
errs() << "Available CPUs for this target:\n\n";
for (auto &CPU : CPUTable)
errs() << format(" %-*s - Select the %s processor.\n", MaxCPULen, CPU.Key,
CPU.Key);
for (auto &CPUName : CPUNames) {
// Skip apple-latest, as that's only meant to be used in
// disassemblers/debuggers, and we don't want normal code to be built with
// it as an -mcpu=
if (CPUName == "apple-latest")
continue;
errs() << format(" %-*s - Select the %s processor.\n", MaxCPULen,
CPUName.str().c_str(), CPUName.str().c_str());
}
errs() << '\n';
// Print the Feature table.
@@ -127,7 +139,7 @@ static void Help(ArrayRef<SubtargetSubTypeKV> CPUTable,
}
/// Display help for mcpu choices only
static void cpuHelp(ArrayRef<SubtargetSubTypeKV> CPUTable) {
static void cpuHelp(ArrayRef<StringRef> CPUNames) {
// the static variable ensures that the help information only gets
// printed once even though a target machine creates multiple subtargets
static bool PrintOnce = false;
@@ -137,8 +149,14 @@ static void cpuHelp(ArrayRef<SubtargetSubTypeKV> CPUTable) {
// Print the CPU table.
errs() << "Available CPUs for this target:\n\n";
for (auto &CPU : CPUTable)
errs() << "\t" << CPU.Key << "\n";
for (auto &CPU : CPUNames) {
// Skip apple-latest, as that's only meant to be used in
// disassemblers/debuggers, and we don't want normal code to be built with
// it as an -mcpu=
if (CPU == "apple-latest")
continue;
errs() << "\t" << CPU << "\n";
}
errs() << '\n';
errs() << "Use -mcpu or -mtune to specify the target's processor.\n"
@@ -148,7 +166,9 @@ static void cpuHelp(ArrayRef<SubtargetSubTypeKV> CPUTable) {
PrintOnce = true;
}
static FeatureBitset getFeatures(StringRef CPU, StringRef TuneCPU, StringRef FS,
static FeatureBitset getFeatures(MCSubtargetInfo &STI, StringRef CPU,
StringRef TuneCPU, StringRef FS,
ArrayRef<StringRef> ProcNames,
ArrayRef<SubtargetSubTypeKV> ProcDesc,
ArrayRef<SubtargetFeatureKV> ProcFeatures) {
SubtargetFeatures Features(FS);
@@ -163,7 +183,7 @@ static FeatureBitset getFeatures(StringRef CPU, StringRef TuneCPU, StringRef FS,
// Check if help is needed
if (CPU == "help")
Help(ProcDesc, ProcFeatures);
Help(ProcNames, ProcFeatures);
// Find CPU entry if CPU name is specified.
else if (!CPU.empty()) {
@@ -196,9 +216,9 @@ static FeatureBitset getFeatures(StringRef CPU, StringRef TuneCPU, StringRef FS,
for (const std::string &Feature : Features.getFeatures()) {
// Check for help
if (Feature == "+help")
Help(ProcDesc, ProcFeatures);
Help(ProcNames, ProcFeatures);
else if (Feature == "+cpuhelp")
cpuHelp(ProcDesc);
cpuHelp(ProcNames);
else
ApplyFeatureFlag(Bits, Feature, ProcFeatures);
}
@@ -208,7 +228,8 @@ static FeatureBitset getFeatures(StringRef CPU, StringRef TuneCPU, StringRef FS,
void MCSubtargetInfo::InitMCProcessorInfo(StringRef CPU, StringRef TuneCPU,
StringRef FS) {
FeatureBits = getFeatures(CPU, TuneCPU, FS, ProcDesc, ProcFeatures);
FeatureBits =
getFeatures(*this, CPU, TuneCPU, FS, ProcNames, ProcDesc, ProcFeatures);
FeatureString = std::string(FS);
if (!TuneCPU.empty())
@@ -219,20 +240,19 @@ void MCSubtargetInfo::InitMCProcessorInfo(StringRef CPU, StringRef TuneCPU,
void MCSubtargetInfo::setDefaultFeatures(StringRef CPU, StringRef TuneCPU,
StringRef FS) {
FeatureBits = getFeatures(CPU, TuneCPU, FS, ProcDesc, ProcFeatures);
FeatureBits =
getFeatures(*this, CPU, TuneCPU, FS, ProcNames, ProcDesc, ProcFeatures);
FeatureString = std::string(FS);
}
MCSubtargetInfo::MCSubtargetInfo(const Triple &TT, StringRef C, StringRef TC,
StringRef FS, ArrayRef<SubtargetFeatureKV> PF,
ArrayRef<SubtargetSubTypeKV> PD,
const MCWriteProcResEntry *WPR,
const MCWriteLatencyEntry *WL,
const MCReadAdvanceEntry *RA,
const InstrStage *IS, const unsigned *OC,
const unsigned *FP)
MCSubtargetInfo::MCSubtargetInfo(
const Triple &TT, StringRef C, StringRef TC, StringRef FS,
ArrayRef<StringRef> PN, ArrayRef<SubtargetFeatureKV> PF,
ArrayRef<SubtargetSubTypeKV> PD, const MCWriteProcResEntry *WPR,
const MCWriteLatencyEntry *WL, const MCReadAdvanceEntry *RA,
const InstrStage *IS, const unsigned *OC, const unsigned *FP)
: TargetTriple(TT), CPU(std::string(C)), TuneCPU(std::string(TC)),
ProcFeatures(PF), ProcDesc(PD), WriteProcResTable(WPR),
ProcNames(PN), ProcFeatures(PF), ProcDesc(PD), WriteProcResTable(WPR),
WriteLatencyTable(WL), ReadAdvanceTable(RA), Stages(IS),
OperandCycles(OC), ForwardingPaths(FP) {
InitMCProcessorInfo(CPU, TuneCPU, FS);
llvm/unittests/CodeGen/MFCommon.inc
+2 -2
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@@ -78,8 +78,8 @@ public:
class BogusSubtarget : public TargetSubtargetInfo {
public:
BogusSubtarget(TargetMachine &TM)
: TargetSubtargetInfo(Triple(""), "", "", "", {}, {}, nullptr, nullptr,
nullptr, nullptr, nullptr, nullptr),
: TargetSubtargetInfo(Triple(""), "", "", "", {}, {}, {}, nullptr,
nullptr, nullptr, nullptr, nullptr, nullptr),
FL(), TL(TM) {}
~BogusSubtarget() override {}
llvm/unittests/Target/AArch64/AArch64InstPrinterTest.cpp
+1 -1
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@@ -36,7 +36,7 @@ static std::string AArch64InstPrinterTestPrintAlignedLabel(uint64_t value) {
MCAsmInfo MAI;
MCInstrInfo MII;
MCRegisterInfo MRI;
MCSubtargetInfo STI(Triple(""), "", "", "",
MCSubtargetInfo STI(Triple(""), "", "", "", {},
ArrayRef((SubtargetFeatureKV *)NULL, (size_t)0),
ArrayRef((SubtargetSubTypeKV *)NULL, (size_t)0), NULL,
NULL, NULL, NULL, NULL, NULL);
llvm/utils/TableGen/SubtargetEmitter.cpp
+49 -1
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@@ -21,6 +21,7 @@
#include "llvm/ADT/StringExtras.h"
#include "llvm/ADT/StringMap.h"
#include "llvm/ADT/StringRef.h"
#include "llvm/ADT/StringSwitch.h"
#include "llvm/MC/MCInstrItineraries.h"
#include "llvm/MC/MCSchedule.h"
#include "llvm/Support/Debug.h"
@@ -91,6 +92,7 @@ class SubtargetEmitter {
void emitSubtargetInfoMacroCalls(raw_ostream &OS);
unsigned featureKeyValues(raw_ostream &OS, const FeatureMapTy &FeatureMap);
unsigned cpuKeyValues(raw_ostream &OS, const FeatureMapTy &FeatureMap);
unsigned cpuNames(raw_ostream &OS);
void formItineraryStageString(const std::string &Names,
const Record *ItinData, std::string &ItinString,
unsigned &NStages);
@@ -297,6 +299,40 @@ unsigned SubtargetEmitter::featureKeyValues(raw_ostream &OS,
return FeatureList.size();
}
unsigned SubtargetEmitter::cpuNames(raw_ostream &OS) {
// Begin processor name table.
OS << "// Sorted array of names of CPU subtypes, including aliases.\n"
<< "extern const llvm::StringRef " << Target << "Names[] = {\n";
std::vector<const Record *> ProcessorList =
Records.getAllDerivedDefinitions("Processor");
std::vector<const Record *> ProcessorAliasList =
Records.getAllDerivedDefinitionsIfDefined("ProcessorAlias");
SmallVector<StringRef> Names;
Names.reserve(ProcessorList.size() + ProcessorAliasList.size());
for (const Record *Processor : ProcessorList) {
StringRef Name = Processor->getValueAsString("Name");
Names.push_back(Name);
}
for (const Record *Rec : ProcessorAliasList) {
auto Name = Rec->getValueAsString("Name");
Names.push_back(Name);
}
llvm::sort(Names);
llvm::interleave(
Names, OS, [&](StringRef Name) { OS << '"' << Name << '"'; }, ",\n");
// End processor name table.
OS << "};\n";
return Names.size();
}
//
// CPUKeyValues - Emit data of all the subtarget processors. Used by command
// line.
@@ -1926,13 +1962,14 @@ void SubtargetEmitter::emitGenMCSubtargetInfo(raw_ostream &OS) {
<< "GenMCSubtargetInfo : public MCSubtargetInfo {\n";
OS << " " << Target << "GenMCSubtargetInfo(const Triple &TT,\n"
<< " StringRef CPU, StringRef TuneCPU, StringRef FS,\n"
<< " ArrayRef<StringRef> PN,\n"
<< " ArrayRef<SubtargetFeatureKV> PF,\n"
<< " ArrayRef<SubtargetSubTypeKV> PD,\n"
<< " const MCWriteProcResEntry *WPR,\n"
<< " const MCWriteLatencyEntry *WL,\n"
<< " const MCReadAdvanceEntry *RA, const InstrStage *IS,\n"
<< " const unsigned *OC, const unsigned *FP) :\n"
<< " MCSubtargetInfo(TT, CPU, TuneCPU, FS, PF, PD,\n"
<< " MCSubtargetInfo(TT, CPU, TuneCPU, FS, PN, PF, PD,\n"
<< " WPR, WL, RA, IS, OC, FP) { }\n\n"
<< " unsigned resolveVariantSchedClass(unsigned SchedClass,\n"
<< " const MCInst *MI, const MCInstrInfo *MCII,\n"
@@ -2001,6 +2038,8 @@ void SubtargetEmitter::run(raw_ostream &OS) {
OS << "\n";
unsigned NumProcs = cpuKeyValues(OS, FeatureMap);
OS << "\n";
unsigned NumNames = cpuNames(OS);
OS << "\n";
// MCInstrInfo initialization routine.
emitGenMCSubtargetInfo(OS);
@@ -2013,6 +2052,10 @@ void SubtargetEmitter::run(raw_ostream &OS) {
<< " TuneCPU = AArch64::resolveCPUAlias(TuneCPU);\n";
OS << " return new " << Target
<< "GenMCSubtargetInfo(TT, CPU, TuneCPU, FS, ";
if (NumNames)
OS << Target << "Names, ";
else
OS << "{}, ";
if (NumFeatures)
OS << Target << "FeatureKV, ";
else
@@ -2096,6 +2139,7 @@ void SubtargetEmitter::run(raw_ostream &OS) {
OS << "#include \"llvm/CodeGen/TargetSchedule.h\"\n\n";
OS << "namespace llvm {\n";
OS << "extern const llvm::StringRef " << Target << "Names[];\n";
OS << "extern const llvm::SubtargetFeatureKV " << Target << "FeatureKV[];\n";
OS << "extern const llvm::SubtargetSubTypeKV " << Target << "SubTypeKV[];\n";
OS << "extern const llvm::MCWriteProcResEntry " << Target
@@ -2119,6 +2163,10 @@ void SubtargetEmitter::run(raw_ostream &OS) {
<< " AArch64::resolveCPUAlias(TuneCPU), FS, ";
else
OS << " : TargetSubtargetInfo(TT, CPU, TuneCPU, FS, ";
if (NumNames)
OS << "ArrayRef(" << Target << "Names, " << NumNames << "), ";
else
OS << "{}, ";
if (NumFeatures)
OS << "ArrayRef(" << Target << "FeatureKV, " << NumFeatures << "), ";
else