This includes the various `.async` and `.tensor` operations. Various scattered bits of information are now in one place. Also added the missing documentation for tensor intrinsics.
9.5 KiB
User Guides
NOTE: If you are a user who is only interested in using an LLVM-based compiler, you should look into Clang instead. The documentation here is intended for users who have a need to work with the intermediate LLVM representation.
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HowToBuildOnARM
HowToBuildWithPGO
HowToCrossCompileLLVM
CoverageMappingFormat
CFIVerify
BuildingADistribution
CMake
Docker
SupportLibrary
AdvancedBuilds
WritingAnLLVMNewPMPass
WritingAnLLVMPass
Passes
StackSafetyAnalysis
MergeFunctions
AliasAnalysis
MemorySSA
MemProf
LoopTerminology
CycleTerminology
Vectorizers
LinkTimeOptimization
DTLTO
GoldPlugin
Remarks
SourceLevelDebugging
HowToUpdateDebugInfo
Instrumentor
InstrRefDebugInfo
RemoveDIsDebugInfo
KeyInstructionsDebugInfo
InstrProfileFormat
InstCombineContributorGuide
WritingAnLLVMBackend
CodeGenerator
TableGen/index
MCJITDesignAndImplementation
ORCv2
JITLink
DebuggingJITedCode
CommandLine
ExtendingLLVM
AddingConstrainedIntrinsics
HowToBuildWindowsItaniumPrograms
HowToCrossCompileBuiltinsOnArm
BigEndianNEON
AArch64SME
CompileCudaWithLLVM
NVPTXUsage
AMDGPUUsage
AMDGPUAsyncOperations
AMDGPUDMAOperations
AMDGPUExecutionSynchronization
AMDGPUMemoryModel
SPIRVUsage
DirectXUsage
RISCVUsage
RISCV/RISCVVectorExtension
RISCV/RISCVVCIX
SandboxIR
Telemetry
LFI
AdminTasks
Benchmarking
CMakePrimer
CodeOfConduct
FatLTO
GitHub
MarkdownQuickstartTemplate
MisExpect
OpaquePointers
NewPassManager
ReportingGuide
ResponseGuide
TableGenFundamentals
yaml2obj
Clang
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{doc}
HowToBuildOnARMNotes on building and testing LLVM/Clang on ARM.
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{doc}
HowToBuildWithPGONotes on building LLVM/Clang with PGO.
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{doc}
HowToCrossCompileLLVMNotes on cross-building and testing LLVM/Clang.
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How to build the C, C++, ObjC, and ObjC++ front end
Instructions for building the clang front-end from source.
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{doc}
CoverageMappingFormatThis describes the format and encoding used for LLVM’s code coverage mapping.
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{doc}
CFIVerifyA description of the verification tool for Control Flow Integrity.
LLVM Builds and Distributions
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{doc}
BuildingADistributionA best-practices guide for using LLVM's CMake build system to package and distribute LLVM-based tools.
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{doc}
CMakeAn addendum to the main Getting Started guide for those using the CMake build system.
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{doc}
DockerA reference for using Dockerfiles provided with LLVM.
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{doc}
Support Library <SupportLibrary>This document describes the LLVM Support Library (
lib/Support) and how to keep LLVM source code portable. -
{doc}
AdvancedBuildsThis document describes more advanced build configurations.
Optimizations
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{doc}
WritingAnLLVMNewPMPassInformation on how to write LLVM transformations under the new pass manager.
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{doc}
WritingAnLLVMPassInformation on how to write LLVM transformations and analyses under the legacy pass manager.
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{doc}
PassesA list of optimizations and analyses implemented in LLVM.
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{doc}
StackSafetyAnalysisThis document describes the design of the stack safety analysis of local variables.
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{doc}
MergeFunctionsDescribes functions merging optimization.
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{doc}
AliasAnalysisInformation on how to write a new alias analysis implementation or how to use existing analyses.
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{doc}
MemorySSAInformation about the MemorySSA utility in LLVM, as well as how to use it.
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{doc}
MemProfUser guide and internals of MemProf, profile guided optimizations for memory.
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{doc}
LoopTerminologyA document describing Loops and associated terms as used in LLVM.
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{doc}
CycleTerminologyA document describing cycles as a generalization of loops.
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{doc}
VectorizersThis document describes the current status of vectorization in LLVM.
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{doc}
LinkTimeOptimizationThis document describes the interface between LLVM intermodular optimizer and the linker and its design
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{doc}
DTLTOThis document describes the DTLTO implementation, which allows for distributing ThinLTO backend compilations without requiring support from the build system.
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{doc}
GoldPluginHow to build your programs with link-time optimization on Linux.
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{doc}
RemarksA reference on the implementation of remarks in LLVM.
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{doc}
Source Level Debugging with LLVM <SourceLevelDebugging>This document describes the design and philosophy behind the LLVM source-level debugger.
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{doc}
How to Update Debug Info <HowToUpdateDebugInfo>This document specifies how to correctly update debug info in various kinds of code transformations.
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{doc}
InstrRefDebugInfoThis document explains how LLVM uses value tracking, or instruction referencing, to determine variable locations for debug info in the final stages of compilation.
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{doc}
RemoveDIsDebugInfoThis is a migration guide describing how to move from debug info using intrinsics such as dbg.value to using the non-instruction DbgRecord object.
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{doc}
KeyInstructionsDebugInfoThis document explains how the debug info feature Key Instructions is implemented in LLVM.
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{doc}
InstrProfileFormatThis document explains two binary formats of instrumentation-based profiles.
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{doc}
InstCombineContributorGuideThis document specifies guidelines for contributions for InstCombine and related passes.
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{doc}
InstrumentorA comprehensive guide to the highly configurable Instrumentor pass for custom program instrumentation, including the interactive configuration wizard.
Code Generation
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{doc}
WritingAnLLVMBackendInformation on how to write LLVM backends for machine targets.
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{doc}
CodeGeneratorThe design and implementation of the LLVM code generator. Useful if you are working on retargetting LLVM to a new architecture, designing a new codegen pass, or enhancing existing components.
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{doc}
TableGen <TableGen/index>Describes the TableGen tool, which is used heavily by the LLVM code generator.
GlobalISel
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{doc}
MIRPatterns <GlobalISel/MIRPatterns>Describes the design of MIR Patterns and how to use them.
JIT
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{doc}
MCJITDesignAndImplementationDescribes the inner workings of MCJIT execution engine.
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{doc}
ORCv2Describes the design and implementation of the ORC APIs, including some usage examples, and a guide for users transitioning from ORCv1 to ORCv2.
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{doc}
JITLinkDescribes the design and APIs for the JITLink library, ORC's new JIT linker.
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{doc}
DebuggingJITedCodeHow to debug JITed code with GDB.
Additional Topics
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{doc}
CommandLineProvides information on using the command line parsing library.
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{doc}
ExtendingLLVMLook here to see how to add instructions and intrinsics to LLVM.
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{doc}
AddingConstrainedIntrinsicsGives the steps necessary when adding a new constrained math intrinsic to LLVM.
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{doc}
HowToBuildWindowsItaniumProgramsNotes on assembling a Windows Itanium environment.
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{doc}
HowToCrossCompileBuiltinsOnArmNotes on cross-building and testing the compiler-rt builtins for Arm.
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{doc}
BigEndianNEONLLVM's support for generating NEON instructions on big endian ARM targets is somewhat nonintuitive. This document explains the implementation and rationale.
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{doc}
AArch64SMELLVM's support for AArch64 SME ACLE and ABI.
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{doc}
CompileCudaWithLLVMLLVM support for CUDA.
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{doc}
NVPTXUsageThis document describes using the NVPTX backend to compile GPU kernels.
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{doc}
AMDGPUUsageThis document describes using the AMDGPU backend to compile GPU kernels.
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{doc}
AMDGPUAsyncOperationsAsynchronous operations and the asyncmark mechanism for tracking their completion on AMD GPUs.
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{doc}
AMDGPUDMAOperationsDMA operations that transfer data between global memory and LDS on AMD GPUs.
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{doc}
AMDGPUMemoryModelThis document describes AMDGPU Memory Model which overrides the {ref}
LLVM memory model <memmodel>when a program is compiled for the AMDGPU target. -
{doc}
AMDGPUDwarfExtensionsForHeterogeneousDebuggingThis document describes DWARF extensions to support heterogeneous debugging for targets such as the AMDGPU backend.
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{doc}
AMDGPUDwarfExtensionAllowLocationDescriptionOnTheDwarfExpressionStack/AMDGPUDwarfExtensionAllowLocationDescriptionOnTheDwarfExpressionStackThis document describes a DWARF extension to allow location descriptions on the DWARF expression stack. It is part of {doc}
AMDGPUDwarfExtensionsForHeterogeneousDebugging. -
{doc}
AMDGPUExecutionSynchronizationThis document describes how execution of threads can be synchronized on AMD GPUs.
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{doc}
SPIRVUsageThis document describes using the SPIR-V target to compile GPU kernels.
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{doc}
DirectXUsageThis document describes using the DirectX target to compile GPU code for the DirectX runtime.
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{doc}
RISCVUsageThis document describes using the RISC-V target.
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{doc}
RISCV/RISCVVectorExtensionThis document describes how the RISC-V Vector extension can be expressed in LLVM IR and how code is generated for it in the backend.
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{doc}
RISCV/RISCVVCIXThis document shows how the scheduling information for RISC-V's
XSfvcpextension -- SiFive Vector Coprocessor Interface (VCIX) -- works and how to customize them. -
{doc}
Sandbox IR <SandboxIR>This document describes the design and usage of Sandbox IR, a transactional layer over LLVM IR.
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{doc}
TelemetryThis document describes the Telemetry framework in LLVM.
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{doc}
LFI <LFI>This document describes the Lightweight Fault Isolation (LFI) target in LLVM.