CarolineConcatto
2866d2333c
Model AArch64 ZA and ZT0 intrinsic state using target_mem instead of inaccessiblemem. Bump the bitcode memory-attribute encoding and upgrade old AArch64 bitcode so prior inaccessiblemem effects are preserved on the new target memory locations. Non-AArch64 bitcode keeps the old interpretation.
36 lines
1.4 KiB
LLVM
36 lines
1.4 KiB
LLVM
; RUN: llvm-dis < %S/Inputs/aarch64-memory-attribute-upgrade.bc | FileCheck %s --check-prefix=AARCH64
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; RUN: llvm-dis < %S/Inputs/x86-memory-attribute-upgrade.bc | FileCheck %s --check-prefix=NON-AARCH64
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; The .bc inputs were generated by an older LLVM memory-attribute encoding,
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; before AArch64 target memory was split out from inaccessible memory.
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; The code was compiled using x86 and aarch64 hosts.
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define void @test_inaccessible_read() #0 {
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; AARCH64: ; Function Attrs: memory(inaccessiblemem: read, target_mem: read)
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; AARCH64-NEXT: define void @test_inaccessible_read()
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; NON-AARCH64: ; Function Attrs: memory(inaccessiblemem: read)
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; NON-AARCH64-NEXT: define void @test_inaccessible_read()
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ret void
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}
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define void @test_inaccessible_readwrite() #1 {
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; AARCH64: ; Function Attrs: memory(inaccessiblemem: readwrite, target_mem: readwrite)
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; AARCH64-NEXT: define void @test_inaccessible_readwrite()
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; NON-AARCH64: ; Function Attrs: memory(inaccessiblemem: readwrite)
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; NON-AARCH64-NEXT: define void @test_inaccessible_readwrite()
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ret void
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}
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define void @test_inaccessible_none() #2 {
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; AARCH64: ; Function Attrs: memory(none)
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; AARCH64-NEXT: define void @test_inaccessible_none()
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; NON-AARCH64: ; Function Attrs: memory(none)
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; NON-AARCH64-NEXT: define void @test_inaccessible_none()
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ret void
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}
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attributes #0 = { memory(inaccessiblemem: read) }
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attributes #1 = { memory(inaccessiblemem: readwrite) }
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attributes #2 = { memory(inaccessiblemem: none) }
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