Daniel Cederman 6c859967be [SPARC] Lower dynamic v2i32 vector extracts on 32-bit SPARC (#222348) ...

Lower dynamically indexed extracts after vector legalization so that
instruction selection never receives a variable index.

Constant indexes use the existing TableGen patterns.

Fixes the following error:

LLVM ERROR: Cannot select: 0x5e7e87e5b590: i32 = extract_vector_elt
0x5e7e87e5b910, 0x5e7e87e5b0c0
  0x5e7e87e5b910: v2i32 = BUILD_VECTOR 0x5e7e87e5af70, 0x5e7e87e5b6e0
    0x5e7e87e5af70: i32,ch = CopyFromReg 0x5e7e87e24840, Register:i32 %0
      0x5e7e87e5b750: i32 = Register %0
    0x5e7e87e5b6e0: i32,ch = CopyFromReg 0x5e7e87e24840, Register:i32 %1
      0x5e7e87e5b7c0: i32 = Register %1
  0x5e7e87e5b0c0: i32,ch = CopyFromReg 0x5e7e87e24840, Register:i32 %2
    0x5e7e87e5afe0: i32 = Register %2
In function: extract_v2i8

Assisted-by: Codex
(cherry picked from commit fc264e6ba8b4c65abb716882826e3adccc3bbf1a)

2026-10-18 20:36:04 +02:00

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32abi.ll

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64abi.ll

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64atomics.ll

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64bit.ll

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64cond.ll

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64spill.ll

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2006-01-22-BitConvertLegalize.ll

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2007-05-09-JumpTables.ll

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2007-07-05-LiveIntervalAssert.ll

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2008-10-10-InlineAsmMemoryOperand.ll

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2008-10-10-InlineAsmRegOperand.ll

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2009-08-28-PIC.ll

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2009-08-28-WeakLinkage.ll

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2011-01-11-Call.ll

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2011-01-11-CC.ll

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2011-01-11-FrameAddr.ll

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2011-01-19-DelaySlot.ll

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2011-01-21-ByValArgs.ll

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2011-01-22-SRet.ll

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2011-12-03-TailDuplication.ll

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2012-05-01-LowerArguments.ll

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2013-05-17-CallFrame.ll

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alloca-align.ll

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analyze-branch.ll

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atomicrmw-uinc-udec-wrap.ll

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atomics-ordering.ll

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atomics.ll

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basictest.ll

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bigreturn.ll

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bitcast.ll

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blockaddr.ll

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branches-relax.ll

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branches-v9.ll

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bswap.ll

[SPARC] Fix SelectForceADDRrr for global addresses and non-reg operands (#220013)

2026-09-16 21:34:12 +00:00

cast-sret-func.ll

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codemodel.ll

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constpool.ll

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constructor.ll

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ctlz.ll

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ctpop.ll

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cttz.ll

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data-align.ll

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DbgValueOtherTargets.test

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disable-fsmuld-fmuls.ll

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empty-functions.ll

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exception.ll

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float-constants.ll

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float-ua2007.ll

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float-vis3.ll

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float.ll

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fmuladd-soft-float.ll

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fp16-promote.ll

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fp128-abi.ll

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fp128-select.ll

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fp128-split.ll

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fp128.ll

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fshl.ll

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func-addr.ll

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getpcx-call.ll

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getpcx-rdpc.ll

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globals.ll

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half.ll

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hard-quad-float.ll

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imm.ll

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inline-asm-i-constraint-i1.ll

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inlineasm-bad.ll

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inlineasm-global-memory.ll

[SPARC] Preserve inline asm relocation modifiers (#219971)

2026-09-02 11:13:32 +02:00

inlineasm-output-template.ll

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inlineasm-v9.ll

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inlineasm.ll

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leafproc.ll

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LeonCASAInstructionUT.ll

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LeonDetectRoundChangePassUT.ll

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LeonFixAllFDIVSQRTPassUT.ll

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LeonInsertNOPLoadPassUT.ll

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LeonItinerariesUT.ll

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LeonSMACUMACInstructionUT.ll

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lit.local.cfg

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llvm.sincos.ll

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lrint-conv.ll

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mature-mc-support.ll

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missing-sret.ll

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missinglabel.ll

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mult-alt-generic-sparc.ll

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multiple-div.ll

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multiply-extension.ll

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naked-fn-with-frame-pointer.ll

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obj-relocs.ll

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optcompare.ll

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overflow-intrinsic-optimizations.ll

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parts.ll

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pic.ll

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predictable-select.ll

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private.ll

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readcycle.ll

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reg64.ll

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register-clobber.ll

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rem.ll

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reserved-arg-regs.ll

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reserved-regs-named.ll

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reserved-regs-unavailable.ll

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reserved-regs.ll

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salvage-debug-isel.ll

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select-mask.ll

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sethiandn.ll

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setjmp.ll

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smulo-128-legalisation-lowering.ll

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soft-float.ll

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soft-mul-div.ll

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spill.ll

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spillsize.ll

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sret-secondary.ll

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stack-align.ll

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stack-protector-target.ll

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stack-protector.ll

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stack-slot-coloring.mir

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stackaddress.ll

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tailcall.ll

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thread-pointer.ll

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tls-sp.ll

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tls.ll

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tn0009.mir

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tn0010.ll

[Sparc] Handle two new cases in the GRLIB-TN-0010 workaround pass (#205780)

2026-07-04 08:07:20 +02:00

tn0010.mir

[Sparc] Handle two new cases in the GRLIB-TN-0010 workaround pass (#205780)

2026-07-04 08:07:20 +02:00

tn0011.ll

[Sparc] Apply the GRLIB-TN-0011 errata workaround to ldstub (#205781)

2026-07-01 10:26:29 +02:00

tn0012.mir

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tn0013.mir

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trap.ll

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umulo-128-legalisation-lowering.ll

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varargs-v8.ll

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varargs.ll

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vector-call.ll

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vector-extract-elt.ll

[SPARC] Lower dynamic v2i32 vector extracts on 32-bit SPARC (#222348)

2026-10-18 20:36:04 +02:00

zerostructcall.ll

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