Nikita Popov
46af61a123
Pass the terminator of the predecessor as context instruction when checking for load speculatability. This needs to be done per (unavailable) predecessor now, because the context is different. Cache the guaranteed-to-transfer walk between checks, as that part if always the same. JumpThreading doesn't use AssumptionCache currently, so I believe this is only observable under -use-dereferenceable-at-point-semantics. Adjust the tests to drop nofree attributes that currently hide this issue with the option enabled.
442 lines
14 KiB
LLVM
442 lines
14 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; RUN: opt -S -passes=jump-threading,dce < %s | FileCheck %s
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; RUN: opt -S -passes=jump-threading,dce -use-dereferenceable-at-point-semantics < %s | FileCheck %s
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declare void @llvm.experimental.guard(i1, ...)
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declare i32 @f1()
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declare i32 @f2()
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define i32 @branch_implies_guard(i32 %a) {
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; CHECK-LABEL: @branch_implies_guard(
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; CHECK-NEXT: [[COND:%.*]] = icmp slt i32 [[A:%.*]], 10
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; CHECK-NEXT: br i1 [[COND]], label [[T1_SPLIT:%.*]], label [[F1_SPLIT:%.*]]
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; CHECK: T1.split:
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; CHECK-NEXT: [[V1:%.*]] = call i32 @f1()
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; CHECK-NEXT: [[RETVAL3:%.*]] = add i32 [[V1]], 10
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; CHECK-NEXT: br label [[MERGE:%.*]]
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; CHECK: F1.split:
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; CHECK-NEXT: [[V2:%.*]] = call i32 @f2()
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; CHECK-NEXT: [[RETVAL1:%.*]] = add i32 [[V2]], 10
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; CHECK-NEXT: [[CONDGUARD2:%.*]] = icmp slt i32 [[A]], 20
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; CHECK-NEXT: call void (i1, ...) @llvm.experimental.guard(i1 [[CONDGUARD2]]) [ "deopt"() ]
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; CHECK-NEXT: br label [[MERGE]]
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; CHECK: Merge:
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; CHECK-NEXT: [[TMP1:%.*]] = phi i32 [ [[RETVAL3]], [[T1_SPLIT]] ], [ [[RETVAL1]], [[F1_SPLIT]] ]
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; CHECK-NEXT: ret i32 [[TMP1]]
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;
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%cond = icmp slt i32 %a, 10
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br i1 %cond, label %T1, label %F1
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T1:
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%v1 = call i32 @f1()
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br label %Merge
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F1:
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%v2 = call i32 @f2()
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br label %Merge
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Merge:
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%retPhi = phi i32 [ %v1, %T1 ], [ %v2, %F1 ]
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%retVal = add i32 %retPhi, 10
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%condGuard = icmp slt i32 %a, 20
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call void(i1, ...) @llvm.experimental.guard(i1 %condGuard) [ "deopt"() ]
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ret i32 %retVal
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}
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define i32 @not_branch_implies_guard(i32 %a) {
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; CHECK-LABEL: @not_branch_implies_guard(
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; CHECK-NEXT: [[COND:%.*]] = icmp slt i32 [[A:%.*]], 20
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; CHECK-NEXT: br i1 [[COND]], label [[T1_SPLIT:%.*]], label [[F1_SPLIT:%.*]]
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; CHECK: T1.split:
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; CHECK-NEXT: [[V1:%.*]] = call i32 @f1()
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; CHECK-NEXT: [[RETVAL1:%.*]] = add i32 [[V1]], 10
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; CHECK-NEXT: [[CONDGUARD2:%.*]] = icmp sgt i32 [[A]], 10
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; CHECK-NEXT: call void (i1, ...) @llvm.experimental.guard(i1 [[CONDGUARD2]]) [ "deopt"() ]
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; CHECK-NEXT: br label [[MERGE:%.*]]
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; CHECK: F1.split:
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; CHECK-NEXT: [[V2:%.*]] = call i32 @f2()
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; CHECK-NEXT: [[RETVAL3:%.*]] = add i32 [[V2]], 10
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; CHECK-NEXT: br label [[MERGE]]
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; CHECK: Merge:
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; CHECK-NEXT: [[TMP1:%.*]] = phi i32 [ [[RETVAL3]], [[F1_SPLIT]] ], [ [[RETVAL1]], [[T1_SPLIT]] ]
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; CHECK-NEXT: ret i32 [[TMP1]]
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;
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%cond = icmp slt i32 %a, 20
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br i1 %cond, label %T1, label %F1
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T1:
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%v1 = call i32 @f1()
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br label %Merge
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F1:
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%v2 = call i32 @f2()
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br label %Merge
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Merge:
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%retPhi = phi i32 [ %v1, %T1 ], [ %v2, %F1 ]
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%retVal = add i32 %retPhi, 10
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%condGuard = icmp sgt i32 %a, 10
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call void(i1, ...) @llvm.experimental.guard(i1 %condGuard) [ "deopt"() ]
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ret i32 %retVal
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}
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define i32 @branch_overlaps_guard(i32 %a) {
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; CHECK-LABEL: @branch_overlaps_guard(
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; CHECK-NEXT: [[COND:%.*]] = icmp slt i32 [[A:%.*]], 20
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; CHECK-NEXT: br i1 [[COND]], label [[T1:%.*]], label [[F1:%.*]]
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; CHECK: T1:
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; CHECK-NEXT: [[V1:%.*]] = call i32 @f1()
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; CHECK-NEXT: br label [[MERGE:%.*]]
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; CHECK: F1:
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; CHECK-NEXT: [[V2:%.*]] = call i32 @f2()
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; CHECK-NEXT: br label [[MERGE]]
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; CHECK: Merge:
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; CHECK-NEXT: [[RETPHI:%.*]] = phi i32 [ [[V1]], [[T1]] ], [ [[V2]], [[F1]] ]
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; CHECK-NEXT: [[RETVAL:%.*]] = add i32 [[RETPHI]], 10
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; CHECK-NEXT: [[CONDGUARD:%.*]] = icmp slt i32 [[A]], 10
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; CHECK-NEXT: call void (i1, ...) @llvm.experimental.guard(i1 [[CONDGUARD]]) [ "deopt"() ]
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; CHECK-NEXT: ret i32 [[RETVAL]]
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;
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%cond = icmp slt i32 %a, 20
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br i1 %cond, label %T1, label %F1
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T1:
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%v1 = call i32 @f1()
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br label %Merge
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F1:
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%v2 = call i32 @f2()
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br label %Merge
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Merge:
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%retPhi = phi i32 [ %v1, %T1 ], [ %v2, %F1 ]
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%retVal = add i32 %retPhi, 10
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%condGuard = icmp slt i32 %a, 10
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call void(i1, ...) @llvm.experimental.guard(i1 %condGuard) [ "deopt"() ]
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ret i32 %retVal
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}
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define i32 @branch_doesnt_overlap_guard(i32 %a) {
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; CHECK-LABEL: @branch_doesnt_overlap_guard(
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; CHECK-NEXT: [[COND:%.*]] = icmp slt i32 [[A:%.*]], 10
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; CHECK-NEXT: br i1 [[COND]], label [[T1:%.*]], label [[F1:%.*]]
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; CHECK: T1:
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; CHECK-NEXT: [[V1:%.*]] = call i32 @f1()
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; CHECK-NEXT: br label [[MERGE:%.*]]
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; CHECK: F1:
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; CHECK-NEXT: [[V2:%.*]] = call i32 @f2()
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; CHECK-NEXT: br label [[MERGE]]
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; CHECK: Merge:
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; CHECK-NEXT: [[RETPHI:%.*]] = phi i32 [ [[V1]], [[T1]] ], [ [[V2]], [[F1]] ]
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; CHECK-NEXT: [[RETVAL:%.*]] = add i32 [[RETPHI]], 10
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; CHECK-NEXT: [[CONDGUARD:%.*]] = icmp sgt i32 [[A]], 20
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; CHECK-NEXT: call void (i1, ...) @llvm.experimental.guard(i1 [[CONDGUARD]]) [ "deopt"() ]
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; CHECK-NEXT: ret i32 [[RETVAL]]
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;
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%cond = icmp slt i32 %a, 10
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br i1 %cond, label %T1, label %F1
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T1:
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%v1 = call i32 @f1()
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br label %Merge
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F1:
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%v2 = call i32 @f2()
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br label %Merge
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Merge:
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%retPhi = phi i32 [ %v1, %T1 ], [ %v2, %F1 ]
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%retVal = add i32 %retPhi, 10
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%condGuard = icmp sgt i32 %a, 20
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call void(i1, ...) @llvm.experimental.guard(i1 %condGuard) [ "deopt"() ]
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ret i32 %retVal
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}
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define i32 @not_a_diamond1(i32 %a, i1 %cond1) {
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; CHECK-LABEL: @not_a_diamond1(
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; CHECK-NEXT: br i1 [[COND1:%.*]], label [[PRED:%.*]], label [[EXIT:%.*]]
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; CHECK: Pred:
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; CHECK-NEXT: switch i32 [[A:%.*]], label [[EXIT]] [
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; CHECK-NEXT: i32 10, label [[MERGE:%.*]]
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; CHECK-NEXT: i32 20, label [[MERGE]]
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; CHECK-NEXT: ]
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; CHECK: Merge:
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; CHECK-NEXT: call void (i1, ...) @llvm.experimental.guard(i1 [[COND1]]) [ "deopt"() ]
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; CHECK-NEXT: br label [[EXIT]]
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; CHECK: Exit:
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; CHECK-NEXT: ret i32 [[A]]
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;
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br i1 %cond1, label %Pred, label %Exit
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Pred:
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switch i32 %a, label %Exit [
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i32 10, label %Merge
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i32 20, label %Merge
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]
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Merge:
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call void(i1, ...) @llvm.experimental.guard(i1 %cond1) [ "deopt"() ]
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br label %Exit
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Exit:
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ret i32 %a
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}
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define void @not_a_diamond2(i32 %a, i1 %cond1) {
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; CHECK-LABEL: @not_a_diamond2(
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; CHECK-NEXT: Pred:
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; CHECK-NEXT: switch i32 [[A:%.*]], label [[EXIT:%.*]] [
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; CHECK-NEXT: i32 10, label [[MERGE:%.*]]
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; CHECK-NEXT: i32 20, label [[MERGE]]
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; CHECK-NEXT: ]
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; CHECK: Merge:
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; CHECK-NEXT: call void (i1, ...) @llvm.experimental.guard(i1 [[COND1:%.*]]) [ "deopt"() ]
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; CHECK-NEXT: ret void
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; CHECK: Exit:
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; CHECK-NEXT: ret void
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;
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br label %Parent
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Merge:
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call void(i1, ...) @llvm.experimental.guard(i1 %cond1)[ "deopt"() ]
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ret void
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Pred:
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switch i32 %a, label %Exit [
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i32 10, label %Merge
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i32 20, label %Merge
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]
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Parent:
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br label %Pred
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Exit:
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ret void
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}
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declare void @never_called(i1)
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; LVI uses guard to identify value of %c2 in branch as true, we cannot replace that
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; guard with guard(true & c1).
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define void @dont_fold_guard(ptr %addr, i32 %i, i32 %length) {
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; CHECK-LABEL: @dont_fold_guard(
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; CHECK-NEXT: BB1:
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; CHECK-NEXT: [[C1:%.*]] = icmp ult i32 [[I:%.*]], [[LENGTH:%.*]]
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; CHECK-NEXT: [[C2:%.*]] = icmp eq i32 [[I]], 0
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; CHECK-NEXT: [[WIDE_CHK:%.*]] = and i1 [[C1]], [[C2]]
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; CHECK-NEXT: call void (i1, ...) @llvm.experimental.guard(i1 [[WIDE_CHK]]) [ "deopt"() ]
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; CHECK-NEXT: call void @never_called(i1 true)
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; CHECK-NEXT: ret void
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;
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%c1 = icmp ult i32 %i, %length
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%c2 = icmp eq i32 %i, 0
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%wide.chk = and i1 %c1, %c2
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call void(i1, ...) @llvm.experimental.guard(i1 %wide.chk) [ "deopt"() ]
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br i1 %c2, label %BB1, label %BB2
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BB1:
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call void @never_called(i1 %c2)
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ret void
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BB2:
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ret void
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}
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declare void @dummy(i1) nounwind willreturn
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; same as dont_fold_guard1 but there's a use immediately after guard and before
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; branch. We can fold that use.
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define void @dont_fold_guard2(ptr %addr, i32 %i, i32 %length) {
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; CHECK-LABEL: @dont_fold_guard2(
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; CHECK-NEXT: BB1:
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; CHECK-NEXT: [[C1:%.*]] = icmp ult i32 [[I:%.*]], [[LENGTH:%.*]]
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; CHECK-NEXT: [[C2:%.*]] = icmp eq i32 [[I]], 0
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; CHECK-NEXT: [[WIDE_CHK:%.*]] = and i1 [[C1]], [[C2]]
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; CHECK-NEXT: call void (i1, ...) @llvm.experimental.guard(i1 [[WIDE_CHK]]) [ "deopt"() ]
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; CHECK-NEXT: call void @dummy(i1 true)
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; CHECK-NEXT: call void @never_called(i1 true)
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; CHECK-NEXT: ret void
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;
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%c1 = icmp ult i32 %i, %length
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%c2 = icmp eq i32 %i, 0
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%wide.chk = and i1 %c1, %c2
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call void(i1, ...) @llvm.experimental.guard(i1 %wide.chk) [ "deopt"() ]
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call void @dummy(i1 %c2)
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br i1 %c2, label %BB1, label %BB2
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BB1:
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call void @never_called(i1 %c2)
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ret void
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BB2:
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ret void
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}
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; same as dont_fold_guard1 but condition %cmp is not an instruction.
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; We cannot fold the guard under any circumstance.
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; FIXME: We can merge unreachableBB2 into not_zero.
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define void @dont_fold_guard3(ptr %addr, i1 %cmp, i32 %i, i32 %length) {
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; CHECK-LABEL: @dont_fold_guard3(
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; CHECK-NEXT: call void (i1, ...) @llvm.experimental.guard(i1 [[CMP:%.*]]) [ "deopt"() ]
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; CHECK-NEXT: br i1 [[CMP]], label [[BB1:%.*]], label [[BB2:%.*]]
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; CHECK: BB1:
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; CHECK-NEXT: call void @never_called(i1 [[CMP]])
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; CHECK-NEXT: ret void
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; CHECK: BB2:
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; CHECK-NEXT: ret void
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;
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call void(i1, ...) @llvm.experimental.guard(i1 %cmp) [ "deopt"() ]
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br i1 %cmp, label %BB1, label %BB2
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BB1:
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call void @never_called(i1 %cmp)
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ret void
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BB2:
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ret void
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}
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declare void @f(i1)
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; Same as dont_fold_guard1 but use switch instead of branch.
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; triggers source code `ProcessThreadableEdges`.
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define void @dont_fold_guard4(i1 %cmp1, i32 %i) nounwind {
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; CHECK-LABEL: @dont_fold_guard4(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: br i1 [[CMP1:%.*]], label [[L2:%.*]], label [[L3:%.*]]
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; CHECK: L2:
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; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[I:%.*]], 0
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; CHECK-NEXT: call void (i1, ...) @llvm.experimental.guard(i1 [[CMP]]) [ "deopt"() ]
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; CHECK-NEXT: call void @dummy(i1 true)
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; CHECK-NEXT: call void @f(i1 true)
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; CHECK-NEXT: ret void
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; CHECK: L3:
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; CHECK-NEXT: ret void
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;
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entry:
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br i1 %cmp1, label %L0, label %L3
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L0:
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%cmp = icmp eq i32 %i, 0
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call void(i1, ...) @llvm.experimental.guard(i1 %cmp) [ "deopt"() ]
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call void @dummy(i1 %cmp)
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switch i1 %cmp, label %L3 [
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i1 false, label %L1
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i1 true, label %L2
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]
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L1:
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ret void
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L2:
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call void @f(i1 %cmp)
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ret void
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L3:
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ret void
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}
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; Make sure that we don't PRE a non-speculable load across a guard.
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define void @unsafe_pre_across_guard(ptr %p, i1 %load.is.valid) {
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; CHECK-LABEL: @unsafe_pre_across_guard(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: br label [[LOOP:%.*]]
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; CHECK: loop:
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; CHECK-NEXT: call void (i1, ...) @llvm.experimental.guard(i1 [[LOAD_IS_VALID:%.*]]) [ "deopt"() ]
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; CHECK-NEXT: [[LOADED:%.*]] = load i8, ptr [[P:%.*]], align 1
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; CHECK-NEXT: [[CONTINUE:%.*]] = icmp eq i8 [[LOADED]], 0
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; CHECK-NEXT: br i1 [[CONTINUE]], label [[EXIT:%.*]], label [[LOOP]]
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; CHECK: exit:
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; CHECK-NEXT: ret void
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;
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entry:
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br label %loop
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loop: ; preds = %loop, %entry
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call void (i1, ...) @llvm.experimental.guard(i1 %load.is.valid) [ "deopt"() ]
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%loaded = load i8, ptr %p
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%continue = icmp eq i8 %loaded, 0
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br i1 %continue, label %exit, label %loop
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exit: ; preds = %loop
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ret void
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}
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; Make sure that we can safely PRE a speculable load across a guard.
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define void @safe_pre_across_guard(ptr noalias nocapture readonly dereferenceable(8) %p, i1 %load.is.valid) {
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; CHECK-LABEL: @safe_pre_across_guard(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[LOADED_PR:%.*]] = load i8, ptr [[P:%.*]], align 1
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; CHECK-NEXT: br label [[LOOP:%.*]]
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; CHECK: loop:
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; CHECK-NEXT: [[LOADED:%.*]] = phi i8 [ [[LOADED]], [[LOOP]] ], [ [[LOADED_PR]], [[ENTRY:%.*]] ]
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; CHECK-NEXT: call void (i1, ...) @llvm.experimental.guard(i1 [[LOAD_IS_VALID:%.*]]) [ "deopt"() ]
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; CHECK-NEXT: [[CONTINUE:%.*]] = icmp eq i8 [[LOADED]], 0
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; CHECK-NEXT: br i1 [[CONTINUE]], label [[EXIT:%.*]], label [[LOOP]]
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; CHECK: exit:
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; CHECK-NEXT: ret void
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;
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entry:
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br label %loop
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loop: ; preds = %loop, %entry
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call void (i1, ...) @llvm.experimental.guard(i1 %load.is.valid) [ "deopt"() ]
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%loaded = load i8, ptr %p
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%continue = icmp eq i8 %loaded, 0
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br i1 %continue, label %exit, label %loop
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exit: ; preds = %loop
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ret void
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}
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; Make sure that we don't PRE a non-speculable load across a call which may
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; alias with the load.
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define void @unsafe_pre_across_call(ptr %p) {
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; CHECK-LABEL: @unsafe_pre_across_call(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: br label [[LOOP:%.*]]
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; CHECK: loop:
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; CHECK-NEXT: [[TMP0:%.*]] = call i32 @f1()
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; CHECK-NEXT: [[LOADED:%.*]] = load i8, ptr [[P:%.*]], align 1
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; CHECK-NEXT: [[CONTINUE:%.*]] = icmp eq i8 [[LOADED]], 0
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; CHECK-NEXT: br i1 [[CONTINUE]], label [[EXIT:%.*]], label [[LOOP]]
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; CHECK: exit:
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; CHECK-NEXT: ret void
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;
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entry:
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br label %loop
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loop: ; preds = %loop, %entry
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call i32 @f1()
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%loaded = load i8, ptr %p
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%continue = icmp eq i8 %loaded, 0
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br i1 %continue, label %exit, label %loop
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exit: ; preds = %loop
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ret void
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}
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; Make sure that we can safely PRE a speculable load across a call.
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define void @safe_pre_across_call(ptr noalias dereferenceable(8) %p) {
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; CHECK-LABEL: @safe_pre_across_call(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[LOADED_PR:%.*]] = load i8, ptr [[P:%.*]], align 1
|
|
; CHECK-NEXT: br label [[LOOP:%.*]]
|
|
; CHECK: loop:
|
|
; CHECK-NEXT: [[LOADED:%.*]] = phi i8 [ [[LOADED]], [[LOOP]] ], [ [[LOADED_PR]], [[ENTRY:%.*]] ]
|
|
; CHECK-NEXT: [[TMP0:%.*]] = call i32 @f1()
|
|
; CHECK-NEXT: [[CONTINUE:%.*]] = icmp eq i8 [[LOADED]], 0
|
|
; CHECK-NEXT: br i1 [[CONTINUE]], label [[EXIT:%.*]], label [[LOOP]]
|
|
; CHECK: exit:
|
|
; CHECK-NEXT: ret void
|
|
;
|
|
entry:
|
|
br label %loop
|
|
|
|
loop: ; preds = %loop, %entry
|
|
call i32 @f1()
|
|
%loaded = load i8, ptr %p
|
|
%continue = icmp eq i8 %loaded, 0
|
|
br i1 %continue, label %exit, label %loop
|
|
|
|
exit: ; preds = %loop
|
|
ret void
|
|
}
|