Florian Hahn cb71fefb22 [VPlan] Expand SCEV min/max via scalar intrinsic VPInstructions. (#207842) ...

Use the VPInstruction::Intrinsic opcode to expand min/max SCEV
expressions to LLVM min/max intrinsics as VPInstructions.

The operands are chained in reverse order, matching SCEVExpander's
expansion of min/max expressions.

This helps to clean up another set of duplicated vscale calls.

Depends on https://github.com/llvm/llvm-project/pull/207541
Depends on https://github.com/llvm/llvm-project/pull/207836

PR: https://github.com/llvm/llvm-project/pull/207842

2026-07-13 11:39:35 +01:00

..

active-lane-mask.ll

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arm-ieee-vectorize.ll

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arm-unroll.ll

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gather-cost.ll

[VPlan] Strip replicate-region bail in materializing Unpacks (#203907)

2026-06-25 10:05:25 +00:00

gcc-examples.ll

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interleaved_cost.ll

[VPlan] Don't print interleave group insert position. (#200023)

2026-06-02 09:41:52 +00:00

lit.local.cfg

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mve-gather-scatter-tailpred.ll

[VPlan] Pull out reverses and splice.lefts from elementwise operations (#199234)

2026-07-08 10:36:44 +00:00

mve-hoist-runtime-checks.ll

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mve-icmpcost.ll

[LV][NFC] Use APFloat class when printing out costs per lane (#201824)

2026-06-15 11:15:55 +01:00

mve-interleaved-cost.ll

[VPlan] Don't print interleave group insert position. (#200023)

2026-06-02 09:41:52 +00:00

mve-known-trip-count.ll

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mve-maskedldst.ll

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mve-multiexit.ll

[LAA] Use (Diff - 1) <u (Threshold - 1) for diff checks. (#188462)

2026-07-03 22:11:26 +01:00

mve-predstorecost.ll

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mve-qabs.ll

[LAA] Use (Diff - 1) <u (Threshold - 1) for diff checks. (#188462)

2026-07-03 22:11:26 +01:00

mve-recurrence.ll

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mve-reduction-predselect.ll

[IR] Don't match icmp+select as min/max (#205595)

2026-06-25 17:13:59 +02:00

mve-reduction-types.ll

[IR] Don't match icmp+select as min/max (#205595)

2026-06-25 17:13:59 +02:00

mve-reductions-interleave.ll

[LV][NFC] Remove instcombine pass from RUN lines in ARM tests (#202913)

2026-06-11 09:39:49 +01:00

mve-reductions.ll

[LV][NFC] Remove instcombine pass from RUN lines in ARM tests (#202913)

2026-06-11 09:39:49 +01:00

mve-reg-pressure-spills.ll

[LV] Add initial cost model for VPScalarIVSteps (#203347)

2026-06-17 10:03:25 +01:00

mve-reg-pressure-vmla.ll

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mve-saddsatcost.ll

[VPlan] Model initial header mask as region value. (#196199)

2026-07-08 22:38:11 +01:00

mve-selectandorcost.ll

[LV][NFC] Remove instcombine pass from RUN lines in ARM tests (#202913)

2026-06-11 09:39:49 +01:00

mve-shiftcost.ll

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mve-vldn.ll

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optsize_minsize.ll

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pointer_iv.ll

[BasicAA] Allow some more recursion across GEPs/phis. (#205010)

2026-06-23 18:57:28 +00:00

prefer-tail-loop-folding.ll

[Transforms] Remove redundant --check-prefix flags (#206211)

2026-06-27 01:17:58 +00:00

replicating-load-store-costs.ll

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scalar-block-cost.ll

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sphinx.ll

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tail-fold-multiple-icmps.ll

[IR] Don't match icmp+select as min/max (#205595)

2026-06-25 17:13:59 +02:00

tail-folding-allowed.ll

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tail-folding-counting-down.ll

[VPlan] Expand SCEV min/max via scalar intrinsic VPInstructions. (#207842)

2026-07-13 11:39:35 +01:00

tail-folding-loop-hint.ll

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tail-folding-not-allowed.ll

[IR] Don't match icmp+select as min/max (#205595)

2026-06-25 17:13:59 +02:00

tail-folding-prefer-flag.ll

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tail-folding-reduces-vf.ll

[LV] Complete VPWidenCastRecipe cost model (#196918)

2026-05-13 14:04:21 +01:00

tail-folding-reductions-allowed.ll

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tail-folding-scalar-epilogue-fallback.ll

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vector_cast.ll

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width-detect.ll

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