checkpoint: VT1200 reverse-engineering workspace before board-model work

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SDD committed 2026-10-16 01:37:50 +03:00
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# Generated emulator artifacts — never commit
harness/mame/out.avi
harness/mame/*.ppm
harness/mame/*.pgm
harness/mame/vt1200-ram-*.bin
harness/mame/vt1200-frame-*.ppm
harness/mame/hist.txt
harness/mame/debug.log
harness/mame/build.log
harness/mame/mpv.log
harness/mame/loupe.log
harness/mame/error.log
harness/mame/trace/*.trace*
# Crash dumps
core
core.*
*.core
# Python
__pycache__/
*.pyc
# Emulator + tooling scratch
.superpowers/
ghidra/vt1200.rep/
*.gpr
# Nested clone (re-clonable; our patches live in git-tracked files)
lat/code/latd/
# Large generated trace + nested reference clones
harness/mame/vt1200-reset.trace
reference/x11/
tools/ghidra-headless-mcp/