opencode.energia.arti.ee 3e2dddeb6a docs(termtris): port report, run wrapper and harness write-up

2026-11-03 20:07:35 +00:00

..

badapple

feat(badapple): stylise the clip into blocks, and let the sender widen its keyframe cadence

2026-10-31 23:12:25 +02:00

c-hello

fix(video): model the real unit's VR319 monitor

2026-10-31 20:53:51 +02:00

dis

checkpoint: VT1200 reverse-engineering workspace before board-model work

2026-10-16 01:37:50 +03:00

hello-world

fix(video): model the real unit's VR319 monitor

2026-10-31 20:53:51 +02:00

mame

docs(termtris): port report, run wrapper and harness write-up

2026-11-03 20:07:35 +00:00

sdk-roundtrip

dis34: print long relative JR as jr and surface B-file SP as b15

2026-10-18 00:54:34 +03:00

sdk-scratch

reference: TMS34010 SDK investigation; prove GSPA round trip

2026-10-18 00:39:32 +03:00

udpstream

feat(rx): rectangle blits for stretch-1 strips; ring depth 16 -> 32 in the encoder

2026-10-31 23:27:27 +02:00

BOOTP_REPORT.md

harness/serve.py: optional BOOTP responder (--bootp) so the VT1200 gets an IP at boot

2026-10-16 17:27:00 +03:00

cap-abc.log

checkpoint: VT1200 reverse-engineering workspace before board-model work

2026-10-16 01:37:50 +03:00

cap-all.log

checkpoint: VT1200 reverse-engineering workspace before board-model work

2026-10-16 01:37:50 +03:00

cap-boot.log

checkpoint: VT1200 reverse-engineering workspace before board-model work

2026-10-16 01:37:50 +03:00

cap-decsnf.log

checkpoint: VT1200 reverse-engineering workspace before board-model work

2026-10-16 01:37:50 +03:00

cap-evil.log

checkpoint: VT1200 reverse-engineering workspace before board-model work

2026-10-16 01:37:50 +03:00

cap-probe.log

checkpoint: VT1200 reverse-engineering workspace before board-model work

2026-10-16 01:37:50 +03:00

cap-snf.log

checkpoint: VT1200 reverse-engineering workspace before board-model work

2026-10-16 01:37:50 +03:00

cap-term.log

checkpoint: VT1200 reverse-engineering workspace before board-model work

2026-10-16 01:37:50 +03:00

cap-tftp.log

checkpoint: VT1200 reverse-engineering workspace before board-model work

2026-10-16 01:37:50 +03:00

cap-wide.log

checkpoint: VT1200 reverse-engineering workspace before board-model work

2026-10-16 01:37:50 +03:00

cap.log

checkpoint: VT1200 reverse-engineering workspace before board-model work

2026-10-16 01:37:50 +03:00

net-setup.sh

harness: net-setup.sh -- recreate the tap+bridge the harness needs (they do not survive a reboot)

2026-10-17 14:15:17 +03:00

serve.py

harness/serve.py: optional BOOTP responder (--bootp) so the VT1200 gets an IP at boot

2026-10-16 17:27:00 +03:00

tftp.log

checkpoint: VT1200 reverse-engineering workspace before board-model work

2026-10-16 01:37:50 +03:00