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Initial commit

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First design iteration, with layout.
This commit is contained in:
Werner Almesberger
2012-06-11 22:18:21 -03:00
commit 0fd4a0827a
15 changed files with 11515 additions and 0 deletions
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components/Atmega8.lib Normal file
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EESchema-LIBRARY Version 2.3 Date: 22/9/2005-14:07:02
#
# ATMEGA8
#
DEF ATMEGA8 I 0 40 Y Y 1 F N
F0 "I" 700 1400 60 H V C C
F1 "ATMEGA8" 650 -1450 60 H V C C
DRAW
S -900 1250 900 -1350 0 1 0 N
X AVCC 18 -100 1550 300 D 50 50 1 1 W
X PC5(ADC5/SCL) 28 1200 -750 300 L 50 50 1 1 B
X PC2(ADC2) 25 1200 -450 300 L 50 50 1 1 B
X PB7(XTAL2/TOSC2) 8 1200 50 300 L 50 50 1 1 B
X VCC 6 300 1550 300 D 50 50 1 1 W
X PD7(AIN1) 11 -1200 50 300 R 50 50 1 1 B
X PB1(OC1A) 13 1200 650 300 L 50 50 1 1 B
X PB5(SCK) 17 1200 250 300 L 50 50 1 1 B
X PD5(T1) 9 -1200 250 300 R 50 50 1 1 B
X PC6(RESET-) 29 1200 -850 300 L 50 50 1 1 B
X PD3(INT1) 1 -1200 450 300 R 50 50 1 1 B
X PC0(ADC0) 23 1200 -250 300 L 50 50 1 1 B
X PD1(TXD) 31 -1200 650 300 R 50 50 1 1 B
X PB3(MOSI/OC2) 15 1200 450 300 L 50 50 1 1 B
X ADC6 19 -1200 -450 300 R 50 50 1 1 I
X GND 3 -200 -1650 300 U 50 50 1 1 W
X GND 21 200 -1650 300 U 50 50 1 1 W
X PD6(AIN0) 10 -1200 150 300 R 50 50 1 1 B
X PD4(XCK/T0) 2 -1200 350 300 R 50 50 1 1 B
X PD2(INT0) 32 -1200 550 300 R 50 50 1 1 B
X PD0(RXD) 30 -1200 750 300 R 50 50 1 1 B
X GND 5 0 -1650 300 U 50 50 1 1 W
X AREF 20 -300 1550 300 D 50 50 1 1 W
X VCC 4 100 1550 300 D 50 50 1 1 W
X PC4(ADC4/SDA) 27 1200 -650 300 L 50 50 1 1 B
X PC3(ADC3) 26 1200 -550 300 L 50 50 1 1 B
X PC1(ADC1) 24 1200 -350 300 L 50 50 1 1 B
X ADC7 22 -1200 -550 300 R 50 50 1 1 I
X PB6(XTAL1/TOSC1) 7 1200 150 300 L 50 50 1 1 B
X PB4(MISO) 16 1200 350 300 L 50 50 1 1 B
X PB2(SS-/OC1B) 14 1200 550 300 L 50 50 1 1 B
X PB0(ICP1) 12 1200 750 300 L 50 50 1 1 B
ENDDRAW
ENDDEF
#
#End Library