diff --git a/whirl/cpu/cpu.brd b/whirl/cpu/cpu.brd index 7314bb4..caedcb0 100644 --- a/whirl/cpu/cpu.brd +++ b/whirl/cpu/cpu.brd @@ -1,4 +1,4 @@ -PCBNEW-BOARD Version 1 date Mon Nov 5 19:43:49 2012 +PCBNEW-BOARD Version 1 date Tue Nov 6 15:06:17 2012 # Created by Pcbnew(2012-04-11 BZR 3505)-testing @@ -7,12 +7,11 @@ encoding utf-8 LayerCount 2 Ly 1FFF8001 EnabledLayers 1FFF8001 -VisibleLayers 1FFFFFFF Links 58 NoConn 0 Di 48178 33513 58299 50837 Ndraw 5 -Ntrack 275 +Ntrack 270 Nzone 0 BoardThickness 630 Nmodule 15 @@ -22,7 +21,7 @@ $EndGENERAL $SHEETDESCR Sheet A4 11693 8268 Title "" -Date "5 nov 2012" +Date "6 nov 2012" Rev "" Comp "" Comment1 "" @@ -56,12 +55,12 @@ TextPcbSize 600 800 EdgeModWidth 59 TextModSize 600 600 TextModWidth 120 -PadSize 600 600 +PadSize 320 320 PadDrill 320 Pad2MaskClearance 100 AuxiliaryAxisOrg 0 0 VisibleElements FFFFFBBF -PcbPlotParams (pcbplotparams (layerselection 3178497) (usegerberextensions true) (excludeedgelayer true) (linewidth 60) (plotframeref false) (viasonmask false) (mode 1) (useauxorigin false) (hpglpennumber 1) (hpglpenspeed 20) (hpglpendiameter 15) (hpglpenoverlay 2) (pscolor true) (psnegative false) (psa4output false) (plotreference true) (plotvalue true) (plotothertext true) (plotinvisibletext false) (padsonsilk false) (subtractmaskfromsilk false) (outputformat 1) (mirror false) (drillshape 1) (scaleselection 1) (outputdirectory "")) +PcbPlotParams (pcbplotparams (layerselection 3178497) (usegerberextensions true) (excludeedgelayer true) (linewidth 60) (plotframeref false) (viasonmask false) (mode 1) (useauxorigin false) (hpglpennumber 1) (hpglpenspeed 20) (hpglpendiameter 15) (hpglpenoverlay 0) (pscolor true) (psnegative false) (psa4output false) (plotreference true) (plotvalue true) (plotothertext true) (plotinvisibletext false) (padsonsilk false) (subtractmaskfromsilk false) (outputformat 1) (mirror false) (drillshape 1) (scaleselection 1) (outputdirectory "")) $EndSETUP $EQUIPOT @@ -194,7 +193,7 @@ $NCLASS Name "Power" Desc "" Clearance 79 -TrackWidth 118 +TrackWidth 157 ViaDia 394 ViaDrill 100 uViaDia 200 @@ -432,7 +431,7 @@ $PAD Sh "30" R 178 512 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 7 "/LCLK" +Ne 0 "" Po -472 -1663 $EndPAD $PAD @@ -446,7 +445,7 @@ $PAD Sh "32" R 177 512 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 0 "" +Ne 7 "/LCLK" Po -1101 -1663 $EndPAD $EndMODULE QFP32 @@ -672,51 +671,51 @@ Po 0 -5000 $EndPAD $EndMODULE PAD_80x80_6x100mil $MODULE PAD_2mm_6x50mil -Po 53346 34350 900 15 5000D223 50982997 ~~ +Po 51083 34350 2700 15 50994DD3 50982997 ~~ Li PAD_2mm_6x50mil Sc 50982997 AR /5098082E Op 0 0 0 At SMD -T0 0 -150 200 200 900 40 N V 25 N "CON2" -T1 0 150 200 200 900 40 N I 25 N "CONN_6" +T0 0 -150 200 200 2700 40 N V 25 N "CON2" +T1 0 150 200 200 2700 40 N I 25 N "CONN_6" $PAD -Sh "1" O 786 196 0 0 900 +Sh "1" O 786 196 0 0 2700 Dr 0 0 0 At SMD N 00808000 Ne 10 "/SCLK" Po 0 0 $EndPAD $PAD -Sh "2" O 786 197 0 0 900 +Sh "2" O 786 197 0 0 2700 Dr 0 0 0 At SMD N 00808000 Ne 7 "/LCLK" Po 0 -499 $EndPAD $PAD -Sh "3" O 786 197 0 0 900 +Sh "3" O 786 197 0 0 2700 Dr 0 0 0 At SMD N 00808000 Ne 6 "/DS" Po 0 -999 $EndPAD $PAD -Sh "4" O 786 197 0 0 900 +Sh "4" O 786 197 0 0 2700 Dr 0 0 0 At SMD N 00808000 Ne 3 "/CTRL_3V" Po 0 -1499 $EndPAD $PAD -Sh "5" O 786 197 0 0 900 +Sh "5" O 786 197 0 0 2700 Dr 0 0 0 At SMD N 00808000 Ne 23 "GND" Po 0 -1999 $EndPAD $PAD -Sh "6" O 786 197 0 0 900 +Sh "6" O 786 197 0 0 2700 Dr 0 0 0 At SMD N 00808000 Ne 18 "/VLED" @@ -1178,7 +1177,7 @@ Po 0 -3000 $EndPAD $EndMODULE PAD_120x60_4x100mil $TEXTPCB -Te "121005" +Te "121006" Po 56496 48228 600 591 98 900 De 0 0 0 Normal C $EndTEXTPCB @@ -1199,10 +1198,10 @@ Po 0 48228 50787 48228 33563 49 De 28 0 900 0 0 $EndDRAWSEGMENT $TRACK -Po 0 53898 39133 53937 39172 79 -1 -De 15 0 1 50982F2C 0 Po 0 53041 39133 53898 39133 79 -1 De 15 0 1 0 0 +Po 0 53898 39133 53937 39172 79 -1 +De 15 0 1 50982F2C 0 Po 0 55944 45550 51160 45550 79 -1 De 15 0 2 0 0 Po 0 50787 45177 50787 41733 79 -1 @@ -1219,338 +1218,334 @@ Po 0 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a/whirl/cpu/cpu.sch +++ b/whirl/cpu/cpu.sch @@ -1,4 +1,4 @@ -EESchema Schematic File Version 2 date Mon Nov 5 18:50:49 2012 +EESchema Schematic File Version 2 date Tue Nov 6 14:48:14 2012 LIBS:c LIBS:r LIBS:Atmega8 @@ -17,7 +17,7 @@ $Descr A4 11693 8268 encoding utf-8 Sheet 1 1 Title "" -Date "5 nov 2012" +Date "6 nov 2012" Rev "" Comp "" Comment1 "" @@ -50,7 +50,7 @@ P 1200 2750 F 0 "CON2" H 1200 3100 60 0000 C CNN F 1 "CONN_6" H 1200 2400 60 0000 C CNN 1 1200 2750 - -1 0 0 -1 + -1 0 0 1 $EndComp $Comp L C C2 @@ -242,7 +242,7 @@ CTRL_3V NoConn ~ 6200 3300 Text Label 8400 1050 0 60 ~ 0 VLED -Text Label 2000 3000 0 60 ~ 0 +Text Label 2000 2500 0 60 ~ 0 VLED $Comp L GND #PWR010 @@ -253,13 +253,13 @@ F 1 "GND" H 1800 3130 30 0001 C CNN 1 1800 3200 1 0 0 -1 $EndComp -Text Label 2000 2800 0 60 ~ 0 -CTRL_3V -Text Label 2000 2500 0 60 ~ 0 -SCLK Text Label 2000 2700 0 60 ~ 0 +CTRL_3V +Text Label 2000 3000 0 60 ~ 0 +SCLK +Text Label 2000 2800 0 60 ~ 0 DS -Text Label 2000 2600 0 60 ~ 0 +Text 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