mirror of
git://projects.qi-hardware.com/antorcha.git
synced 2024-11-01 09:24:05 +02:00
fw/spi.c: explain why we probably can't reach fosc/2 = 4 MHz
This commit is contained in:
parent
5b1f722568
commit
dd72f4642e
10
fw/spi.c
10
fw/spi.c
@ -24,6 +24,16 @@
|
||||
#define SCLK B, 8
|
||||
|
||||
|
||||
/*
|
||||
* According to simulation, signals from MCU to transceiver should already
|
||||
* suffer severe degradation * at fosc/4 = 2 MHz due to parasitic capacitance
|
||||
* (assumed to be 10 pF) and the series resistors (10 kOhm) of the voltage
|
||||
* dividers.
|
||||
*
|
||||
* fosc/2 = 4 MHz looks horrible in simulation and does not work reliably in
|
||||
* practice either.
|
||||
*/
|
||||
|
||||
void spi_init(void)
|
||||
{
|
||||
/* SPI mode 0, MSB first, fosc/4 */
|
||||
|
Loading…
Reference in New Issue
Block a user