diff --git a/tornado/cpu/cpu.sch b/tornado/cpu/cpu.sch index 03e8dd4..850c93e 100644 --- a/tornado/cpu/cpu.sch +++ b/tornado/cpu/cpu.sch @@ -1,4 +1,4 @@ -EESchema Schematic File Version 2 date Tue Dec 25 19:52:24 2012 +EESchema Schematic File Version 2 date Wed Dec 26 21:38:03 2012 LIBS:c LIBS:r LIBS:inductor @@ -17,9 +17,9 @@ EELAYER 25 0 EELAYER END $Descr A4 11693 8268 encoding utf-8 -Sheet 1 1 +Sheet 1 2 Title "" -Date "25 dec 2012" +Date "27 dec 2012" Rev "" Comp "" Comment1 "" @@ -30,176 +30,106 @@ $EndDescr $Comp L C C4 U 1 1 50980865 -P 2750 4100 -F 0 "C4" H 2800 4200 60 0000 L CNN -F 1 "100n" H 2800 4000 60 0000 L CNN - 1 2750 4100 +P 10900 5600 +F 0 "C4" H 10950 5700 60 0000 L CNN +F 1 "100n" H 10950 5500 60 0000 L CNN + 1 10900 5600 1 0 0 -1 $EndComp $Comp L C C3 U 1 1 50980874 -P 2250 4100 -F 0 "C3" H 2300 4200 60 0000 L CNN -F 1 "100n" H 2300 4000 60 0000 L CNN - 1 2250 4100 +P 10500 5600 +F 0 "C3" H 10550 5700 60 0000 L CNN +F 1 "100n" H 10550 5500 60 0000 L CNN + 1 10500 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Line - 4100 6700 4600 6700 + 3050 5450 3250 5450 Wire Wire Line - 1000 4700 1000 4200 + 3050 5600 3250 5600 Wire Wire Line - 1000 3600 1000 3800 + 4450 6700 4450 6500 Wire Wire Line - 6100 6400 6100 5650 + 4600 6500 4600 6700 Wire Wire Line - 9700 6500 9700 6900 + 4900 6500 4900 6700 Wire Wire Line - 9600 6500 9600 6700 + 5050 6500 5050 6700 Wire Wire Line - 9600 6700 9700 6700 -Connection ~ 9700 6700 + 5200 6700 5200 6500 +Wire Wire Line + 5350 6500 5350 6700 $EndSCHEMATC diff --git a/tornado/cpu/per.sch b/tornado/cpu/per.sch new file mode 100644 index 0000000..96d5107 --- /dev/null +++ b/tornado/cpu/per.sch @@ -0,0 +1,272 @@ +EESchema Schematic File Version 2 date Wed Dec 26 21:38:03 2012 +LIBS:c +LIBS:r +LIBS:inductor +LIBS:led +LIBS:con +LIBS:lpc1100-qfn33 +LIBS:lis3dh +LIBS:gencon +LIBS:pwr +LIBS:powered +LIBS:evqq7 +LIBS:pmosfet-gsd +LIBS:tps6216x +LIBS:memcard8 +EELAYER 25 0 +EELAYER END +$Descr A4 11693 8268 +encoding utf-8 +Sheet 2 2 +Title "" +Date "27 dec 2012" +Rev "" +Comp "" +Comment1 "" +Comment2 "" +Comment3 "" +Comment4 "" +$EndDescr +$Comp +L PMOSFET-GSD Q1 +U 1 1 50DB9455 +P 2250 4500 +F 0 "Q1" H 2100 4825 60 0000 C CNN +F 1 "PMOSFET-GSD" H 1900 4200 60 0000 C CNN + 1 2250 4500 + 1 0 0 1 +$EndComp +$Comp +L GND #PWR021 +U 1 1 50DB9461 +P 2950 6100 +F 0 "#PWR021" H 2950 6100 30 0001 C CNN +F 1 "GND" H 2950 6030 30 0001 C CNN + 1 2950 6100 + 1 0 0 -1 +$EndComp +$Comp +L C C7 +U 1 1 50DB9467 +P 2950 4500 +F 0 "C7" H 3000 4600 60 0000 L CNN +F 1 "1u" H 3000 4400 60 0000 L CNN + 1 2950 4500 + 1 0 0 -1 +$EndComp +$Comp +L GND #PWR022 +U 1 1 50DB9474 +P 7500 4000 +F 0 "#PWR022" H 7500 4000 30 0001 C CNN +F 1 "GND" H 7500 3930 30 0001 C CNN + 1 7500 4000 + 1 0 0 -1 +$EndComp +Text Label 2450 5500 0 60 ~ 0 +VCARD +$Comp +L LIS3DH U3 +U 1 1 50DB94A4 +P 8600 3500 +F 0 "U3" H 8000 4150 60 0000 L CNN +F 1 "LIS3DH" H 8600 3650 60 0000 C CNN + 1 8600 3500 + 1 0 0 -1 +$EndComp +$Comp +L MEMCARD8-SHIELD4-SW CON5 +U 1 1 50DB94B0 +P 3500 5600 +F 0 "CON5" H 3400 6100 60 0000 L CNN +F 1 "MEMCARD8-SHIELD4-SW" H 3750 5150 60 0000 C CNN + 1 3500 5600 + 1 0 0 -1 +$EndComp +$Comp +L C C5 +U 1 1 50DB94C8 +P 6700 2800 +F 0 "C5" H 6750 2900 60 0000 L CNN +F 1 "10u" H 6750 2700 60 0000 L CNN + 1 6700 2800 + 1 0 0 -1 +$EndComp +$Comp +L C C6 +U 1 1 50DB94DA +P 7100 2800 +F 0 "C6" H 7150 2900 60 0000 L CNN +F 1 "100n" H 7150 2700 60 0000 L CNN + 1 7100 2800 + 1 0 0 -1 +$EndComp +NoConn ~ 8550 2600 +NoConn ~ 8700 2600 +NoConn ~ 9500 3200 +$Comp +L GND #PWR023 +U 1 1 50DB9508 +P 4600 6100 +F 0 "#PWR023" H 4600 6100 30 0001 C CNN +F 1 "GND" H 4600 6030 30 0001 C CNN + 1 4600 6100 + 1 0 0 -1 +$EndComp +$Comp +L GND #PWR024 +U 1 1 50DB9525 +P 7100 3200 +F 0 "#PWR024" H 7100 3200 30 0001 C CNN +F 1 "GND" H 7100 3130 30 0001 C CNN + 1 7100 3200 + 1 0 0 -1 +$EndComp +$Comp +L GND #PWR025 +U 1 1 50DB952B +P 6700 3200 +F 0 "#PWR025" H 6700 3200 30 0001 C CNN +F 1 "GND" H 6700 3130 30 0001 C CNN + 1 6700 3200 + 1 0 0 -1 +$EndComp +$Comp +L GND #PWR026 +U 1 1 50DB9531 +P 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