mirror of
git://projects.qi-hardware.com/antorcha.git
synced 2024-11-01 18:12:49 +02:00
9447541679
Instead of a counter, which worked okay with 16 LEDs but is useless with all 64 of them, we now show a filling/emptying bar. The update speed is high enough that rotation results in about a quarter-circle pattern.
158 lines
2.4 KiB
C
158 lines
2.4 KiB
C
#include <stdbool.h>
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#include <stdint.h>
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#define F_CPU 8000000UL
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#include <util/delay.h>
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#include "io.h"
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#define HIGH(port) \
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(MASK(port, CARD_nPWR) | \
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MASK(port, SW_N) | MASK(port, SW_E) | MASK(port, SW_S) | \
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MASK(port, SW_W) | MASK(port, SW_SW))
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#define OUTPUTS(port) \
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(MASK(port, CARD_nPWR) | MASK(port, CARD_CLK) | \
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MASK(port, LED_DS) | MASK(port, LED_LCLK) | MASK(port, LED_SCLK))
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#if 0
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/*
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* @@@ For testing, connect the LED bar via the 8:10 card slot, so that it
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* can be disconnected without soldering.
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*/
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#define SCLK CARD_DAT1
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#define LCLK CARD_DAT0
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#define DS CARD_CLK
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#define VDD CARD_CMD
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#else
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#define SCLK LED_SCLK
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#define LCLK LED_LCLK
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#define DS LED_DS
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#endif
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#define N_LEDS 64
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static void send(uint8_t pattern[N_LEDS/8])
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{
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uint8_t i, j, mask;
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for (i = 0; i != N_LEDS/8; i++) {
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mask = 1;
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for (j = 0; j != 8; j++) {
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if (pattern[i] & mask)
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SET(DS);
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else
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CLR(DS);
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SET(SCLK);
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CLR(SCLK);
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mask <<= 1;
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}
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}
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SET(LCLK);
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CLR(LCLK);
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}
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static inline void admux(bool x)
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{
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ADMUX =
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1 << REFS0 | /* Vref is AVcc */
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(x ? ADC_X : ADC_Y);
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}
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static inline void adcsra(bool start)
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{
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/*
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* The ADC needs to run at clkADC <= 200 kHz for full resolution.
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* At clkADC = 125 kHz, a conversion takes about 110 us.
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*/
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ADCSRA =
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1 << ADEN | /* enable ADC */
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(start ? 1 << ADSC : 0) |
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1 << ADIE | /* enable ADC interrupts */
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6; /* clkADC = clk/64 -> 125 kHz */
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}
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static uint16_t adc(bool x)
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{
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adcsra(0);
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admux(x);
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adcsra(1);
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while (ADCSRA & (1 << ADSC));
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return ADC;
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}
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int main(void)
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{
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static uint8_t p[N_LEDS/8];
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uint8_t mode = 0;
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uint16_t n = 0, v;
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PORTB = HIGH(B);
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PORTC = HIGH(C);
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PORTD = HIGH(D);
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DDRB = OUTPUTS(B);
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DDRC = OUTPUTS(C);
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DDRD = OUTPUTS(D);
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CLR(CARD_nPWR);
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CLR(SCLK);
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CLR(LCLK);
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OUT(SCLK);
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OUT(LCLK);
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OUT(DS);
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#ifdef VDD
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SET(VDD);
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OUT(VDD);
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#endif
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while (1) {
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while (!PIN(SW_SW));
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if (!PIN(SW_N))
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mode = 0;
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if (!PIN(SW_E))
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mode = 1;
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if (!PIN(SW_S))
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mode = 2;
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switch (mode) {
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case 1:
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n = adc(0);
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p[0] = n;
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p[1] = n >> 8;
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p[2] = p[3] = p[4] = p[5] = p[6] = p[7] = 0;
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send(p);
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break;
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case 2:
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n = adc(1);
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p[0] = n;
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p[1] = n >> 8;
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p[2] = p[3] = p[4] = p[5] = p[6] = p[7] = 0;
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send(p);
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break;
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default:
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v = 63-n;
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if (n & 64)
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p[(v >> 3) & 7] &= ~(1 << (v & 7));
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else
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p[(v >> 3) & 7] |= 1 << (v & 7);
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send(p);
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n++;
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}
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_delay_ms(1);
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}
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}
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